MCP6441_12 [MICROCHIP]
450 nA, 9 kHz Op Amp; 450 nA的, 9 kHz的运算放大器型号: | MCP6441_12 |
厂家: | MICROCHIP |
描述: | 450 nA, 9 kHz Op Amp |
文件: | 总46页 (文件大小:2281K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MCP6441/2/4
450 nA, 9 kHz Op Amp
Features:
Description:
The MCP6441/2/4 device is a single nanopower
operational amplifier (op amp), which has low
quiescent current (450 nA, typical) and rail-to-rail input
and output operation. This op amp is unity gain stable
and has a gain bandwidth product of 9 kHz (typical).
These devices operate with a single supply voltage as
low as 1.4V. These features make the family of op
amps well suited for single-supply, battery-powered
applications.
• Low Quiescent Current: 450 nA (typical)
• Gain Bandwidth Product: 9 kHz (typical)
• Supply Voltage Range: 1.4V to 6.0V
• Rail-to-Rail Input and Output
• Unity Gain Stable
• Slew Rate: 3V/ms (typical)
• Extended Temperature Range: -40°C to +125°C
• No Phase Reversal
The MCP6441/2/4 op amp is designed with Microchip’s
advanced CMOS process and offered in single
(MCP6441), dual (MCP6442), and quad (MCP6444)
configurations. All devices are available in the
extended temperature range, with a power supply
range of 1.4V to 6.0V.
• Small Packages
Applications:
• Portable Equipment
• Battery Powered System
• Data Acquisition Equipment
• Sensor Conditioning
Typical Application
• Battery Current Sensing
• Analog Active Filters
IDD
To load
1.4V
VDD
10Ω
to
VOUT
Design Aids:
6.0V
MCP6441
100 kΩ
• SPICE Macro Models
• FilterLab® Software
1 MΩ
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
V
– V
DD
OUT
I
= -----------------------------------------
DD
(10 V/V) ⋅ (10Ω)
Battery Current Sensing
Package Types
MCP6444
SOIC, TSSOP
MCP6442
2x3 TDFN *
MCP6441
SC70-5, SOT-23-5
MCP6442
SOIC, MSOP
VDD
V
VOUTA
VINA–
1
2
14
13
12
11
VOUTA
VDD
1
8
VOUTD
VIND
VIND+
VSS
VOUT
VSS
VOUTA
1
2
3
5 VDD
1
2
3
4
8
7
6
5
VINA–
–
OUTB
VIN–
VIN+
VSS
VOUTB
2
3
4
7
6
5
EP
9
VIN+
VSS
VIN+
VDD
3
4
5
6
7
4
VIN+
VIN–
VIN–
VINB
VINB
–
+
+
VINB
VINB
VINB
+
–
10 VINC
9
8
+
VINC–
VOUTB
VOUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 1
MCP6441/2/4
NOTES:
DS22257C-page 2
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
V
– V ........................................................................7.0V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum rat-
ing conditions for extended periods may affect device
reliability.
DD
SS
Current at Input Pins.....................................................±2 mA
Analog Inputs (V +, V -)†† .......... V – 1.0V to V + 1.0V
IN
IN
SS
DD
All Other Inputs and Outputs ......... V – 0.3V to V + 0.3V
SS
DD
Difference Input Voltage ...................................... |V – V
|
SS
DD
Output Short-Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
†† See Section 4.1.2 “Input Voltage Limits”.
Maximum Junction Temperature (T )..........................+150°C
J
ESD Protection on All Pins (HBM; MM)............... ≥ 4 kV; 200V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 1 MΩ to VL. (Refer to Figure 1-1).
Parameters
Input Offset
Sym
Min
Typ
Max
Units
Conditions
Input Offset Voltage
VOS
-4.5
—
—
+4.5
—
mV VCM = VSS
Input Offset Drift with Temperature
ΔVOS/ΔTA
±2.5
µV/°C TA= -40°C to +125°C,
VCM = VSS
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
PSRR
IB
65
86
—
dB VCM = VSS
—
—
—
—
—
—
±1
20
—
—
—
—
—
—
pA
pA TA = +85°C
400
pA TA = +125°C
Input Offset Current
IOS
ZCM
±1
pA
Common Mode Input Impedance
Differential Input Impedance
Common Mode
1013||6
1013||6
Ω||pF
Ω||pF
ZDIFF
Common Mode Input Voltage Range
Common Mode Rejection Ratio
VCMR
VSS-0.3
60
—
VDD+0.3
—
V
CMRR
76
dB VCM = -0.3V to 6.3V,
VDD = 6.0V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
AOL
90
110
—
—
dB VOUT = 0.1V to VDD-0.1V
RL = 10 kΩ to VL
Output
Maximum Output Voltage Swing
V
OL, VOH
ISC
VSS+20
VDD–20
mV VDD = 6.0V, RL = 10 kΩ
0.5V input overdrive
Output Short-Circuit Current
—
—
±3
—
—
mA VDD = 1.4V
±22
mA
VDD = 6.0V
Power Supply
Supply Voltage
VDD
IQ
1.4
—
6.0
V
Quiescent Current per Amplifier
250
450
650
nA IO = 0, VDD = 5.0V
© 2010-2012 Microchip Technology Inc.
DS22257C-page 3
MCP6441/2/4
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND,
VCM = VDD/2, VOUT ≈ VDD/2, VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
9
65
3
—
—
—
kHz
°
G = +1 V/V
Slew Rate
SR
V/ms
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
5
—
—
—
µVp-p f = 0.1 Hz to 10 Hz
nV/√Hz f = 1 kHz
190
0.6
fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.4V to +6.0V and VSS = GND.
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Operating Temperature Range
Storage Temperature Range
TA
TA
-40
-65
—
—
+125
+150
°C
°C
Note 1
Thermal Package Resistances
Thermal Resistance, 5L-SC70
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-2x3 TDFN
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
θJA
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
—
331
220.7
211
—
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
149.5
52.5
95.3
100
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.2
Test Circuits
CF
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT (see Equation 1-1). Note that VCM is not the
circuit’s Common Mode voltage ((VP + VM)/2), and that
6.8 pF
RG
100 kΩ
RF
100 kΩ
V
OST includes VOS plus the effects (on the input offset
error, VOST) of the temperature, CMRR, PSRR and
AOL
VDD/2
VP
VDD
.
VIN+
CB1
100 nF
CB2
1 µF
EQUATION 1-1:
MCP6441
GDM = RF ⁄ RG
VCM = (VP + VDD ⁄ 2) ⁄ 2
VOST = VIN– – VIN+
VIN–
VOUT
VM
VOUT = (VDD ⁄ 2) + (VP – VM) + VOST(1 + GDM
)
RL
CL
RG
RF
1 MΩ
60 pF
100 kΩ
Where:
100 kΩ
GDM = Differential Mode Gain
(V/V)
(V)
CF
6.8 pF
VCM = Op Amp’s Common Mode
Input Voltage
VL
FIGURE 1-1:
Most Specifications.
AC and DC Test Circuit for
VOST = Op Amp’s Total Input Offset Voltage (mV)
DS22257C-page 4
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
35%
30%
25%
20%
15%
10%
5%
4000
3500
3000
2500
2000
1500
1000
500
VDD = 1.4V
Representative Part
1700 Samples
CM = VSS
TA = +125°C
A = +85°C
TA = +25°C
A = -40°C
V
T
T
0
0%
-500
Input Offset Voltage (mV)
Common mode input voltage (V)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.4V.
30%
25%
20%
15%
10%
5%
1000
800
1700 Samples
VCM = VSS
TA = -40°C to +125°C
VDD = 1.4V
600
400
VDD = 6.0V
200
0
-200
-400
Representative Part
-600
-800
-1000
0%
Output Voltage (V)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs.
Output Voltage.
2000
1600
1200
800
3000
2500
2000
1500
1000
500
TA = +125°C
Representative Part
VDD = 6.0V
Representative Part
TA = +85°C
TA = +25°C
TA = -40°C
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
400
0
-400
-800
-1200
-1600
-2000
0
-500
Power Supply Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 6.0V.
Power Supply Voltage.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 5
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
1,000
100
95
90
85
80
75
70
65
60
55
50
PSRR (VDD = 1.4V to 6.0V, VCM = VSS
)
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)
CMRR (VDD = 1.4V, VCM = -0.3V to 1.7V)
100
0.1
1
10
100
1k
10k
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
CMRR, PSRR vs. Ambient
vs. Frequency.
Temperature.
350
300
250
200
150
100
50
1000
VDD = 6.0V
100
10
1
Input Bias Current
f = 1 kHz
VDD = 6.0 V
Input Offset Current
0
25
45
65
85
105
125
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Bias, Offset Current
vs. Common Mode Input Voltage.
vs. Ambient Temperature.
100
1000
Representative Part
TA = +125°C
PSRR-
90
80
70
60
50
40
30
20
100
10
PSRR+
CMRR
TA = +85°C
c
VDD = 6.0V
1
0.1
1
10
100
1000
Frequency (Hz)
Common Mode Input Voltage (V)
FIGURE 2-9:
CMRR, PSRR vs.
FIGURE 2-12:
Input Bias Current vs.
Frequency.
Common Mode Input Voltage.
DS22257C-page 6
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
130
120
110
100
90
600
550
500
450
400
350
300
250
200
VDD = 6.0V
VDD = 1.4V
80
RL = 10 kΩ
VSS + 0.1V < VOUT < VDD - 0.1V
70
60
-50
-25
0
25
50
75
100 125
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-13:
Quiescent Current vs.
FIGURE 2-16:
DC Open-Loop Gain vs.
Ambient Temperature.
Power Supply Voltage.
700
600
500
400
300
200
100
0
130
VDD = 6.0V
120
110
100
90
VDD = 1.4V
TA = +125°C
T
T
A = +85°C
A = +25°C
80
Large Signal AOL
TA = -40°C
70
RL = 10kꢀ
60
0.00
0.05
0.10
0.15
0.20
0.25
Power Supply Voltage (V)
FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
DC Open-Loop Gain vs.
Power Supply Voltage.
Output Voltage Headroom.
120
0
18
16
14
12
10
8
90
80
70
60
50
40
30
20
10
0
Phase Margin
Open-Loop Gain
100
80
60
40
20
0
-30
-60
Open-Loop Phase
-90
-120
-150
-180
-210
Gain Bandwidth Product
VDD = 6.0V
6
4
2
0
VDD = 6.0V
-20
1m 10m0.1
1
10 100 1k10k 100k
-50 -25
0
25
50
75 100 125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-15:
Open-Loop Gain, Phase vs.
FIGURE 2-18:
Gain Bandwidth Product,
Frequency.
Phase Margin vs. Ambient Temperature.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 7
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
18
16
14
12
10
8
90
80
70
60
50
40
30
20
10
0
1000
100
10
Phase Margin
VDD - VOH @ VDD = 1.4V
VOL - VSS @ VDD = 1.4V
Gain Bandwidth Product
VDD - VOH @ VDD = 6.0V
OL - VSS @ VDD = 6.0V
6
V
1
4
VDD = 1.4V
RL = 10 kΩ
2
0
0.1
-50 -25
0
25
50
75 100 125
0.01
0.1
1
10
Ambient Temperature (°C)
Output Current (mA)
FIGURE 2-19:
Gain Bandwidth Product,
FIGURE 2-22:
Output Voltage Headroom
Phase Margin vs. Ambient Temperature.
vs. Output Current.
25
35
30
VDD - VOH @ VDD = 6.0V
20
15
10
5
VOL - VSS @ VDD = 6.0V
TA = -40°C
25
T
A = +25°C
TA = +85°C
20
15
10
5
T
A = +125°C
VDD - VOH @ VDD = 1.4V
OL - VSS @ VDD = 1.4V
V
0
0
-50
-25
0
25
50
75
100 125
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-20:
Output Short Circuit Current
FIGURE 2-23:
Output Voltage Headroom
vs. Power Supply Voltage.
vs. Ambient Temperature.
6
10
VDD = 6.0V
Falling Edge, VDD = 6.0V
5
4
3
2
1
0
Rising Edge, VDD = 6.0V
VDD = 1.4V
1
Falling Edge, VDD = 1.4V
Rising Edge, VDD = 1.4V
0.1
10
100
1k
10k
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-21:
Output Voltage Swing vs.
FIGURE 2-24:
Slew Rate vs. Ambient
Frequency.
Temperature.
DS22257C-page 8
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
6.0
5.5
5.0
VDD = 6.0V
4.5
G = -1 V/V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VDD = 6.0V
G = +1 V/V
Time (200 µs/div)
Time (2 ms/div)
FIGURE 2-25:
Small Signal Non-Inverting
FIGURE 2-28:
Large Signal Inverting Pulse
Pulse Response.
Response.
7.0
6.0
5.0
4.0
3.0
2.0
VDD = 6.0V
G = -1 V/V
VOUT
VIN
VDD = 6.0V
G = +2 V/V
1.0
0.0
-1.0
Time (2 ms/div)
Time (200 µs/div)
FIGURE 2-26:
Small Signal Inverting Pulse
FIGURE 2-29:
The MCP6441/2/4 Device
Response.
Shows No Phase Reversal.
1M
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100k
10k
1k
GN:
101 V/V
11 V/V
1 V/V
100
VDD = 6.0V
G = +1 V/V
10
1
1
10
100
1k
10k
Frequency (Hz)
Time (2 ms/div)
FIGURE 2-27:
Large Signal Non-Inverting
FIGURE 2-30:
Closed Loop Output
Pulse Response.
Impedance vs. Frequency.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 9
MCP6441/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.4V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 1 MΩ to VL and CL = 60 pF.
1m
150
140
130
120
110
100µ
10µ
1µ
100n
10n
TA = -40°C
A = +25°C
TA = +85°C
100
90
T
1n
100p
1
80
TA = +125°C
Input Referred
10p
1
70
1p
60
1k
10k
100
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
Input Voltage (V)
Frequency (Hz)
FIGURE 2-31:
Measured Input Current vs.
FIGURE 2-32:
Channel-to-Channel
Input Voltage (below VSS).
Separation vs. Frequency (MCP6442/4 only).
DS22257C-page 10
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
MCP6441
PIN FUNCTION TABLE
MCP6442
MCP6444
Symbol
Description
SC70-5,
SOT-23-5
SOIC,
SOIC,
TSSOP
2x3 TDFN
MSOP
1
1
2
1
2
1
2
VOUT, VOUTA Analog Output (op amp A)
4
VIN–, VINA
–
+
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
3
3
3
3
VIN+, VINA
VDD
5
8
8
4
—
—
—
—
—
—
2
5
5
5
VINB
VINB
VOUTB
VOUTC
VINC
VINC
VSS
+
Non-inverting Input (op amp B)
Inverting Input (op amp B)
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
6
6
6
-
7
7
7
—
—
—
4
—
—
—
4
8
9
-
10
11
12
13
14
—
+
—
—
—
—
—
—
—
—
—
—
—
9
VIND
+
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
VIND
-
VOUTD
EP
Exposed Thermal Pad (EP);
must be connected to VSS
3.1
Analog Output (V
)
3.3
Analog Inputs (V +, V -)
IN IN
OUT
The output pin is a low-impedance voltage source.
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
3.2
Power Supply Pins (V , V
)
SS
DD
3.4
Exposed Thermal Pad (EP)
The positive power supply (VDD) is 1.4V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
There is an internal connection between the Exposed
Thermal Pad (EP) and the VSS pin; they must be con-
nected to the same potential on the Printed Circuit
Board (PCB).
and VDD
.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
This pad can be connected to a PCB ground plane to
provide a larger heat sink. This improves the package
thermal resistance (θJA).
© 2010-2012 Microchip Technology Inc.
DS22257C-page 11
MCP6441/2/4
Notes:
DS22257C-page 12
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
4.0
APPLICATION INFORMATION
The MCP6441/2/4 op amp is manufactured using
Microchip’s state-of-the-art CMOS process, specifically
designed for low power applications.
VDD
4.1
Rail-to-Rail Input
4.1.1
PHASE REVERSAL
D1 D2
The MCP6441/2/4 op amp is designed to prevent
phase reversal, when the input pins exceed the supply
voltages. Figure 2-29 shows the input voltage
exceeding the supply voltage with no phase reversal.
V1
VOUT
MCP644X
V2
4.1.2
INPUT VOLTAGE LIMITS
FIGURE 4-2:
Inputs.
Protecting the Analog
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the voltages at the
input pins (see Section 1.1, Absolute Maximum
Ratings †).
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS); see Figure 2-31.
The Electrostatic Discharge (ESD) protection on the
inputs can be depicted as shown in Figure 4-1. This
structure was chosen to protect the input transistors
against many, but not all, over-voltage conditions, and
to minimize the input bias current (IB).
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of the amplifier, the circuit must limit the currents into
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
Bond
VDD
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
Pad
Bond
Pad
Bond
Pad
Input
Stage
VDD or VSS
.
VIN+
VIN–
VDD
Bond
Pad
VSS
D1 D2
R1
V1
V2
VOUT
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
MCP644X
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events that meet the spec are limited so that damage
does not occur.
R2
VSS – min(V1, V2)
2 mA
min(R1,R2) >
min(R1,R2) >
max(V1,V2) – VDD
2 mA
FIGURE 4-3:
Protecting the Analog
Inputs.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 13
MCP6441/2/4
Figure 4-5 gives the recommended RISO values for the
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
4.1.4
NORMAL OPERATION
The input stage of the MCP6441/2/4 op amp uses two
differential input stages in parallel. One operates at a
low Common Mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. The input offset voltage is
measured at VCM = VSS – 0.3V and VDD + 0.3V, to
ensure proper operation.
1M
The transition between the input stages occurs when
VCM is near VDD – 0.6V (see Figures 2-3 and 2-4). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
100k
GN:
1 V/V
2 V/V
10k
≥
5 V/V
4.2
Rail-to-Rail Output
1k
The output voltage range of the MCP6441/2/4 op amp
is VSS + 20 mV (minimum) and VDD – 20 mV (maxi-
mum) when RL = 10 kΩ is connected to VDD/2 and
VDD = 6.0V. Refer to Figures 2-22 and 2-23 for more
information.
10p
100p
1n
10n
0.1µ
1µ
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
for Capacitive Loads.
Recommended RISO Values
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6441/2/4 SPICE macro
model are very helpful.
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to the capacitive loads, all gains show
the same general behavior.
4.4
Supply Bypass
The MCP6441/2/4 op amp’s power supply pin (VDD for
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good high
frequency performance. It can use a bulk capacitor
(i.e., 1 µF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other analog parts.
When driving large capacitive loads with the
MCP6441/2/4 op amp (e.g., > 100 pF when
G = +1 V/V), a small series resistor at the output (RISO
in Figure 4-4) improves the feedback loop’s phase mar-
gin (stability) by making the output load resistive at
higher frequencies. The bandwidth will be generally
lower than the bandwidth with no capacitance load.
4.5
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6441/2/4 op amp’s bias current at +25°C (±1 pA,
typical).
–
RISO
VOUT
MCP644X
+
VIN
CL
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
DS22257C-page 14
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
4.6
Application Circuits
4.6.1
BATTERY CURRENT SENSING
The MCP6441/2/4 op amp’s Common Mode Input
Range, which goes 0.3V beyond both supply rails,
supports their use in high-side and low-side battery
current sensing applications. The low quiescent current
(450 nA, typical) helps prolong battery life, and the
rail-to-rail output supports detection of low currents.
Guard Ring
VIN– VIN+
VSS
Figure 4-7 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
Mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, within its Maximum Output Voltage
Swing specification.
FIGURE 4-6:
for Inverting Gain.
Example Guard Ring Layout
1. Non-inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
IDD
To load
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common Mode input voltage.
1.4V
to
6.0V
VDD
MCP6441
1 MΩ
10Ω
VOUT
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
100 kΩ
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
VDD – VOUT
IDD = -----------------------------------------
(10 V/V) ⋅ (10Ω)
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
FIGURE 4-7:
Battery Current Sensing.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 15
MCP6441/2/4
4.6.2
PRECISION HALF-WAVE
RECTIFIER
4.6.3
INSTRUMENTATION AMPLIFIER
The MCP6441/2/4 op amp is well suited for condition-
ing sensor signals in battery-powered applications.
Figure 4-9 shows a two op amp instrumentation
amplifier, using the MCP6441/2/4 device, that works
well for applications requiring rejection of Common
Mode noise at higher gains. The reference voltage
(VREF) is supplied by a low-impedance source. In sin-
gle supply applications, VREF is typically VDD/2.
The precision half-wave rectifier, which is also known
as a super diode, is a configuration obtained with an
operational amplifier in order to have a circuit behaving
like an ideal diode and rectifier. It effectively cancels the
forward voltage drop of the diode in such a way that
very low level signals can still be rectified, with minimal
error. This can be useful for high-precision signal
processing. The MCP6441/2/4 op amp has high input
impedance, low input bias current and rail-to-rail
input/output, which makes this device suitable for
precision rectifier applications.
RG
R1
R2
R2
R1
VREF
VOUT
Figure 4-8 shows a precision half-wave rectifier and its
transfer characteristic. The rectifier’s input impedance
is determined by the input resistor R1. To avoid the
loading effect, it must be driven from a low-impedance
source.
V2
V1
1/2 MCP6442
1/2 MCP6442
When VIN is greater than zero, D1 is OFF, D2 is ON, and
VOUT is zero. When VIN is less than zero, D1 is ON, D2
is OFF, and VOUT is the VIN with an amplification of
-R2/R1.
R1 2R1
⎛
⎞
VOUT = (V1 – V2) 1 + ----- + --------- + VREF
⎝
⎠
R2 RG
The rectifier circuit shown in Figure 4-8 has the benefit
that the op amp never goes in saturation, so the only
thing affecting its frequency response is the
amplification and the gain bandwidth product.
.
FIGURE 4-9: Two Op Amp
Instrumentation Amplifier.
R2
D2
VIN
R1
VOUT
MCP6441
D1
Precision Half-Wave Rectifier
VOUT
-R2/R1
VIN
Transfer Characteristic
FIGURE 4-8:
Precision Half-Wave
Rectifier.
DS22257C-page 16
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
5.4
Analog Demonstration and
Evaluation Boards
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6441/2/4 op amp.
Microchip offers
a
broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
5.1
SPICE Macro Model
a
complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at
www.microchip.com/analogtools.
The latest SPICE macro model for the MCP6441/2/4
op amp is available on the Microchip web site at
www.microchip.com. The model was written and tested
in the official OrCAD (Cadence®) owned PSpice®. For
the other simulators, translation may be required.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current and resistance of the op amp, but it
also covers the temperature and the noise effects on
the behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot ensure it will match the actual op
amp performance.
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
5.5
Application Notes
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes, and are
recommended as supplemental reference resources.
• ADN003 – “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722 – “Operational Amplifier Topologies and
DC Specifications”, DS00722
®
5.2
FilterLab Software
• AN723 – “Operational Amplifier AC Specifications
and Applications”, DS00723
Microchip’s FilterLab software is an innovative software
tool that simplifies analog active filter design using op
amps. Available at no cost from the Microchip web site
at www.microchip.com/filterlab, the FilterLab design
tool provides full schematic diagrams of the filter circuit
with component values. It also outputs the filter circuit
in SPICE format, which can be used with the macro
model to simulate the actual filter performance.
• AN884 – “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990 – “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177 – “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228 – “Op Amp Precision Design: Random
Noise”, DS01228
5.3
Microchip Advanced Part Selector
(MAPS)
• AN1297 – “Microchip’s Op Amp SPICE Macro
Models”, DS01297
MAPS is a software tool that helps semiconductor
professionals efficiently identify the Microchip devices
that fit a particular design requirement. Available at no
• AN1332: “Current Sensing Circuit Concepts and
Fundamentals”’ DS01332
cost
from
the
Microchip
website
at
These application notes and others are listed in the
design guide:
www.microchip.com/ maps, the MAPS is an overall
selection tool for Microchip’s product portfolio that
includes Analog, Memory, MCUs and DSCs. Using this
tool, you can define a filter to sort features for a
parametric search of devices and export side-by-side
technical comparison reports. Helpful links are also
provided for Data Sheets, Purchase and Sampling of
Microchip parts.
• “Signal Chain Design Guide”, DS21825
© 2010-2012 Microchip Technology Inc.
DS22257C-page 17
MCP6441/2/4
NOTES:
DS22257C-page 18
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
Example:
DG25
5-Lead SC70 (MCP6441)
5-Lead SOT-23 (MCP6441)
Example:
WU25
XXNN
8-Lead MSOP (MCP6442)
Example:
6442E
211256
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
e
3
e
3
*
)
Note: In the event the full Microchip part number cannot be marked on one line, it
will be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 19
MCP6441/2/4
Example:
8-Lead SOIC (150 mil) (MCP6442)
MCP6442E
SN^1211
e3
256
NNN
8-Lead TDFN (2x3x0.75 mm)(MCP6442)
Example:
AAX
211
25
14-Lead SOIC (150 mil) (MCP6444)
Example:
MCP6444
E/SL
e
3
1211256
Example:
14-Lead TSSOP (MCP6444)
XXXXXXXX
YYWW
6444E/ST
1211
256
NNN
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS22257C-page 20
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
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© 2010-2012 Microchip Technology Inc.
DS22257C-page 21
MCP6441/2/4
5-Lead Plastic Small Outline Transistor (LT) [SC70]
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DS22257C-page 22
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
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© 2010-2012 Microchip Technology Inc.
DS22257C-page 23
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 24
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 25
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 26
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 27
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 28
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 29
MCP6441/2/4
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DS22257C-page 30
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 31
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 32
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
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© 2010-2012 Microchip Technology Inc.
DS22257C-page 33
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 34
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 35
MCP6441/2/4
ꢜꢔꢊꢃꢝ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ
ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ
DS22257C-page 36
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 37
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22257C-page 38
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010-2012 Microchip Technology Inc.
DS22257C-page 39
MCP6441/2/4
NOTES:
DS22257C-page 40
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
APPENDIX A: REVISION HISTORY
Revision C (April 2012)
The following is the list of modifications:
1. Added new package type (8-Lead 2x3 TDFN)
for MCP6442, and the related information
throughout the document.
2. Updated Table 3-1 with TDFN package pinouts.
3. Updated Section 6.0, Packaging Information.
4. Updated the Product Identification SysteM
section.
Revision B (March 2011)
The following is the list of modifications:
1. Added the MCP6442 and MCP6444 package
information.
2. Updated the ESD protection value on all pins in
Section 1.1, Absolute Maximum Ratings †.
3. Added Figure 2-32.
4. Updated Table 3-1.
5. Updated the package markings information and
drawings.
6. Updated the Product Identification SysteM
section.
Revision A (September 2010)
• Original Release of this Document.
© 2010-2012 Microchip Technology Inc.
DS22257C-page 41
MCP6441/2/4
NOTES:
DS22257C-page 42
© 2010-2012 Microchip Technology Inc.
MCP6441/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
T
-X
/XX
a)
b)
c)
d)
e)
f)
MCP6441T-E/LT:
Tape and Reel,
Extended Temperature
5LD SC70 Package
Tape and Reel,
Extended Temperature
5LD SOT-23 Package
Tape and Reel Temperature Package
Range
MCP6441T-E/OT:
Device:
MCP6441T:
MCP6442:
MCP6442T:
MCP6444:
MCP6444T:
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
MCP6442T-E/MNY: Tape and Reel,
Extended Temperature
Dual Op Amp (Tube)
(SOIC, MSOP)
Dual Op Amp (Tape and Reel)
(SOIC, MSOP, 2x3 TDFN)
Quad Op Amp (Tube)
(SOIC, TSSOP)
8LD 2x3 TDFN Package
Tape and Reel,
Extended Temperature
8LD MSOP Package
Tube,
Extended Temperature
8LD MSOP Package
Tube,
Extended Temperature
8LD SOIC Package
Tube,
Extended Temperature
8LD SOIC Package
Tape and Reel,
Extended Temperature
14LD SOIC Package
Tube,
Extended Temperature
14LD SOIC Package
Tape and Reel,
Extended Temperature
14LD TSSOP Package
Tube,
MCP6442T-E/MS:
MCP6442-E/MS:
MCP6442T-E/SN:
MCP6442-E/SN:
MCP6444T-E/SL:
MCP6444-E/SL:
MCP6444T-E/ST:
MCP6444-E/ST:
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
Temperature
Range:
E
= -40°C to +125°C (Extended)
Package:
LT
=
=
=
=
=
=
=
Plastic Package (SC70), 5-lead
Thin Plastic Dual Flat (2x3 TDFN), 8-lead
Plastic MSOP, 8-lead
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic SOIC, (3.99 mm body), 14-lead
Plastic SOIC, (3.99 mm body), 8-lead
Plastic TSSOP (4.4 mm body), 14-lead
g)
h)
i)
MNY*
MS
OT
SL
SN
ST
* Y = Nickel palladium gold manufacturing designator. Only
available on the TDFN package.
j)
k)
Extended Temperature
14LD TSSOP Package
© 2010-2012 Microchip Technology Inc.
DS22257C-page 43
MCP6441/2/4
NOTES:
DS22257C-page 44
© 2010-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62076-244-8
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
== ISO/TS 16949 ==
© 2010-2012 Microchip Technology Inc.
DS22257C-page 45
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Web Address:
www.microchip.com
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Osaka
Tel: 81-66-152-7160
Fax: 81-66-152-9310
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Korea - Seoul
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Los Angeles
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-330-9305
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
China - Xiamen
Tel: 905-673-0699
Fax: 905-673-6509
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
11/29/11
DS22257C-page 46
© 2010-2012 Microchip Technology Inc.
相关型号:
MCP6442T-E/MS
DUAL OP-AMP, 4500 uV OFFSET-MAX, 9 MHz BAND WIDTH, PDSO8, PLASTIC, MSOP, 8 PIN
MICROCHIP
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