MCP6566T-E/OTVAO_技术文档

MCP6566/6R/6U/7/9

1.8V Low-Power Open-Drain Output Comparator

Features:

Description:

• Propagation Delay at 1.8 V_DD

:

The Microchip MCP6566/6R/6U/7/9 family of open-

drain output comparators are offered in single, dual and

quad configurations.

56 ns (typical) High-to-Low

• Low Quiescent Current: 100 µA (typical)

• Input Offset Voltage: ±3 mV (typical)

• Rail-to-Rail Input: V_SS- 0.3V to V_DD+ 0.3V

• Open-Drain Output

These comparators are optimized for low-power 1.8V,

single-supply applications with greater than rail-to-rail

input operation. The internal input hysteresis eliminates

output switching due to internal input noise voltage,

reducing current draw.

• Wide Supply Voltage Range: 1.8V to 5.5V

• Available in Single, Dual and Quad

• Packages: SC70, SOT-23-5, SOIC, MSOP, TSSOP

The open-drain output of the MCP6566/6R/6U/7/9 fam-

ily requires a pull-up resistor. It supports pull-up volt-

ages that are above and below V_DD, which can be used

to level shift. The output toggle frequency can reach a

typical of 4 MHz (typical) while limiting supply current

surges and dynamic power consumption during

switching.

Typical Applications:

• Laptop Computers

• Mobile Phones

• Hand-held Electronics

• RC Timers

This family operates with single supply voltage of 1.8V

to 5.5V while drawing less than 100 µA/comparator of

quiescent current (typical).

• Alarm and Monitoring Circuits

• Window Comparators

• Multivibrators

Package Types

Design Aids:

MCP6566

MCP6567

• Microchip Advanced Part Selector (MAPS)

• Analog Demonstration and Evaluation Boards

• Application Notes

SOT-23-5, SC70-5

SOIC, MSOP

V

OUT

V

1

2

3

4

1

2

3

5

8

7

6

5

OUTA

DD

V

+

-

OUTB

-INB

SS

-INA

• SPICE Macro Model

+IN

4

-IN

+

-

+INA

+INB

V

SS

Related Device:

Push-Pull Output: MCP6561/1R/1U/2/4

MCP6566R

SOT-23-5

MCP6569

Typical Application

SOIC, TSSOP

OUT

V

SS

1

2

3

5

OUTA

14

OUTD

+3V_PU

V

+

2

3

4

-

+

DD

-

13 -IND

-INA

+5V_DD

+IN

4

-IN

+IND

+INA

12

11

10

9

V_IN

V

DD

SS

V_OUT

+INC

-INC

+INB

-INB

5

6

7

V_DD

-

+

MCP656X

MCP6566U

OUTB

8

OUTC

SOT-23-5

R₂

V_DD

5

V_IN+

V_SS

1

+

2

3

-

R_F

R₃

V_IN–

OUT

4

 2009-2014 Microchip Technology Inc.

DS20002143E-page 1

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 2

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied. Expo-

sure to maximum rating conditions for extended periods may

affect device reliability.

1.0

1.1

ELECTRICAL

CHARACTERISTICS

Maximum Ratings †

V

- V ....................................................................... 6.5V

SS

DD

Open-Drain Output.............................................V + 10.5V

SS

†† See Section 4.1.2 “Input Voltage and Current Limits”

All other inputs and outputs...........V – 0.3V to V + 0.3V

SS

DD

Analog Input (V ) †† ....................V – 1.0V to V + 1.0V

IN

SS

DD

Difference Input voltage ......................................|V - V

|

SS

DD

Output Short Circuit Current .................................... ±25 mA

Current at Input Pins .................................................. ±2 mA

Current at Output and Supply Pins .......................... ±50 mA

Storage temperature ................................... -65°C to +150°C

Ambient temp. with power applied .............. -40°C to +125°C

Junction temp............................................................ +150°C

ESD protection on all pins (HBM/MM)4kV/300V

DC CHARACTERISTICS

Electrical Characteristics: Unless otherwise indicated: V = +1.8V to +5.5V, V = GND, T = +25°C, V + = V /2, V - = V

,

DD

SS

A

IN

DD

IN

SS

and R

= 20 k to V = V (see Figure 1-1).

PU DD

Pull-Up

Parameters

Symbol

Min.

Typ.

Max.

Units

Conditions

Power Supply

Supply Voltage

V

1.8

60

63

—

100

70

5.5

130

—

V

DD

Quiescent Current per comparator

Power Supply Rejection Ratio

Input

I

µA

dB

I

= 0

= V

Q

OUT

PSRR

V

CM

SS

Input Offset Voltage

Input Offset Drift

V

-10

—

1.0

—

3

2

1

1

+10

—

mV

V

= V (Note 1)

OS

CM

SS

V /T

µV/°C

pA

= V

OS

SS

Input Offset Current

Input Bias Current

I

—

= V

OS

SS

I

—

pA

T = +25°C, V - = V /2

A IN DD

B

60

1500

—

pA

T = +85°C, V - = V /2

A IN DD

5000

5.0

—

pA

T = +125°C, V - = V /2

A IN DD

Input Hysteresis Voltage

V

mV

V

= V (Notes 1, 2)

HYST

CM

SS

Input Hysteresis Linear Temp. Co.

Input Hysteresis Quadratic Temp. Co.

Common-Mode Input Voltage Range

TC

10

0.3

—

µV/°C

1

2

—

µV/°C

V

0.2

V

+ 0.2

V

= 1.8V

= 5.5V

CMR

SS

DD

CM

0.3

—

+ 0.3

V

Common-Mode Rejection Ratio

CMRR

54

66

63

65

—

dB

= -0.3V to V +0.3V, V = 5.5V

DD DD

50

54

—

dB

= V /2 to V +0.3V, V = 5.5V

DD DD DD

dB

= -0.3V to V /2, V = 5.5V

DD DD

13

Common Mode Input Impedance

Differential Input Impedance

Z

10 ||4

||pF

CM

13

Z

10 ||2

DIFF

Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the

input-referred trip points.

2

2:

3: Limit the output current to Absolute Maximum Rating of 50 mA.

4: The pull-up voltage for the open drain output V can be as high as the absolute maximum rating of 10.5V. In this

V

at different temperatures is estimated using V

(T ) = V

+ (T - 25°C) TC + (T - 25°C) TC .

HYST

A

HYST @ +25°C

A

1

A

2

PULL_UP

case, I

can be higher than 1 µA (see Figure 2-30).

OH_leak

 2009-2014 Microchip Technology Inc.

DS20002143E-page 3

MCP6566/6R/6U/7/9

DC CHARACTERISTICS (CONTINUED)

Electrical Characteristics: Unless otherwise indicated: V = +1.8V to +5.5V, V = GND, T = +25°C, V + = V /2, V - = V ,

SS

DD

SS

A

IN

DD

IN

and R

= 20 k to V = V (see Figure 1-1).

Pull-Up

PU DD

Parameters

Symbol

Min.

Typ.

Max.

Units

Conditions

Push-Pull Output

Pull-up Voltage

V

1.6

—

±30

8

5.5

V

PULL_UP

High-Level Output Voltage

V

(see Figure 1-1) (Notes 3, 4)

OH

OH_leak

PULL_UP

High-Level Output Current Leakage

Low-Level Output Voltage

I

1

µA

V

Note 4

V

0.6

—

I

= 3 mA/8 mA @ V = 1.8V/5.5V

OUT DD

OL

SC

Short Circuit Current (Notes 3)

Output Pin Capacitance

I

mA

pF

Not to exceed Absolute Max. Rating

C

—

OUT

Note 1: The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the

input-referred trip points.

2

2:

3: Limit the output current to Absolute Maximum Rating of 50 mA.

4: The pull-up voltage for the open drain output V can be as high as the absolute maximum rating of 10.5V. In this

V

at different temperatures is estimated using V

(T ) = V

+ (T - 25°C) TC + (T - 25°C) TC .

HYST

A

HYST @ +25°C

A

1

A

2

PULL_UP

case, I

can be higher than 1 µA (see Figure 2-30).

OH_leak

AC CHARACTERISTICS

Electrical Characteristics: Unless otherwise indicated,: Unless otherwise indicated,: V = +1.8V to +5.5V, V = GND,

DD

SS

T = +25°C, V

= V /2, V = V , R

= 20 k to V = V , and C = 25 pf (see Figure 1-1).

A

IN+

DD

IN-

SS

Pull-Up

PU

DD

L

Parameters

Symbol Min.

Typ.

Max.

Units

Conditions

Propagation Delay

High-to-Low,100 mV Overdrive

t

—

56

34

80

ns

V

= V /2, V = 1.8V

DD DD

PHL

CM

= V /2, V = 5.5V

CM

DD

Output

Fall Time

t

—

20

4

—

ns

F

Maximum Toggle Frequency

f

MHz

V

= 5.5V

= 1.8V

TG

DD

2

DD

Input Voltage Noise

E

350

µV_P-P10 Hz to 10 MHz (Note 1)

NI

Note 1: ENI is based on SPICE simulation.

2: Rise time t and t depend on the load (R and C ). These specification are valid for the specified load only.

R

PLH

L

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated: V = +1.8v to +5.5v and V = GND.

DD

SS

Parameters

Temperature Ranges

Symbol

Min.

Typ.

Max.

Units

Conditions

Specified Temperature Range

Operating Temperature Range

Storage Temperature Range

Thermal Package Resistances

Thermal Resistance, SC70-5

Thermal Resistance, SOT-23-5

Thermal Resistance, 8L-MSOP

Thermal Resistance, 8L-SOIC

Thermal Resistance, 14L-SOIC

Thermal Resistance, 14L-TSSOP

T

-40

-65

—

+125

+150

°C

A

T

A

T

A



—

331

201

211

149

91

—

°C/W

JA

100

DS20002143E-page 4

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

1.2

Test Circuit Configuration

This test circuit configuration is used to determine the

AC and DC specifications.

V_DD

MCP656X

V_PU= V_DD

200 k

R_PU

20 k

I_OUT

V_OUT

25 pF

V_IN= V_SS

V_SS= 0V

FIGURE 1-1:

AC and DC Test Circuit for

the Open-Drain Output Comparators.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 5

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 6

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

2.0

TYPICAL PERFORMANCE CURVES

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (i.e., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

30%

50%

V_DD= 1.8V

V_DD= 5.5V

_CM= V_SS

Avg. = -0.9 mV

StDev = 2.1 mV

3588 units

V_DD= 1.8V

V_CM= V_SS

Avg. = -0.1 mV

StDev = 2.1 mV

3588 units

Avg. = 3.4 mV

StDev = 0.2 mV

3588 units

Avg. = 3.6 mV

StDev = 0.1 mV

3588 units

25%

20%

15%

10%

5%

V

40%

30%

20%

10%

0%

-10 -8 -6 -4 -2

0

2

4

6

8

10

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

_HYST(mV)

V

_OS(mV)

V

FIGURE 2-1:

Input Offset Voltage.

FIGURE 2-4:

Input Hysteresis Voltage.

60%

V_CM= V_SS

Avg. = 0.9 µV/°C

StDev = 6.6 µV/°C

1380 Units

V_DD= 1.8V

V_DD= 5.5V

50%

40%

30%

20%

10%

0%

50%

40%

30%

20%

10%

0%

Avg. = 12 µV/°C

StDev = 0.6 µV/°C

Avg. = 10.4 µV/°C

StDev = 0.6 µV/°C

T_A= -40°C to +125°C

1380 Units

T_A= -40°C to 125°C

V_CM= V_SS

-60 -48 -36 -24 -12

0

12 24 36 48 60

0

2

4

6

8

10 12 14 16 18 20

V

_OSDrift (µV/°C)

V_HYSTDrift, TC1 (µV/°C)

FIGURE 2-2:

Input Offset Voltage Drift.

FIGURE 2-5:

Input Hysteresis Voltage

Drift – Linear Temp. Co. (TC1).

7.0

30%

V_DD= 5.5V

V_IN+ = V_DD/2

6.0

5.0

4.0

3.0

2.0

1.0

0.0

-1.0

V_DD= 1.8V

V_DD= 5.5V

Avg. = 0.3 µV/°C²

Avg. = 0.25 µV/°C²

StDev = 0.2 µV/°C²

StDev = 0.1 µV/°C²

20%

V_OUT

V_IN

-

1380 Units

10%

T_A= -40°C to +125°C

V_CM= V_SS

0%

-0.50 -0.25 0.00

0.25

0.50

0.75

1.00

Time (3 µs/div)

V

_HYSTDrift, TC2 (µV/°C²)

FIGURE 2-3:

Input vs. Output Signal, No

FIGURE 2-6:

Input Hysteresis Voltage

Phase Reversal.

Drift – Quadratic Temp. Co. (TC2).

 2009-2014 Microchip Technology Inc.

DS20002143E-page 7

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

3.0

2.0

5.0

4.0

3.0

2.0

1.0

V_CM= V_SS

V_DD= 5.0V

V_DD= 1.8V

1.0

0.0

-1.0

-2.0

-3.0

V_DD= 1.8V

V_DD= 5.5V

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

Temperature (°C)

FIGURE 2-7:

Input Offset Voltage vs.

FIGURE 2-10:

Input Hysteresis Voltage vs.

Temperature.

4.0

5.0

4.0

3.0

2.0

V_DD= 1.8V

T_A= +125°C

T_A= +85°C

2.0

0.0

T_A= +25°C

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= -40°C

-2.0

V_DD= 1.8V

-4.0

1.0

-0.3 0.0

-0.3 0.0 0.3 0.6

0.9 1.2 1.5 1.8 2.1

_CM(V)

0.3

0.6

0.9

1.2

1.5

1.8

2.1

V

V_CM(V)

FIGURE 2-8:

Input Offset Voltage vs.

FIGURE 2-11:

Input Hysteresis Voltage vs.

Common-mode Input Voltage.

3.0

5.0

4.0

V_DD= 5.5V

2.0

1.0

T_A= -40°C

T_A= +25°C

0.0

3.0

T_A= -40°C

-1.0

-2.0

-3.0

T_A= +25°C

T_A= +85°C

T_A= +125°C

2.0

T_A= +85°C

T_A= +125°C

V_DD= 5.5V

1.0

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

-0.5

0.5

1.5

2.5

3.5

4.5

5.5

V_CM(V)

FIGURE 2-9:

Input Offset Voltage vs.

FIGURE 2-12:

Input Hysteresis Voltage vs.

Common-mode Input Voltage.

DS20002143E-page 8

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

3.0

2.0

5.0

4.0

3.0

2.0

1.0

T_A= +125°C

T_A= +85°C

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= +125°C

1.0

T_A= +25°C

T_A= -40°C

0.0

-1.0

-2.0

-3.0

1.5

2.5

3.5

_DD(V)

4.5

5.5

1.5

2.5

3.5

4.5

5.5

V

V_DD(V)

FIGURE 2-13:

Input Offset Voltage vs.

FIGURE 2-16:

Input Hysteresis Voltage vs.

Supply Voltage vs. Temperature.

50%

140.0

120.0

100.0

80.0

V_DD= 5.5V

V_DD= 1.8V

40%

Avg. = 97 µA

StDev= 4 µA

1794 units

Avg. = 88 µA

StDev= 4 µA

1794 units

30%

60.0

20%

10%

0%

T_A= -40°C

T_A= +25°C

40.0

T_A= +85°C

T_A= +125°C

20.0

0.0

60

70

80

90

100 110 120 130

0.0

1.0

2.0

3.0

V_DD(V)

4.0

5.0

6.0

I

_Q(µA)

FIGURE 2-14:

Quiescent Current.

FIGURE 2-17:

Quiescent Current vs.

Supply Voltage vs. Temperature.

130

V_DD= 1.8V

V_DD= 5.5V

120

110

100

90

110

100

90

Sweep V_IN+,V_IN- = V_DD/2

Sweep V_IN- ,V_IN+= V_DD/2

80

70

60

-0.5

0.0

0.5

1.0

1.5

2.0

2.5

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V_CM(V)

FIGURE 2-15:

Quiescent Current vs.

FIGURE 2-18:

Quiescent Current vs.

Common-mode Input Voltage.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 9

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

150

125

100

75

150

125

100

75

I_DDSpike near V_PU= 0.9V

V_DD= 5.5 V

V_DD= 4.5 V

V_DD= 3.5 V

V_DD= 5.5V

V_DD= 4.5V

V_DD= 3.5V

V_DD= 2.5 V

V_DD= 2.0 V

V_DD= 1.8 V

V_DD= 2.5V

V

_DD= 2.0V

_DD= 1.8V

50

-4.5

-2.5

-0.5

1.5

3.5

5.5

7.5

9.5

0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5

_PU(V)

V

V_PU- V_DD(V)

FIGURE 2-19:

Quiescent Current vs.

FIGURE 2-22:

Quiescent Current vs.

Pull-up Voltage.

Pull-up to Supply Voltage Difference.

400

100,000

0dB Output Attenuation

V_DD= 5.5V

100 mV Over-Drive

V_CM= V_DD/2

R_L= Open

T_A

=

350

300

250

200

150

100

50

10,000

1,000

100

10

T_A= +85°C

T_A= +25°C

V_DD= 1.8V

1

1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5

_PU(V)

10

100

1k

10k

100k

1M

10M

1000 10000 100000 100000 1E+07

V

Toggle Frequency (Hz)

0

FIGURE 2-20:

Quiescent Current vs.

FIGURE 2-23:

Output Leakage Current vs.

Toggle Frequency.

Pull-up Voltage.

1000

V_DD= 1.8V

V_DD= 5.5V

800

600

400

200

0

800

600

400

200

0

T_A= 1+2152°5C°C

T_A= +85°C

T_A= +25°C

T_A= -40°C

T_A= +125°C

T_A= +85°C

T_A= +25°C

T_A= -40°C

0.0

3.0

6.0

9.0

12.0

15.0

0

5

10

15

20

25

I

_OUT(mA)

I_OUT(mA)

FIGURE 2-21:

Output Headroom vs.

FIGURE 2-24:

Output Headroom vs.

Output Current.

DS20002143E-page 10

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

50%

40%

30%

20%

10%

0%

50%

40%

30%

20%

10%

0%

V_DD= 5.5V

100mV Over-Drive

V_CM= V_DD/2

V_DD= 1.8V

100 mV Over-Drive

V_CM= V_DD/2

t_PHL

Avg. = 33 ns

StDev= 1 ns

198 units

t_PHL

Avg. = 54.4 ns

StDev= 2 ns

198 units

30 35 40 45 50 55 60 65 70 75 80

Prop. Delay (ns)

30 35 40 45 50 55 60 65 70 75 80

Prop. Delay (ns)

FIGURE 2-25:

High-to-Low Propagation

FIGURE 2-28:

High-to-Low Propagation

Delays.

260

210

160

110

60

80

100 mV Over-Drive

V_CM= V_DD/2

70

60

50

40

30

20

t_PHL, V_DD= 1.8V

t_PHL, V_DD= 5.5V

10

1

10

100

1000

-50

-25

0

25

50

75

100

125

Temperature (°C)

Over-Drive (mV)

FIGURE 2-26:

Propagation Delay vs. Input

FIGURE 2-29:

Propagation Delay vs.

Over-Drive.

Temperature.

120

80

140

120

100

80

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= +125°C

V_CM= V_DD/2

40

t_PHL, 10 mV Over-Drive

0

-40

-80

-120

T_A= -40°C

T_A= +25°C

T_A= +85°C

T_A= +125°C

60

t_PHL, 100 mV Over-Drive

40

20

1.5

2.5

3.5

4.5

5.5

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V

_DD(V)

V_DD(V)

FIGURE 2-27:

Propagation Delay vs.

FIGURE 2-30:

Short Circuit Current vs.

Supply Voltage.

Supply Voltage vs. Temperature.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 11

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

80

70

60

50

40

30

20

80

70

60

50

40

30

20

V_DD= 1.8V

100 mV Over-Drive

V_DD= 5.5V

100 mV Over-Drive

t_PHL

0.00

0.50

1.00

1.50

2.00

0.0

1.0

2.0

3.0

4.0

5.0

6.0

V

_CM(V)

V

_CM(V)

FIGURE 2-31:

Propagation Delay vs.

FIGURE 2-34:

Propagation Delay vs.

Common-mode Input Voltage.

1000

10000

100 mV Over-Drive

V_CM= V_DD/2

100mV Over-Drive

V_CM= V_DD/2

100

V_DD= 1.8V, t_PHL

1000

100

10

t_PLH

10

1

V_DD= 5.5V, t_PHL

t_PHL

0.1

0.01

0.001 0.01

0.1

100

1

10

100

1000

1

10

1000 10000 100000 1E+06

0.1

1.0

10.0

100.0

Capacitive Load (nf)

R_PU(kΩ)

FIGURE 2-32:

Capacitive Load.

Propagation Delay vs.

FIGURE 2-35:

Pull-up Resistor.

Propagation Delay vs.

10m

1E+11

10000

100 mV Over-Drive

V_CM= V_DD/2

1E+10m9

t_PLH,V_DD= 5.5V

10µ

1E+07

1000

100

10

100n

1E+05

T_A= -40°C

T_A= +25°C

T_A= +85°C

t_PLH,V_DD= 1.8V

t_PHL,V_DD= 1.8V

1n

1E+03

T_A= +125°C

10p

1E+01

t_PLH,V_DD= 5.5V

0.1p

1E-01

-0.8

-0.6

-0.4

-0.2

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

_PU(V)

Input Voltage (V)

V

FIGURE 2-33:

Input Bias Current vs. Input

FIGURE 2-36:

Propagation Delay vs.

Voltage vs. Temperature.

Pull-up Voltage.

DS20002143E-page 12

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

80

78

76

74

72

70

30%

20%

10%

0%

V_CM= -0.2V to V_DD+ 0.2V

V_CM= V_DD/2 to V_DD+ 0.2V

Avg. = 0.7 mV

StDev= 1 mV

Input Referred

Avg. = 0.6 mV

StDev= 0.1 mV

V_CM= V_SS

V_DD= 1.8V to 5.5V

PSRR

CMRR

V_CM= -0.2V to V_DD/2

Avg. = 0.5 mV

StDev= 0.1 mV

V_DD= 1.8V

3588 units

V_CM= -0.3V to V_DD+ 0.3V

V_DD= 5.5V

-50

-25

0

25

50

75

100

125

-5 -4 -3 -2 -1

0

1

2

3

4

5

Temperature (°C)

CMRR (mV/V)

FIGURE 2-37:

Common-mode Rejection

FIGURE 2-40:

Common-mode Rejection

Ratio and Power Supply Rejection Ratio vs.

Temperature.

Ratio (CMRR).

30%

V_CM= -0.3V to V_DD+ 0.3V

Avg. = 0.1 mV

StDev= 0.4 mV

V_CM= V_DD/2 to V_DD+ 0.3V

V_CM= V_SS

Avg. = 0.03 mV

StDev= 0.7 mV

Avg. = 200 µV/V

StDev= 94 µV/V

3588 units

25%

20%

15%

10%

5%

20%

10%

0%

V_CM= -0.3V to V_DD/2

Avg. = 0.2 mV

StDev= 0.4 mV

V_DD= 5.5V

3588 units

0%

-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5

CMRR (mV/V)

-600

-400

-200

0

200

400

600

PSRR (µV/V)

FIGURE 2-38:

Power Supply Rejection

FIGURE 2-41:

Common-mode Rejection

Ratio (PSRR).

Ratio (CMRR).

1000

10000

V_DD= 5.5V

I_B@ T_A= +125°C

1000

100

10

I_B@ T_A= +85°C

100

I_B

10

1

|I_OS|@ T_A= +125°C

|I_OS|@ T_A= +85°C

0.1

|I_OS|

0.01

0.001

0.1

25

50

75

100

125

0

1

2

3

4

5

6

Temperature (°C)

V_CM(V)

FIGURE 2-39:

Input Offset Current and

FIGURE 2-42:

Input Offset Current and

Input Bias Current vs. Temperature.

Input Bias Current vs. Common-mode Input

Voltage vs. Temperature.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 13

MCP6566/6R/6U/7/9

Note: Unless otherwise indicated, V_DD= +1.8V to +5.5V, V_SS= GND, T_A= +25°C, V_IN+ = V_DD/2, V_IN– = GND,

R_L= 20 k to V_PU= V_DD, and C_L= 25 pF.

10000

V_DD= 5.5V

V_IN+= 2Vpp (sine)

1000

100

10

1

0.1

1k

1000

10M

10000 100000 100000 1E+07

100

10k

100k

1M

100

Input Frequency (Hz)

0

FIGURE 2-43:

Output Jitter vs. Input

Frequency.

DS20002143E-page 14

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

3.0

PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

MCP6566 MCP6566R MCP6566U MCP6567 MCP6569

Symbol

Description

SC70-5,

SOT-23-5

MSOP,

SOIC

SOIC,

TSSOP

SOT-23-5

1

4

1

4

3

1

2

1

2

OUT, OUTA Digital Output (comparator A)

4

V_IN–, V_INA

V_IN+, V_INA

V_DD

–

Inverting Input (comparator A)

Non-inverting Input (comparator A)

Positive Power Supply

3

1

3

+

5

2

5

8

4

—

2

—

5

—

2

5

V_INB

+

–

Non-inverting Input (comparator B)

Inverting Input (comparator B)

Digital Output (comparator B)

Digital Output (comparator C)

Inverting Input (comparator C)

Non-inverting Input (comparator C)

Negative Power Supply

6

V_INB

7

OUTB

OUTC

—

4

8

9

V_INC

–

+

10

11

12

13

14

V_INC

V_SS

—

V_IND

+

Non-inverting Input (comparator D)

Inverting Input (comparator D)

Digital Output (comparator D)

V_IND

–

OUTD

3.1

Analog Inputs

3.3

Power Supply (V and V

)

DD

SS

The comparator non-inverting and inverting inputs are

high-impedance CMOS inputs with low bias currents.

The positive power supply pin (V_DD) is 1.8V to 5.5V

higher than the negative power supply pin (V_SS). For

normal operation, the other pins are at voltages

between V_SSand V_DD

.

3.2

Digital Outputs

Typically, these parts are used in a single (positive)

supply configuration. In this case, V_SSis connected to

ground and V_DDis connected to the supply. V_DDwill

need a local bypass capacitor (typically 0.01 µF to

0.1 µF) within 2 mm of the V_DDpin. These can share a

bulk capacitor with nearby analog parts (within

100 mm), but it is not required.

The comparator outputs are CMOS, open-drain digital

outputs. They are designed to make level shifting and

wired-OR easy to implement.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 15

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 16

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

4.1.2

INPUT VOLTAGE AND CURRENT

LIMITS

4.0

APPLICATIONS INFORMATION

The MCP6566/6R/6U/7/9 family of open-drain output

comparators are fabricated on Microchip’s

state-of-the-art CMOS process. They are suitable for a

wide range of high speed applications that require

low-power consumption.

The ESD protection on the inputs can be depicted as

shown in Figure 4-2. This structure was chosen to

protect the input transistors, and to minimize input bias

current (I_B). The input ESD diodes clamp the inputs

when they try to go more than one diode drop below

V_SS. They also clamp any voltages that go too far

above V_DD. The diodes’ breakdown voltage is high

enough to allow normal operation, but low enough to

bypass ESD events within the specified limits.

4.1

Comparator Inputs

4.1.1

NORMAL OPERATION

The input stage of this family of devices uses two differ-

ent input stages in parallel. This configuration provides

three regions of operation, one operates at low input

voltages, one at high input voltages, and one at mid

input voltage. With this topology, the input voltage

range is 0.3V above V_DDand 0.3V below V_SS, while

providing low offset voltage throughout the common

mode range. The input offset voltage is measured at

both V_SS- 0.3V and V_DD+ 0.3V to ensure proper

operation.

Bond

V_DD

Pad

Bond

Pad

Bond

Pad

Input

Stage

V_IN+

V_IN–

The MCP6566/6R/6U/7/9 family has an internally-set

hysteresis V_HYST, which is small enough to maintain

input offset accuracy and large enough to eliminate

output chattering caused by the comparator’s own

input noise voltage E_NI. Figure 4-1 depicts this behav-

ior. Input offset voltage (V_OS) is the center (average) of

the (input-referred) low-high and high-low trip points.

Input hysteresis voltage (V_HYST) is the difference

between the same trip points.

Bond

Pad

V_SS

FIGURE 4-2:

Structures.

Simplified Analog Input ESD

In order to prevent damage and/or improper operation

of these amplifiers, the circuits they are in must limit the

currents (and voltages) at the V_IN+ and V_IN– pins (see

Section 1.1 “Maximum Ratings †” at the beginning of

Section 1.0 “Electrical Characteristics”). Figure 4-3

shows the recommended approach to protecting these

inputs. The internal ESD diodes prevent the input pins

(V_IN+ and V_IN–) from going too far below ground, and

the resistors R₁and R₂limit the possible current drawn

out of the input pin. Diodes D₁and D₂prevent the input

8

7

25

20

15

10

5

V_DD= 5.0V

6

V_IN

–

5

V_OUT

4

3

0

2

-5

pin (V_IN+ and V_IN–) from going too far above V_DD

When implemented as shown, resistors R₁and R₂also

limit the current through D₁and D₂.

.

Hysteresis

1

-10

-15

-20

-25

-30

0

-1

-2

-3

Time (100 ms/div)

FIGURE 4-1:

The MCP6566/6R/6U/7/9

comparators’ internal hysteresis eliminates

output chatter caused by input noise voltage.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 17

MCP6566/6R/6U/7/9

4.3

Externally Set Hysteresis

V_DD

Greater flexibility in selecting hysteresis (or input trip

points) is achieved by using external resistors.

Hysteresis reduces output chattering when one input is

slowly moving past the other. It also helps in systems in

which it is best not to cycle between high and low states

too frequently (e.g., air conditioner thermostatic con-

trol). Output chatter also increases the dynamic supply

current.

V_PU

D₁

R₄

V₁

+

V_OUT

R₁

MCP656X

–

D₂

V₂

4.3.1

NON-INVERTING CIRCUIT

non-inverting circuit for

R₂

R₃

Figure 4-4 shows

single-supply applications using just two resistors. The

resulting hysteresis diagram is shown in Figure 4-5.

a

V_SS– (minimum expected V₁)

2 mA

R₁

R₂

V_SS– (minimum expected V₂)

2 mA

V_PU

V_DD

FIGURE 4-3:

Protecting the Analog

R_PU

Inputs.

V_REF

-

It is also possible to connect the diodes to the left of the

resistors R₁and R₂. In this case, the currents through

the diodes D₁and D₂need to be limited by some other

mechanism. The resistor then serves as in-rush current

limiter; the DC current into the input pins (V_IN+ and

V_IN–) should be very small.

V_OUT

MCP656X

+

V_IN

R₁

R_F

Non-Inverting Circuit with

A significant amount of current can flow out of the

inputs when the common mode voltage (V_CM) is below

ground (V_SS); see Figure 4-3. Applications that are

high-impedance may need to limit the usable voltage

range.

FIGURE 4-4:

Hysteresis for Single-Supply.

V_OUT

V_DD

V_OH

4.1.3

PHASE REVERSAL

The MCP6566/6R/6U/7/9 comparator family uses

CMOS transistors at the input. They are designed to

prevent phase inversion when the input pins exceed

the supply voltages. Figure 2-3 shows an input voltage

exceeding both supplies with no resulting phase

inversion.

High-to-Low

Low-to-High

V_OL

V_SS

V_IN

V_THLV_TLH

V_DD

V_SS

4.2

Open-Drain Output

FIGURE 4-5:

Hysteresis Diagram for the

Non-Inverting Circuit.

The open-drain output is designed to make

level-shifting and wired-OR logic easy to implement.

The output stage minimizes switching current

(shoot-through current from supply-to-supply) when

the output changes state. See Figures 2-15, 2-18,

2-35 and 2-36, for more information.

The trip points for Figures 4-4 and 4-5 are:

EQUATION 4-1:

R





















1

V

= V

1 +------ – V

------



TLH

REF

OL

R

F





F

R











1

V

= V

1 +------ – V

------









THL

REF

OH

R





F

Where:

V_TLH

V_THL

=

trip voltage from low-to-high

trip voltage from high-to-low

=

DS20002143E-page 18

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Where:

4.3.2

INVERTING CIRCUIT

Figure 4-6 shows an inverting circuit for single-supply

using three resistors. The resulting hysteresis diagram

is shown in Figure 4-7.

R₂R₃

R₂₃= ------------------

R₂+ R₃

R₃

V₂₃= ------------------  V_DD

V_PU

V_DD

R₂+ R₃

V_IN

R_PU

V_OUT

Using this simplified circuit, the trip voltage can be

calculated using the following equation:

V_DD

MCP656X

EQUATION 4-2:

R₂

R₂₃

R_F



_OH











V_THL= V

---------------------- + V ---------------------



²³

R

₂₃+ R

R₂₃+ R_F

R_F



F

R₃

R₂₃

R_F



_OL











V_TLH= V

---------------------- + V ---------------------



²³

R₂₃+ R_F

R

₂₃+ R



F

Where:

FIGURE 4-6:

Inverting Circuit with

Hysteresis.

V_TLH

V_THL

=

trip voltage from low-to-high

trip voltage from high-to-low

V_OUT

V_DD

V_OH

Figure 2-21 and Figure 2-24 can be used to determine

typical values for V_OHand V_OL

.

Low-to-High

High-to-Low

4.4

Bypass Capacitors

With this family of comparators, the power supply pin

(V_DDfor single supply) should have a local bypass

capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good

edge rate performance.

V_OL

V_SS

V_IN

V_TLHV_THL

V_DD

V_SS

FIGURE 4-7:

Inverting Circuit.

Hysteresis Diagram for the

4.5

Capacitive Loads

Reasonable capacitive loads (e.g., logic gates) have

little impact on propagation delay (see Figure 2-32).

The supply current increases with increasing toggle

frequency (Figure 2-20), especially with higher

capacitive loads. The output slew rate and propagation

delay performance will be reduced with higher

capacitive loads.

In order to determine the trip voltages (V_THLand V_TLH

)

for the circuit shown in Figure 4-6, R₂and R₃can be

simplified to the Thevenin equivalent circuit with

respect to V_DD, as shown in Figure 4-8.

V_PU

R_PU

V_OUT

V_DD

-

MCP656X

+

V_SS

V₂₃

R₂₃

R_F

Thevenin Equivalent Circuit.

FIGURE 4-8:

 2009-2014 Microchip Technology Inc.

DS20002143E-page 19

MCP6566/6R/6U/7/9

4.6

PCB Surface Leakage

4.7

PCB Layout Technique

In applications where low input bias current is critical,

PCB (Printed Circuit Board) surface leakage effects

need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board.

Under low humidity conditions, a typical resistance

between nearby traces is 10¹². A 5V difference would

cause 5 pA of current to flow. This is greater than the

MCP6566/6R/6U/7/9 family’s bias current at +25°C

(1 pA, typical).

When designing the PCB layout, it is critical to note that

analog and digital signal traces are adequately

separated to prevent signal coupling. If the comparator

output trace is at close proximity to the input traces,

then large output voltage changes from, V_SSto V_DDor

visa versa, may couple to the inputs and cause the

device output to oscillate. To prevent such oscillation,

the output traces must be routed away from the input

pins. The SC70-5 and SOT-23-5 are relatively immune

because the output pin OUT (pin 1) is separated by the

power pin V_DD/V_SS(pin 2) from the input pin +IN (as

long as the analog and digital traces remain separated

throughout the PCB). However, the pinouts for the dual

and quad packages (SOIC, MSOP, TSSOP) have OUT

and -IN pins (pin 1 and 2) close to each other. The

recommended layout for these packages is shown in

Figure 4-10.

The easiest way to reduce surface leakage is to use a

guard ring around sensitive pins (or traces). The guard

ring is biased at the same voltage as the sensitive pin.

An example of this type of layout is shown in

Figure 4-9.

IN–

IN+

V_SS

OUTA

-INA

V_DD

OUTB

-INB

+INA

V_SS

Guard Ring

Example Guard Ring Layout

+INB

FIGURE 4-9:

for Inverting Circuit.

FIGURE 4-10:

Recommended Layout.

1. Inverting Configuration (Figures 4-6 and 4-9):

4.8

Unused Comparators

a) Connect the guard ring to the non-inverting

input pin (V_IN+). This biases the guard ring

to the same reference voltage as the

comparator (e.g., V_DD/2 or ground).

An unused amplifier in a quad package (MCP6569)

should be configured as shown in Figure 4-11. This

circuit prevents the output from toggling and causing

crosstalk. It uses the minimum number of components

and draws minimal current (see Figure 2-15 and

Figure 2-15).

b) Connect the inverting pin (V_IN–) to the input

pad without touching the guard ring.

2. Non-inverting Configuration (Figure 4-4):

a) Connect the non-inverting pin (V_IN+) to the

input pad without touching the guard ring.

¼ MCP6569

b) Connect the guard ring to the inverting input

pin (V_IN–).

V_DD

–

+

FIGURE 4-11:

Unused Comparators.

DS20002143E-page 20

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

4.9.3

BISTABLE MULTIVIBRATOR

4.9

Typical Applications

A simple bistable multivibrator design is shown in

Figure 4-14. V_REFneeds to be between the power

supplies (V_SS= GND and V_DD) to achieve oscillation.

4.9.1

PRECISE COMPARATOR

Some applications require higher DC precision. An

easy way to solve this problem is to use an amplifier

(such as the MCP6291) to gain-up the input signal

before it reaches the comparator. Figure 4-12 shows

an example of this approach.

The output duty cycle changes with V_REF

.

V_PU

R₁

R₂

V_DD

V_REF

R_PU

V_REF

MCP6291

V_PU

MCP656X

V_OUT

V_DD

R_PU

V_OUT

V_IN

R₁

R₂

MCP656X

C₁

FIGURE 4-14:

V_REF

R₃

Bistable Multivibrator.

FIGURE 4-12:

Precise Inverting

Comparator.

4.9.2

WINDOWED COMPARATOR

Figure 4-13 shows one approach to designing a

windowed comparator. The AND gate produces a logic

‘1’ when the input voltage is between V_RBand V_RT

(where V_RT> V_RB).

V_PU

1/2

MCP6567

R_PU

V_RT

V_OUT

V

IN

V_RB

1/2

MCP6567

FIGURE 4-13:

Windowed Comparator.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 21

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 22

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

5.3

Application Notes

5.0

5.1

DESIGN AIDS

The following Microchip Application Note is available

on the Microchip web site at www.microchip.com and is

recommended as a supplemental reference resource:

Microchip Advanced Part Selector

(MAPS)

AN895 – “Oscillator Circuits for RTD Temperature

Sensors” (DS00000895).

MAPS is a software tool that helps semiconductor

professionals efficiently identify Microchip devices that

fit a particular design requirement.

5.4

SPICE Macro Model

Available at no cost from the Microchip web site at

www.microchip.com/ maps, the MAPS is an overall

selection tool for Microchip’s product portfolio that

includes Analog, Memory, MCU and DSC devices.

Using this tool you can define a filter to sort features for

a parametric search of devices and export side-by-side

technical comparison reports. Helpful links are also

provided for data sheets, purchase, and sampling of

Microchip parts.

The latest SPICE macro model for the MCP6566/7/9

op amp is available on the Microchip web site at

www.microchip.com. The model was written and tested

in the official Cadence^®(OrCAD^®) PSpice^®. For the

other simulators, translation may be required.

The model covers a wide aspect of the comparator's

electrical specifications. Not only does the model cover

voltage, current and resistance of the comparator, but it

also covers the temperature and the noise effects on

the behavior of the comparator. The model has not

been verified outside of the specification range listed in

the comparator data sheet. The model behaviors under

these conditions cannot ensure it will match the actual

comparator performance. Moreover, the model is

intended to be an initial design tool. Bench testing is a

very important part of any design and cannot be

replaced with simulations. Also, simulation results

using this macro model need to be validated by

comparing them to the data sheet specifications and

characteristic curves.

5.2

Analog Demonstration and

Evaluation Boards

Microchip offers

a

broad spectrum of Analog

Demonstration and Evaluation Boards that are

designed to help you achieve faster time to market.

For a listing of these boards and their corresponding

user’s guides and technical information, visit the

Microchip web site at www.microchip.com/analogtools.

Three of the boards that are especially useful are:

• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,

P/N SOIC8EV

• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N

SOIC14EV

• 5/6-Pin SOT23 Evaluation Board, P/N VSUPEV2

 2009-2014 Microchip Technology Inc.

DS20002143E-page 23

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 24

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

6.0

6.1

PACKAGING INFORMATION

Package Marking Information

5-Lead SC70 (MCP6566)

Example:

BJ25

XXNN

5-Lead SOT-23 (MCP6566, MCP6566R)

Example:

Device

Code

MCP6566T

JYNN

JZNN

WLNN

XXNN

JY25

MCP6566RT

MCP6566UT

Note: Applies to 5-Lead SOT-23.

Example:

8-Lead MSOP (MCP6567)

XXXXXX

6567E

437256

YWWNNN

8-Lead SOIC (150 mil) (MCP6567)

Example:

XXXXXXXX

XXXXYYWW

MCP6567E

SN^^1437

e3

NNN

256

Legend: XX...X Customer-specific information

Y

YY

WW

NNN

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 25

MCP6566/6R/6U/7/9

Package Marking Information (Continued)

14-Lead SOIC (150 mil) (MCP6569)

Example:

XXXXXXXXXX

MCP6569

E/SL^

1437256

XXXXXXXXXX

e3

^

YYWWNNN

14-Lead TSSOP (MCP6569)

Example:

MCP6569E

XXXXXXXX

YYWW

1437

256

NNN

DS20002143E-page 26

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

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ꢮꢅꢊꢋꢉꢸꢃꢋꢍꢒ

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ꢜꢔꢊꢃꢉꢝ

ꢀꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢇꢉꢂꢉꢊꢆꢋꢉꢌꢀꢉꢋꢈꢉꢆꢈꢍꢉꢃꢆꢎꢏꢐꢋꢅꢉꢄꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢁꢉꢕꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢉꢇꢒꢊꢏꢏꢉꢆꢈꢍꢉꢅꢖꢎꢅꢅꢋꢉꢗꢁꢀꢘꢙꢉꢄꢄꢉꢔꢅꢓꢉꢇꢃꢋꢅꢁ

ꢘꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢃꢆꢚꢉꢊꢆꢋꢉꢍꢈꢏꢅꢓꢊꢆꢎꢃꢆꢚꢉꢔꢅꢓꢉꢛꢜꢕꢌꢉꢝꢀꢞꢁꢟꢕꢁ

ꢠꢜꢡꢢ ꢠꢊꢇꢃꢎꢉꢂꢃꢄꢅꢆꢇꢃꢈꢆꢁꢉꢣꢒꢅꢈꢓꢅꢍꢃꢎꢊꢏꢏꢤꢉꢅꢖꢊꢎꢍꢉꢥꢊꢏꢐꢅꢉꢇꢒꢈꢦꢆꢉꢦꢃꢍꢒꢈꢐꢍꢉꢍꢈꢏꢅꢓꢊꢆꢎꢅꢇꢁ

ꢕꢃꢎꢓꢈꢎꢒꢃꢔ ꢣꢅꢎꢒꢆꢈꢏꢈꢚꢤ ꢂꢓꢊꢦꢃꢆꢚ ꢡꢗꢞꢺꢗꢴꢀꢠ

 2009-2014 Microchip Technology Inc.

DS20002143E-page 27

MCP6566/6R/6U/7/9

ꢜꢔꢊꢃꢝ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ

ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ

DS20002143E-page 28

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢏꢒꢖꢆꢗꢍꢏꢒꢁꢞꢟꢛ

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b

N

E

E1

3

2

1

e

e1

D

A2

c

A

φ

A1

L

L1

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ꢀꢁ ꢂꢃꢄꢅꢆꢇꢃꢈꢆꢇꢉꢂꢉꢊꢆꢋꢉꢌꢀꢉꢋꢈꢉꢆꢈꢍꢉꢃꢆꢎꢏꢐꢋꢅꢉꢄꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢁꢉꢕꢈꢏꢋꢉꢑꢏꢊꢇꢒꢉꢈꢓꢉꢔꢓꢈꢍꢓꢐꢇꢃꢈꢆꢇꢉꢇꢒꢊꢏꢏꢉꢆꢈꢍꢉꢅꢖꢎꢅꢅꢋꢉꢗꢁꢀꢘꢙꢉꢄꢄꢉꢔꢅꢓꢉꢇꢃꢋꢅꢁ

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ꢠꢜꢡꢢ ꢠꢊꢇꢃꢎꢉꢂꢃꢄꢅꢆꢇꢃꢈꢆꢁꢉꢣꢒꢅꢈꢓꢅꢍꢃꢎꢊꢏꢏꢤꢉꢅꢖꢊꢎꢍꢉꢥꢊꢏꢐꢅꢉꢇꢒꢈꢦꢆꢉꢦꢃꢍꢒꢈꢐꢍꢉꢍꢈꢏꢅꢓꢊꢆꢎꢅꢇꢁ

ꢕꢃꢎꢓꢈꢎꢒꢃꢔ ꢣꢅꢎꢒꢆꢈꢏꢈꢚꢤ ꢂꢓꢊꢦꢃꢆꢚ ꢡꢗꢞꢺꢗꢻꢀꢠ

 2009-2014 Microchip Technology Inc.

DS20002143E-page 29

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 30

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2009-2014 Microchip Technology Inc.

DS20002143E-page 31

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 32

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2009-2014 Microchip Technology Inc.

DS20002143E-page 33

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 34

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2009-2014 Microchip Technology Inc.

DS20002143E-page 35

MCP6566/6R/6U/7/9

ꢠꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆꢡꢆꢜꢄꢓꢓꢔꢢꢣꢆꢟꢤꢥꢚꢆꢎꢎꢆꢦꢔꢅꢧꢆꢗꢍꢏꢨꢘꢛ

ꢜꢔꢊꢃꢝ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ

ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ

DS20002143E-page 36

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2009-2014 Microchip Technology Inc.

DS20002143E-page 37

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 38

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

ꢜꢔꢊꢃꢝ ꢧꢈꢓꢉꢍꢒꢅꢉꢄꢈꢇꢍꢉꢎꢐꢓꢓꢅꢆꢍꢉꢔꢊꢎꢨꢊꢚꢅꢉꢋꢓꢊꢦꢃꢆꢚꢇꢩꢉꢔꢏꢅꢊꢇꢅꢉꢇꢅꢅꢉꢍꢒꢅꢉꢕꢃꢎꢓꢈꢎꢒꢃꢔꢉꢪꢊꢎꢨꢊꢚꢃꢆꢚꢉꢜꢔꢅꢎꢃꢑꢃꢎꢊꢍꢃꢈꢆꢉꢏꢈꢎꢊꢍꢅꢋꢉꢊꢍꢉ

ꢒꢍꢍꢔꢢꢫꢫꢦꢦꢦꢁꢄꢃꢎꢓꢈꢎꢒꢃꢔꢁꢎꢈꢄꢫꢔꢊꢎꢨꢊꢚꢃꢆꢚ

 2009-2014 Microchip Technology Inc.

DS20002143E-page 39

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 40

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2009-2014 Microchip Technology Inc.

DS20002143E-page 41

MCP6566/6R/6U/7/9

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20002143E-page 42

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

APPENDIX A: REVISION HISTORY

Revision E (November 2014)

The following is the list of modifications:

1. Added SPICE Macro Model in the Related

Device features section.

2. Updated Temperature Specifications table.

3. Corrected pin table in Section 3.0, Pin Descrip-

tions.

4. Added new Section 5.4, SPICE Macro Model.

Revision D (February 2013)

The following is the list of modifications:

1. Added the Analog Input (V_IN) parameter in

Section 1.0 “Electrical Characteristics”.

Revision C (February 2011)

The following is the list of modifications:

1. Replaced the MCP5468 package name with the

correct MCP6567 package name on page 1 and

in Table 3-1.

Revision B (August 2009)

The following is the list of modifications:

1. Added MCP6566U throughout the document.

2. Updated package outline drawings.

Revision A (March 2009)

• Original Release of this Document.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 43

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 44

 2009-2014 Microchip Technology Inc.

MCP6566/6R/6U/7/9

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

–

PART NO.

Device

X

/XX

Examples:

a)

MCP6566T-E/LT: Tape and Reel,

Temperature

Range

Package

Extended Temperature,

5LD SC70 package.

b)

MCP6566T-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

Device:

MCP6566T:

Single Comparator (Tape and Reel)

(SC70, SOT-23)

MCP6566RT: Single Comparator (Tape and Reel)

(SOT-23 only)

MCP6566UT: Single Comparator (Tape and Reel)

(SOT-23 only)

a)

MCP6566RT-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

MCP6567:

MCP6567T:

MCP6569:

MCP6569T:

Dual Comparator

Dual Comparator (Tape and Reel)

Quad Comparator

MCP6566UT-E/OT: Tape and Reel

Extended Temperature,

5LD SOT-23 package.

Quad Comparator (Tape and Reel)



a)

b)

MCP6567-E/MS:

MCP6567-E/SN:

Extended Temperature

8LD MSOP package.

Extended Temperature

8LD SOIC package.

Temperature

Range:

E

=

-40 C to +125 C

Package:

LT

=

Plastic Small Outline Transistor (SC70), 5-lead

OT = Plastic Small Outline Transistor (SOT-23), 5-lead

MS = Plastic Micro Small Outline Transistor, 8-lead

SN = Plastic Small Outline Transistor, 8-lead

a)

b)

MCP6569T-E/SL: Tape and Reel

Extended Temperature

14LD SOIC package.

ST

SL

=

Plastic Thin Shrink Small Outline Transistor, 14-lead

Plastic Small Outline Transistor, 14-lead

MCP6569T-E/ST:

Tape and Reel

Extended Temperature

14LD TSSOP package.

 2009-2014 Microchip Technology Inc.

DS20002143E-page 45

MCP6566/6R/6U/7/9

NOTES:

DS20002143E-page 46

 2009-2014 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,

LANCheck, MediaLB, MOST, MOST logo, MPLAB,

32

OptoLyzer, PIC, PICSTART, PIC logo, RightTouch, SpyNIC,

SST, SST Logo, SuperFlash and UNI/O are registered

trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

The Embedded Control Solutions Company and mTouch are

registered trademarks of Microchip Technology Incorporated

in the U.S.A.

Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,

CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit

Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,

KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,

MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code

Generation, PICDEM, PICDEM.net, PICkit, PICtail,

RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total

Endurance, TSHARC, USBCheck, VariSense, ViewSpan,

WiperLock, Wireless DNA, and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

Silicon Storage Technology is a registered trademark of

Microchip Technology Inc. in other countries.

GestIC is a registered trademarks of Microchip Technology

Germany II GmbH & Co. KG, a subsidiary of Microchip

Technology Inc., in other countries.

All other trademarks mentioned herein are property of their

respective companies.

ISBN: 978-1-63276-677-9

QUALITY MANAGEMENT SYSTEM

CERTIFIED BY DNV

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

== ISO/TS 16949 ==

 2009-2014 Microchip Technology Inc.

DS20002143E-page 47

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2943-5100

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-3019-1500

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Web Address:

www.microchip.com

Japan - Osaka

Tel: 81-6-6152-7160

Fax: 81-6-6152-9310

Germany - Dusseldorf

Tel: 49-2129-3766400

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

China - Beijing

Tel: 86-10-8569-7000

Fax: 86-10-8528-2104

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Tokyo

Tel: 81-3-6880- 3770

Fax: 81-3-6880-3771

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Austin, TX

Tel: 512-257-3370

Germany - Pforzheim

Tel: 49-7231-424750

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Boston

China - Chongqing

Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Korea - Seoul

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

China - Hangzhou

Tel: 86-571-8792-8115

Fax: 86-571-8792-8116

Italy - Venice

Tel: 39-049-7625286

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

China - Hong Kong SAR

Tel: 852-2943-5100

Fax: 852-2401-3431

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

Poland - Warsaw

Tel: 48-22-3325737

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Sweden - Stockholm

Tel: 46-8-5090-4654

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Detroit

Novi, MI

Tel: 248-848-4000

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

UK - Wokingham

Tel: 44-118-921-5800

Fax: 44-118-921-5820

Taiwan - Hsin Chu

Tel: 886-3-5778-366

Fax: 886-3-5770-955

Houston, TX

Tel: 281-894-5983

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

Taiwan - Kaohsiung

Tel: 886-7-213-7830

China - Shenzhen

Tel: 86-755-8864-2200

Fax: 86-755-8203-1760

Taiwan - Taipei

Tel: 886-2-2508-8600

Fax: 886-2-2508-0102

Los Angeles

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

New York, NY

Tel: 631-435-6000

San Jose, CA

Tel: 408-735-9110

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

Canada - Toronto

Tel: 905-673-0699

Fax: 905-673-6509

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

03/25/14

DS20002143E-page 48

 2009-2014 Microchip Technology Inc.


型号：	MCP6566T-E/OTVAO
厂家：	MICROCHIP
描述：	Comparator, 1 Func, 10000uV Offset-Max, 56ns Response Time, CMOS, PDSO5 光电二极管
文件：	总48页 (文件大小：1319K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MCP6566T-E/OTVAO [MICROCHIP]

相关型号：

MCP6566T-E/SL

MCP6566T-E/SN

MCP6566T-E/ST

MCP6566U

MCP6566UT

MCP6566UT-E/LT

MCP6566UT-E/MS

MCP6566UT-E/OT

MCP6566UT-E/OTVAO

MCP6566UT-E/SL

MCP6566UT-E/SN

MCP6566UT-E/ST