MIC2183YMTR [MICROCHIP]
SWITCHING CONTROLLER, 440kHz SWITCHING FREQ-MAX, PDSO16, LEAD FREE, SOP-16;型号: | MIC2183YMTR |
厂家: | MICROCHIP |
描述: | SWITCHING CONTROLLER, 440kHz SWITCHING FREQ-MAX, PDSO16, LEAD FREE, SOP-16 信息通信管理 开关 光电二极管 |
文件: | 总12页 (文件大小:146K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MIC2183
Micrel, Inc.
MIC2183
Low Voltage Synchronous Buck PWM Control IC
General Description
Features
Micrel’s MIC2183 is a high efficiency PWM synchronous
buck control IC. With its wide input voltage range of 2.9V to
14V, the MIC2183 can be used to efficiently step voltages
down in 1- or 2-cell Li Ion battery powered applications, as
well as in fixed 3.3V, 5V, or 12V systems.
• Input voltage range: 2.9V to 14V
• >90% efficiency
• Oscillator frequency of 400kHz
• Frequency divide-by-two pin
• Frequency sync to 600kHz
• FreqOut oscillator output allows simple charge pump
implementation in low voltage systems
• Front edge blanking
Efficiencies over 90% are achievable over a wide range of
load conditions with the MIC2183’s PWM control scheme.
The operating frequency can be divided by two by raising the
• 5Ω output drivers (typical)
FREQ/2pintoV .Thisallowstheusertooptimizeefficiency
DD
• Soft start
versus board space. It also allows the MIC2183 to be exter-
• PWM current mode control
nally synchronized to frequencies below its nominal 400KHz.
• 1µA shutdown current
The MIC2183 features an oscillator output, FreqOut, which
can be used to implement a simple charge pump in low
voltage applications. The output of the charge pump can be
• Cycle-by-cycle current limiting
• Frequency foldback short circuit protection
• Adjustable under-voltage lockout
• 16-pin narrow-body SOP and QSOP package options
fed into the gate drive power circuitry via the V P pin. This
IN
featureallowsenhancedgatedrive,hencehigherefficiencies
Applications
at low input voltages.
MIC2183 also features a 1µA shutdown mode, and a pro-
grammable undervoltage lockout, making it well-suited for
portable applications.
• 3.3V to 2.5V/1.8V/1.5V conversion
• DC power distribution systems
• Wireless modems
• ADSL line cards
The MIC2183 is available in 16-pin SOP and QSOP packag-
ing options with a junction temperature range from -40°C to
+125°C.
• 1-and 2-cell Li Ion battery operated equipment
• Satellite Phones
Typical Application
µ
Ω
MIC2183 EFFICIENCY
100
95
90
85
80
75
70
µ
V
V
f
= 3.3V
IN
OUT
S
65
60
55
50
= 2.5V
= 200kHz
µ
0
1
2
3
4
5
OUTPUT CURRENT (A)
Adjustable Output Synchronous Buck Converter
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-042205
April 2005
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MIC2183
Micrel, Inc.
Ordering Information
Part Number
Output
Junction
Standard
Pb-Free
MIC2183YM
MIC2183YQS
Voltage
Frequency
200/400KHz
200/400KHz
Temp. Range
Package
16-lead SOP
16-lead QSOP
MIC2183BM
MIC2183BQS
Adj.
Adj.
–40°C to +125°C
–40°C to +125°C
Pin Configuration
VINA
FreqOut
1
2
3
4
5
6
7
8
16 VINP
15 FREQ/2
14 OUTP
13 OUTN
12 PGND
11 SYNC
10 VDD
SS
COMP
SGND
FB
EN/UVLO
CSL
9
CSH
16 Lead SOIC (M)
16 Lead QSOP (QS)
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MIC2183
Micrel, Inc.
Pin Description
Pin Number
Pin Name
Pin Function
1
VINA
Analog voltage input voltage to the circuit. This powers up the analog
sections of the die and does not need to be the same voltage as Pin 16
(VINP).
2
3
FreqOut
SS
This provides a digital signal output signal at half the switching frequency.
This signal swings from 0 to 3V, and can be used to drive an external
capacitive doubler to provide a higher voltage to the VINP input.
Soft start reduces the inrush current and delays and slows the output voltage
rise time. A 5µA current source will charge the capacitor up to VDD. A 1µF
capacitor will soft start the switching regulator in 1.5ms.
4
5
COMP
SGND
Compensation (Output): Internal error amplifier output. Connect to a
capacitor or series RC network to compensate the regulator’s control loop.
Small signal ground: must be routed separately from other grounds to the (-)
terminal of COUT
.
6
7
FB
EN/UVLO
Feedback Input - the circuit regulates this pin to 1.245V.
Enable/UnderVoltage Lockout (input): A low level on this pin will power down
the device, reducing the quiescent current to under 5uA. This pin has two
separate thresholds, below 1.5V the output switching is disabled, and below
0.9V the part is forced into a complete micropower shutdown. The 1.5V
threshold functions as an accurate undervoltage lockout (UVLO) with 140mV
hysteresis.
8
9
CSL
CSH
The (-) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (-) input to the current
amplifier.
The (+) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (+) input to the current
amplifier.
10
11
VDD
3V internal linear-regulator output. VDD is also the supply voltage bus for the
chip. Bypass to SGND with 1µF.
SYNC
Frequency Synchronization (Input): Connect an external clock signal to
synchronize the oscillator. Leading edge of signal above 1.5V starts the
switching cycle. Connect to SGND if not used.
12
13
14
15
16
PGND
OUTN
OUTP
FREQ/2
VINP
MOSFET driver power ground, connects to source of synchronous MOSFET
and the (-) terminal of CIN.
High current drive for synchronous N channel MOSFET. Voltage swing is
from ground to VINP. On-resistance is typically 5Ω.
High current drive for high side P channel MOSFET. Voltage swing is from
ground to VINP. On-resistance is typically 5Ω.
When this is low, the oscillator frequency is 400KHz. When this pin is raised
to VDD, the oscillator frequency is 200KHz.
Power Input voltage to the circuit. The output gate drivers are powered from
this supply. The current sense resistor RCS should be connected as close as
possible to this pin.
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Micrel, Inc.
Supply Voltage (V A, V P) ........................ +2.9V to +14V
Absolute Maximum Ratings (Note 1)
Operating Ratings (Note 2)
Supply Voltage (V A, V P) .........................................15V
IN
IN
DD
COMP
FB
EN/UVLO
IN
IN
Digital Supply Voltage (V ) ...........................................7V
Ambient Operating Temperature......... –40°C ≤ T ≤ +85°C
A
Comp Pin Voltage (V
)............................ –0.3V to +3V
Junction Temperature ....................... –40°C ≤ T ≤ +125°C
J
Feedback Pin Voltage (V ) .......................... –0.3V to +3V
Output Voltage Range...................................... 1.3V to 12V
PackageThermal Resistance
Enable Pin Voltage (V
Current Sense Voltage (V
) ..................... –0.3V to 15V
–V ) ............... –0.3V to 1V
θ
θ
16-lead SOP ...............................................100°C/W
16-lead QSOP.............................................163°C/W
CSH
CSL
JA
JA
Sync Pin Voltage (V
) ................................ –0.3V to 7V
SYNC
Freq/2 Pin Voltage (V
) ............................ -0.3V to 7V
FREQ/2
Power Dissipation (P )
D
16 lead SOIC................................. 400mW @ T = 85°C
A
16 lead QSOP ....................................... 245mW @ 85°C
Ambient Storage Temp ............................ –65°C to +150°C
ESD Rating, Note 3
Electrical Characteristics
VINA = VINP = VCSH = 5V, VOUT = 3.3V, VEN/UVLO = 5V, VFREQ/2 = 0V, TJ = 25ºC, unless otherwise specified. Bold values indicate
–40ºC < TJ < +125ºC.
Parameter
Condition
Min
Typ
Max
Units
Regulation
Feedback Voltage Reference
(±1%)
(±2%)
1.233 1.245 1.257
V
V
1.22
1.27
Feedback Bias Current
50
0.04
0.9
nA
% / V
%
Output Voltage Line Regulation
Output Voltage Load Regulation
Output Voltage Total Regulation
Input & VDD Supply
5V ≤ VIN ≤ 12V
0mV < (VCSH – VCSL) < 75mV
5V ≤ VINA ≤ 12V, 0mV < (VCSH – VCSL) < 75mV (±3%)
1.208
1.282
V
VINA Input Current
VINP Input Current, Note 4
Shutdown Quiescent Current
0.7
1.0
0.5
mA
mA
µA
V
(Excluding external MOSFET gate current)
VEN/UVLO = 0V; (IVINA + IVINP
)
5
3.18
Digital Supply Voltage (VDD
)
IL = 0
2.82
3.0
Digital Supply load regulation
Undervoltage Lockout
UVLO Hysteresis
IL = 0 to 1mA
VDD upper threshold (turn on threshold)
0.03
2.75
100
V
V
mV
Enable/UVLO
Enable Input Threshold
UVLO Threshold
UVLO Hysteresis
Enable Input Current
Soft Start
0.6
1.4
0.9
1.5
140
0.2
1.2
1.6
V
V
mV
µA
(turn-on threshold)
VEN/UVLO = 5V
5
Soft Start Current
Current Limit
5
µA
mV
V/V
V/V
Current Limit Threshold Voltage
Error Amplifier
Error Amplifier Gain
Current Amplifier
Current Amplifier Gain
Voltage on CSH-CSL to trip current limit
100
20
3.0
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MIC2183
Micrel, Inc.
Parameter
Condiion
Min
Typ
Max
Units
Oscillator Section
Oscillator Frequency (fO)
Maximum Duty Cycle
Minimum On Time
Freq/2 Frequency (fO)
Frequency Foldback Threshold
Frequency Foldback Frequency
SYNC Threshold Level
SYNC Input Current
360
100
400
440
230
kHz
%
ns
kHz
V
kHz
V
µA
ns
kHz
VFB = 1.0V
VFB = 1.5V
VFreq/2 = 5V
Measured on FB
165
200
0.3
90
1.4
0.1
170
0.6
2.2
5
SYNC Minimum Pulse Width
SYNC Capture Range
FreqOut Output
200
fO +15 %
Note 5
600
FreqOut Frequency
FreqOut Current Drive
Note 6
Sink
Source
fO / 2
8
–6
kHz
mA
mA
Gate Drivers
Rise/Fall Time
Output Driver Impedance
CL = 3300pF
50
4
3
5
5
ns
Ω
Source; VINP = 12V
Sink; VINP = 12V
Source; VINP = 5V
Sink; VINP = 5V
VINP = 12V
8
7
11
11
Ω
Ω
Ω
Driver Non-Overlap Time
50
80
ns
ns
VINP = 5V
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when
operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction
temperature, T (Max), the junction-to-ambient thermal resistance, θ , and the ambient temperature, T .
J
JA
A
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4: See application information for I(V P) vs. V P.
IN
IN
Note 5: See application information for limitations on maximum operating frequency.
Note 6: The frequency on FreqOut is half the frequency of the oscillator, or half the frequency of the external Sync signal.
April 2005
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Micrel, Inc.
Typical Characteristics
Quiescent Current
vs. Input Voltage
Quiescent Current
vs. Temperature
V
vs. Input Voltage
DD
6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
3.15
3.10
3.05
3.00
2.95
2.90
2.85
2.80
400kHz
IQ = IVINA + IVINP
400kHz
5
200kHz
4
ISTANDBY
200kHz
3
VINA = VIN
P
2
IQ = IVINA = IVINP
VINA VINP = 3.3V
=
ISTANDBY
1
0
0
5
10
15
0
5
10
15
-40 -20 0 20 40 60 80 100120140
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Error Amp Reference Voltage
vs. Temperature
V
vs. Load
V
vs. Temperature
DD
DD
3.04
3.03
3.02
3.01
3.00
2.99
2.98
2.97
2.96
1.246
3.005
3.000
2.995
2.990
2.985
2.980
2.975
2.970
1.245
1.244
1.243
1.242
1.241
1.240
1.239
VINA = VINP = 5V
VINA = VINP = 3.3V
-40 -20 0 20 40 60 80 100120140
-40 -20 0 20 40 60 80 100120140
0
0.2 0.4 0.6 0.8
1
1.2
TEMPERATURE (°C)
TEMPERATURE (°C)
V
LOAD CURRENT (mA)
DD
Soft Start Current vs.
Temperature
Switching Frequency
vs. Input Voltage
Switching Frequency
vs. Temperature
2.5
2.0
1.5
1.0
0.5
0
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
5
200kHz
200kHz
0
400kHz
-5
-10
-0.5
-1.0
-1.5
-2.0
400kHz
-15
-20
0
5
10
15
-40 -20 0 20 40 60 80 100120140
-40 -20 0 20 40 60 80 100120140
INPUT VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
Overcurrent Threshold vs.
Input Voltage
OUTN Drive Impedance vs.
Overcurrent Threshold
vs. Temperatue
Input Voltage
102
100
98
9
110.0
108.0
106.0
104.0
102.0
100.0
98.0
8
7
6
5
4
3
2
1
0
SOURCE
96
94
96.0
SINK
94.0
92
92.0
90
90.0
0
5
10
15
0
5
10
15
-40 -20 0 20 40 60 80 100120140
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
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April 2005
MIC2183
Micrel, Inc.
OUTP Drive Impedance vs.
Input Voltage
9
8
7
6
5
4
3
2
1
0
SINK
SOURCE
0
5
10
15
INPUT VOLTAGE (V)
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MIC2183
Micrel, Inc.
Functional Diagram
VIN
CIN
CDECOUP
VINA
1
OVERCURRENT
COMPARATOR
VREF
1.245V
0.1V
9
8
CSH
CSL
EN/UVLO
7
RSENSE
BIAS
GAIN
3.7
VDD 10
VDD
CURRENT
SENSE
AMP
16 VINP
ON
fs/4
14 OUTP
CONTROL
Q1
Q2
L1
PGND
VOUT
SYNC 11
13 OUTN
D1
COUT
FREQ/2 15
OSC
RESET
12 PGND
SLOPE
COMPENSATION
FreqOut
2
∑
÷2
PWM
COMPARATOR
gm = 0.0002
gain = 20
VREF
SS
3
4
COMP
ERROR
AMP
6
FB
100k
0.3V
fs/4
FREQUENCY
FOLDBACK
5
SGND
Figure 1. MIC2183 Block Diagram
P-Channel MOSFET, Q1. Current flows from the input to the
output through the current sense resistor, MOSFET and
inductor. The current amplitude increases, controlled by the
inductor. The voltage developed across the current sense
Functional Characteristics
Controller Overview and Functional Description
The MIC2183 is a BiCMOS, switched mode, synchronous,
step down (buck) converter controller. It uses both N and P-
Channel MOSFETs, which allows the controller to operate at
100% duty cycle and eliminates the need for a high side drive
bootstrap circuit. Current mode control is used to achieve
superiortransientlineandloadregulation. Aninternalcorrec-
tive ramp provides slope compensation for stable operation
above a 50% duty cycle. The controller is optimized for high
efficiency, high performance DC-DC converter applications.
resistor, R
, is amplified inside the MIC2183 and com-
SENSE
bined with an internal ramp for stability. This signal is com-
pared to the output of the error amplifier. When the current
signalequalstheerrorvoltagesignal,theP-channelMOSFET
isturnedoff.Theinductorcurrentflowsthroughthediode,D1,
until the synchronous, N-Channel MOSFET turns on. The
voltage drop across the MOSFET is less than the forward
voltage drop of the diode, which improves the converter
efficiency. At the end of the switching period, the synchro-
nous MOSFET is turned off and the switching cycle repeats.
Figure 1 is a block diagram of the MIC2183 configured as a
synchronous buck converter. At the beginning of the switch-
ing cycle, the OUTP pin pulls low and turns on the high-side
M9999-042205
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MIC2183
Micrel, Inc.
The MIC2183 controller is broken down into 7 functions.
Current Limit
The output current is detected by the voltage drop across the
• Control loop
• PWM operation
• Current mode control
• Current limit
external current sense resistor (R
in Figure 1.). The
SENSE
current sense resistor must be sized using the minimum
current limit threshold. The external components must be
designedtowithstandthemaximumcurrentlimit. Thecurrent
sense resistor value is calculated by the equation below:
• Reference, enable and UVLO
• FreqOut
• MOSFET gate drive
• Oscillator and Sync
• Soft-start
MIN_ CURRENT _ SENSE_ THRESHOLD
RSENSE
=
IOUT _MAX
The maximum output current is:
Control Loop
MAX _ CURRENT _ SENSE_ THRESHOLD
PWM Control Loop
IOUT _MAX
=
RSENSE
The MIC2183 uses current mode control to regulate the
output voltage. This dual control loop method (illustrated in
Figure 2) senses the output voltage (outer loop) and the
inductor current (inner loop). It uses inductor current and
output voltage to determine the duty cycle of the buck
converter. Sampling the inductor current effectively removes
the inductor from the control loop, which simplifies compen-
sation.
The current sense pins CSH (pin 9) and CSL (pin 8) are noise
sensitive due to the low signal level and high input imped-
ance. The PCB traces should be short and routed close to
each other. A small (1nF) capacitor across the pins will
attenuate high frequency switching noise.
When the peak inductor current exceeds the current limit
threshold, the overcurrent comparator turns off the high side
MOSFET for the remainder of the switching cycle, effectively
decreasing the duty cycle. The output voltage drops as
additional load current is pulled from the converter. When the
voltageatthefeedbackpin(FB)reachesapproximately0.3V,
the circuit enters frequency foldback mode and the oscillator
frequency will drop to 1/4 of the switching frequency. This
limits the maximum output power delivered to the load under
a short circuit condition.
VIN
Switching
VOUT
Converter
Voltage
Divider
IINDUCTOR
Switch
Driver
Reference, Enable and UVLO Circuits
VERROR
VREF
The output drivers are enabled when the following conditions
are satisfied:
IINDUCTOR
• The V voltage (pin 10) is greater than its
DD
undervoltage threshold.
VERROR
• The voltage on the enable pin (pin 7) is greater
than the enable UVLO threshold.
The enable pin (pin 7) has two threshold levels, allowing the
MIC2183toshutdowninalowcurrentmode,orturnoffoutput
switching in standby mode. An enable pin voltage lower than
the shutdown threshold turns off all the internal circuitry and
places the MIC2183 in a micropower shutdown mode.
tON
tPER
D = tON/tPER
If the enable pin voltage is between the shutdown and
Figure 2. Current Mode Control Example
standby thresholds, the internal bias, V
and reference
DD
voltages are turned on. The soft start pin is forced low by an
internal discharge MOSFET. The output drivers are inhibited
fromswitching. TheOUTPpinisinahighstateandtheOUTN
pin remains in a low state. Raising the enable voltage above
thestandbythresholdallowsthesoftstartcapacitortocharge
and enables the output drivers. The standby threshold is
specified in the electrical characteristics. A resistor divider
can be used with the enable pin to prevent the power supply
from turning on until a specified input voltage is reached. The
circuit in Figure 3 shows how to connect the resistors.
As shown in Figure 1, the inductor current is sensed by
measuring the voltage across the resistor, R
. A ramp is
SENSE
added to the amplified current sense signal to provide slope
compensation, which is required to prevent unstable opera-
tion at duty cycles greater than 50%.
A transconductance amplifier is used for the error amplifier,
which compares an attenuated sample of the output voltage
with a reference voltage. The output of the error amplifier is
the compensation pin (Comp), which is compared to the
current sense waveform in the PWM block. When the current
signal becomes greater than the error signal, the comparator
turns off the high side drive. The COMP pin provides access
to the output of the error amplifier and allows the use of
external components to stabilize the voltage loop.
April 2005
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M9999-042205
MIC2183
Micrel, Inc.
to the input supply. The V P pin and CSH pin must be
MIC2183
IN
1.5V
connected to the same potential.
Typical
VIN
A non-overlap time is built into the MOSFET driver circuitry.
Thisdead-timepreventsthehigh-sideandlow-sideMOSFET
drivers from being on at the same time. Either an external
diode or the low-side MOSFET internal parasitic diode con-
ducts the inductor current during the dead-time.
R1
Bias
Circuitry
EN/UVLO
(7)
140mV
Hysteresis
(typical)
R2
MOSFET Selection
The P-channel MOSFET must have a V threshold voltage
GS
Figure 3. UVLO Circuitry
The line voltage turn on trip point is:
equal to or lower than the input voltage when used in a buck
converter topology. There is a limit to the maximum gate
chargetheMIC2183willdrive.HighergatechargeMOSFETs
willslowdowntheturn-onandturn-offtimesoftheMOSFETs.
Slower transition times will cause higher power dissipation in
the MOSFETs due to higher switching transition losses. The
MOSFETs must be able to completely turn on and off within
the driver non-overlap time If both MOSFETs are conducting
at the same time, shoot-through will occur, which greatly
increases power dissipation in the MOSFETs and reduces
converter efficiency.
R2
V
INPUT _ENABLE= VTHRESHOLD
×
R1+R2
where:
V
is the voltage level of the internal
THRESHOLD
comparator reference, typically 1.5V
The input voltage hysteresis is equal to:
R1+R2
V
INPUT _HYST= VHYST
×
TheMOSFETgatechargeisalsolimitedbypowerdissipation
in the MIC2183. The power dissipated by the gate drive
circuitry is calculated below:
R2
where:
V
is the internal comparator hysteresis level,
HYST
P
=
Q
GATE × V P × fS
IN
GATE_DRIVE
typically 140mV.
where: Qgate is the total gate charge of both the N and P-
V
is the hysteresis at the input voltage
The MIC2183 will be disabled when the input voltage drops
INPUT_HYST
channel MOSFETs.
f is the switching frequency
back down to:
S
V P is the gate drive voltage at the V P pin
V
V
=
IN
IN
INPUT_OFF
INPUT_ENABLE
– V
=
The graph in Figure 4 shows the total gate charge that can be
driven by the MIC2183 over the input voltage range, for
different values of switching frequency.
INPUT_HYST
R2
×
(V
– V
)
THRESHOLD
HYST
R1+R2
Frequency vs.
Max. Gate Charge
140
Either of 2 UVLO conditions will pull the soft start capacitor
low.
130
120
110
100
90
200kH
• When the V voltage drops below its
DD
undervoltage lockout level.
300kHz
• When the enable pin drops below the its enable
threshold
80
400kHz
500kHz
The internal bias circuit generates an internal 1.245V band-
gap reference voltage for the voltage error amplifier and a 3V
70
60
50
V
voltagefortheinternalcontrolcircuitry.TheV pinmust
DD
DD
600kHz
11 13 15
INPUT VOLTAGE (V)
40
be decoupled with a 1µF ceramic capacitor. The capacitor
3
5
7
9
must be placed close to the V pin. The other end of the
DD
capacitor must be connected directly to the ground plane.
Figure 4. MIC2183 Frequency vs Max. Gate Charge
Oscillator & Sync
MOSFET Gate Drive
The MIC2183 is designed to drive a high side P-channel
MOSFETandalowsideN-channelMOSFET.Thesourcepin
of the P-channel MOSFET is connected to the input of the
power supply. It is turned on when OUTP pulls the gate of the
MOSFETlow. TheadvantageofusingaP-channelMOSFET
is that it does not required a bootstrap circuit to boost the gate
voltage higher than the input, as would be required for an N-
channel MOSFET.
Theinternaloscillatorisfreerunningandrequiresnoexternal
components. The f/2 pin allows the user to select from two
switchingfrequencies. Alowlevelsettheoscillatorfrequency
to 400kHz and a high level set the oscillator frequency to
200kHz. The maximum duty cycle for both frequencies is
100%. This is another advantage of using a P-channel
MOSFET for the high-side drive; it can continuously turned
on.
The V P pin (pin 16) supplies the drive voltage to both gate
IN
A frequency foldback mode is enabled if the voltage on the
drive pins, OUTN and OUTP. V P pin is usually connected
IN
feedback pin (pin 6) is less than 0.3V. In frequency foldback,
M9999-042205
10
April 2005
MIC2183
Micrel, Inc.
the oscillator frequency is reduced by approximately a factor
of 4. Frequency foldback is used to limit the energy delivered
to the output during a short circuit fault condition.
Lower values of R1 are preferred to prevent noise from
appearing on the FB pin. A typically recommended value is
10kΩ. If R1 is too small in value it will decrease the efficiency
of the power supply, especially at low output loads.
The SYNC input (pin 11) lets the MIC2183 synchronize with
an external clock signal. The rising edge of the sync signal
generates a reset signal in the oscillator, which turns off the
low side gate drive output. The high side drive then turns on,
restarting the switching cycle. The sync signal is inhibited
when the controller operates in frequency foldback. The sync
signal frequency must be greater than the maximum speci-
fiedfreerunningfrequencyoftheMIC2183. Ifthesynchroniz-
ing frequency is lower, double pulsing of the gate drive
outputs will occur. When not used, the sync pin must be
connected to ground.
Once R1 is selected, R2 can be calculated with the following
formula.
VREF ×R1
R2=
VOUT VREF
Efficiency Considerations
Efficiency is the ratio of output power to input power. The
difference is dissipated as heat in the buck converter. Under
light output load, the significant contributors are:
• The V A supply current
IN
The maximum recommended output switching frequency is
600kHz. Synchronizing to higher frequencies may be pos-
sible, however, higher power dissipation in the internal gate
drive circuits will occur. The MOSFET gates require charge
to turn on the device. The average current required by the
MOSFET gate increases with switching frequency.
• The V P supply current, which includes the current
IN
required to switch the external MOSFETs
• Core losses in the output inductor
To maximize efficiency at light loads:
• Use a low gate charge MOSFET or use the smallest
MOSFET, which is still adequate for maximum output
current.
Soft Start
Soft start reduces the power supply input surge current at
start up by controlling the output voltage risetime. The input
surge appears while the output capacitance is charged up. A
slower output risetime will draw a lower input surge current.
Soft start may also be used for power supply sequencing.
• Use a ferrite material for the inductor core, which has
less core loss than an MPP or iron power core.
Under heavy output loads the significant contributors to
power loss are (in approximate order of magnitude):
• Resistive on time losses in the MOSFETs
• Switching transition losses in the high side MOSFET
• Inductor resistive losses
ThesoftstartvoltageisapplieddirectlytothePWMcompara-
tor. A5µAinternalcurrentsourceisusedtochargeupthesoft
start capacitor. The capacitor is discharged when either the
enable pin voltage drops below the standby threshold or the
• Current sense resistor losses
• Input capacitor resistive losses (due to the capacitors
ESR)
V
voltage drops below its UVLO level.
DD
To minimize power loss under heavy loads:
The part switches at a low duty cycle when the soft start pin
voltage is zero. As the soft start voltage rises from 0V to 0.7V,
the duty cycle increases from the minimum duty cycle to the
operating duty cycle. The oscillator runs at the foldback
frequency (1/4 of the switching frequency) until the feedback
voltage rises above 0.3V. The risetime of the output is
dependent of the soft start capacitor output capacitance,
input and output voltage and load current.
• Use low on resistance MOSFETs. Use low threshold
logic level MOSFETs when the input voltage is below
5V. Multiplying the gate charge by the on resistance
gives a figure of merit, providing a good balance
between low load and high load efficiency.
• Slow transition times and oscillations on the voltage
and current waveforms dissipate more power during
the turn on and turn off of the MOSFETs. A clean
layout will minimize parasitic inductance and capaci
tance in the gate drive and high current paths. This
will allow the fastest transition times and waveforms
without oscillations. Low gate charge MOSFETs will
transition faster than those with higher gate charge
requirements.
Voltage Setting Components
The MIC2183 requires two resistors to set the output voltage
as shown in Figure 5.
VOUT
MIC2183
Voltage
R1
Amplifier
• For the same size inductor, a lower value will have
fewer turns and therefore, lower winding resistance.
However, using too small of a value will require more
output capacitors to filter the output ripple, which will
force a smaller bandwidth, slower transient response
and possible instability under certain conditions.
Pin 6
R2
V
1.2R4E5FV
• Lowering the current sense resistor value will de
crease the power dissipated in the resistor. However,
it will also increase the overcurrent limit and will
require larger MOSFETs and inductor components.
Figure 5
The output voltage is determined by the equation below.
R1
V
OUT= VREF ×1+
• Use low ESR input capacitors to minimize the power
R2
dissipated in the capacitors ESR.
Where: V
April 2005
for the MIC2183 is typically 1.245V.
REF
11
M9999-042205
MIC2183
Micrel, Inc.
Package Information
PIN 1
0.157 (3.99)
0.150 (3.81)
DIMENSIONS:
INCHES (MM)
0.020 (0.51)
REF
0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
BSC
45°
0.0098 (0.249)
0.0040 (0.102)
0°–8°
0.050 (1.27)
0.016 (0.40)
0.394 (10.00)
0.386 (9.80)
SEATING
PLANE
0.0648 (1.646)
0.0434 (1.102)
0.244 (6.20)
0.228 (5.79)
16-Pin SOP (M)
PIN 1
DIMENSIONS:
INCHES (MM)
0.157 (3.99)
0.150 (3.81)
0.009 (0.2286)
REF
0.012 (0.30)
0.008 (0.20)
0.025 (0.635)
BSC
45°
0.0098 (0.249)
0.0075 (0.190)
0.0098 (0.249)
8°
0°
0.0040 (0.102)
0.196 (4.98)
0.189 (4.80)
0.050 (1.27)
0.016 (0.40)
SEATING 0.0688 (1.748)
PLANE
0.0532 (1.351)
0.2284 (5.801)
0.2240 (5.690)
16-Pin QSOP (QS)
MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2001 Micrel Incorporated
M9999-042205
12
April 2005
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