MIC24420YML-TR_技术文档

MIC24420/MIC24421

2.5A Dual Output PWM Synchronous

Buck Regulator IC

General Description

Features

The MIC24420/MIC24421 are synchronous PWM dual

output step down converters with internal 2.5A high-side

switches. The MIC24420/MIC24421 has an integrated low-

side gate driver for synchronous step-down conversion by

connecting an external N-channel MOSFET to achieve

high efficiencies in low duty-cycle applications.

• 4.5V to 15V input voltage range

• Adjustable output voltages down to 0.7V

• 2.5A per channel

• 180° out of phase operation

• Pre-biased output startup capability

• Low-side driver for synchronous operation

• 2% output voltage accuracy (over temperature)

• 500kHz (MIC24421) and 1MHz (MIC24420) switching

frequency

• Output voltage sequencing

The MIC24420 switching frequency is 1MHz and the

MIC24421 switching frequency is 500kHz. A patented

control scheme allows the use of a wide range of output

capacitance from small ceramic capacitors to large

electrolytic types with only one compensation component.

A 2% output voltage tolerance over the temperature range

allows the maximum level of system performance. The

MIC24420/MIC24421 power good signal allows full control

for sequencing the output voltages with minimum external

components.

• Programmable max current limit

• Power good output

• Ramp Control™ provides soft-start

• Low-side current sensing allows very low duty-cycle

• Works with ceramic output capacitors

• 24-pin 4mm x 4mm MLF^®package

• Junction temperature range of –40°C to +125°C

An adjustable current limit allows the use of smaller

inductors in lower current applications.

The MIC24420/MIC24421 is available in a ePad 24-pin

4mm x 4mm MLF^®package, and has an operating junction

temperature range of –40°C to +125°C.

Applications

• Multi-output power supplies with sequencing

• DSP, FPGA, CPU and ASIC power supplies

• Telecom and networking equipment, servers

_________________________________________________________________________________________________________________________

Typical Application

MIC24420 Dual Output Buck Converter

Ramp Control is a trademark of Micrel, Inc.

MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

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June 2012

Micrel, Inc.

MIC24420/MIC24421

Ordering Information

Switching

Frequency

Part Number

MIC24420YML

MIC24421YML

Notes:

Voltage

Adj

Temperature Range

-40°C to +125°C

Package

24-Pin 4mm x 4mm MLF^®

Lead Finish

Pb-Free

1MHz

Pb-Free

Adj

500kHz

1. MLF^®is GREEN RoHS compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.

2. MLF^®z= Pin 1 identifier

Pin Configuration

24-Pin 4mm x 4mm MLF (ML)

Pin Description

Pin Number

Pin Name

Pin Description

Boost 1 (Input): Provides voltage for high-side internal MOSFET for channel 1. Connect a

0.01µF capacitor from SW1 to BST1 pin and a diode to PVDD.

1

BST1

Low-side Drive 1 (Output): External low-side N-Channel MOSFET driver. Use 4.5V rated

MOSFETs.

2

3

4

LSD1

PGND1

CS1

Power Ground 1 (Input).

Current Sense 1 (Input): Place a resistor from SW1 to this pin to program the current limit point

from 0.5A to 2.7A.

Power Good 1 (Output): Open drain. Device is in the OFF state. i.e. high when output is within

90% of regulation.

5

6

PG1

Enable/Delay 1 (Input): This pin can be used to disable V_OUT1. When used to disable V_OUT1, this

pin must be pulled down to ground in less than 1µs for proper operation. It is also used for soft-

start of the output. Soft start capacitor range is 4.7nF to 22nF. See Functional Description

section for additional information.

EN/DLY1

7

8

COMP1

FB1

Compensation 1 (Input): Pin for external compensation, Channel 1.

Feedback 1 (Input): Input to Ch1 error amplifier. Regulates to 0.7V.

5V Internal Linear Regulator (Output): Connect to an external 4.7µF bypass capacitor. When

9

AVDD

AGND

V_INis <6V, this regulator operates in drop-out mode. Connect AVDD to VIN when V_IN<6V.

Analog Ground (Input): Control section ground. Connect to PGND.

10

11

12

FB2

Feedback 2 (Input): Input to Channel 2 error amplifier. Regulates to 0.7V.

Compensation 2 (Input): Pin for external compensation, Channel 2.

COMP2

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MIC24420/MIC24421

Pin Description (Continued)

Pin Number

Pin Name

Pin Description

Enable/Delay 2 (Input): This pin can be used to disable V_OUT2. When used to disable V_OUT2, this

pin must be pulled down to ground in less than 1µs for proper operation. It is also used for soft-

start of the output. Soft start capacitor range is 4.7nF to 22nF. See Functional Description

section for additional information.

13

EN/DLY2

Power Good 2 (Output) Open drain. Device is in the OFF state. i.e. high when output is within

90% of regulation

14

PG2

Current Sense 2 (Input) Place a resistor from SW2 to this pin to program the current limit point

from 0.5A to 2.7A

15

16

17

CS2

PGND2

LSD2

Power Ground 2 (Input)

Low-side Drive 2 (Output): External low-side N-Channel MOSFET driver. Use 4.5V rated

MOSFETs.

Boost 2 (Input): Provides voltage for high-side internal MOSFET for Channel 2. Connect a

0.01µF capacitor from SW2 to BST2 pin and a diode to PVDD.

18

BST2

19

20

SW2

Switch Node 2 (Output): Source of internal high-side power MOSFET.

VIND2

Supply voltage (Input): For the drain of internal high-side power MOSFET 4.5V to 13.2V.

5V VDD input (input): Power connection to the internal MOSFET drivers. Connect to AVDD

through an RC filter

21

PVDD

22

23

24

EP

VIN

VIND1

SW1

Supply voltage (Input): For the internal 5V linear regulator. 4.5V to 13.2V.

Supply voltage (Input): For the drain of internal high-side power MOSFET 4.5V to 13.2V.

Switch Node 1 (Output): Source of internal high-side power MOSFET.

ePad

Exposed thermal pad for package only. Connect to ground. Must make a full connection to the

ground plane to maximize thermal performance of the package.

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Micrel, Inc.

MIC24420/MIC24421

Absolute Maximum Ratings⁽¹⁾

Operating Ratings⁽²⁾

V_INto PGND .................................................... –0.3V to 16V

V_IND1, V_IND2to PGND........................................ –0.3V to 16V

V_DDto PGND ..................................................... –0.3V to 6V

V_SW1, V_SW2to PGND ............................–0.7V to (V_IN+ 0.3V)

V_CS1, V_CS2to PGND .............................–0.7V to (V_IN+ 0.3V)

V_BST1to V_SW1, V_BST2to V_SW2............................... –0.3V to 6V

V_BST1, V_BST2to PGND.................................–0.3V to V_SW+6V

V_EN/DLY, V_COMP, V_FB, V_PGto PGND ....–0.7V to (V_AVDD+ 0.3V)

PGND1, PGND2 to AGND........................... –0.3V to +0.3V

Junction Temperature ................................................ 150°C

Storage Temperature ...............................–65°C to +150°C

Lead Temperature (soldering, 10 sec.)...................... 260°C

ESD Rating ⁽³⁾................................................ ESD Sensitive

Supply Voltage (V_IN)...................................... +4.5V to +15V

Output Voltage Range (V_OUT)……………......0.7V to 0.7*V_IN

Maximum Output Current (I_OUT)…………….. ................2.5A

Junction Temperature (T_J) ........................–40°C to +125°C

Junction Thermal Resistance

4mmx4mm MLF-24L (θ_JC) .................................14°C/W

4mmx4mm MLF-24L (θ_JA) .................................35°C/W

Electrical Characteristics⁽⁴⁾

V_IN= 12V; V_EN=5V; V_OUT=1.8V; I_LOAD=10mA; T_A= 25°C, bold values indicate –40°C≤ T_J≤ +125°C, unless noted.

Parameter

Condition

Min

Typ

Max

Units

Power Input Supply

Input Voltage Range (V_IN)

Quiescent Supply Current

Shutdown Current

4.5

15

7

V

V_FB= 0.8V, I_OUT= 0A; Both outputs not switching

V_EN1= V_EN2= 0V

2.6

25

mA

µA

V

50

V_INUVLO Turn-On Threshold

V_INUVLO Hysteresis

VDD Supply

V_INRising, V_DD= V_IN

3.6

4.1

400

4.45

mV

V_DD= V_IN

Internal Bias Voltages A_VDD

Reference (Each Channel)

Feedback Reference Voltage

FB Bias Current

V_FB= 0.8V, I_AVDD= 50mA

4.7

5.1

5.45

V

686

700

5

714

mV

nA

V_FB= 0.7V

FB Line Regulation

V_IN= 6V to 15V, I_{OU T}= 10mA

V_IN= 6V to 15V , V_OUT= 1.8V, I_{OU T}= 1A; each channel

0.005

0.15

%/V

%

Output Voltage Line Regulation

Output Voltage Load Regulation V_OUT= 1.8V, I_{OU T}= 0A to 2A; each channel

V_IN= 6V to 15V , I_{OU T}= 0.25A to 2A, V_OUT= 1.8V ; each

Output Voltage Total Regulation

channel

0.1

%

External Current Sense, Adjustable

Current Limit Trip Point Current

Sourcing current

175

200

750

0

225

µA

ppm/°C

mV

Current Limit Temperature

Coefficient

T_J= -40°C to 125°C

Current Limit Comparator Offset

-20

10

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MIC24420/MIC24421

Electrical Characteristics⁽⁴⁾(Continued)

Parameter

Condition

Min

Typ

Max

Units

Oscillator / PWM

MIC24420

MIC24421

MIC24420

MIC24421

0.8

0.4

70

1

1.2

0.6

Switching Frequency

Maximum Duty Cycle

MHz

0.5

76

90

60

%

85

Minimum On-Time

I

_LOAD> 200mA ⁽⁵⁾

ns

High-side Internal MOSFET

On Resistance R_DS(ON)

I_FET= 1A, V_FB=0.8V

150

mΩ

Low-side MOSFET Driver

Pull Up, I_SOURCE= 10mA

Pull Down; I_SINK= 10mA

Rising Into 1000pF

Falling Into 1000pF

(Adaptive)

4

2.5

12

9

Ω

DH On-Resistance

DH Transition Time

ns

Driver Non-overlap Dead Time

EN/DLY and Soft-start Control

EN/DLY Pull-up Current

A_VDDThreshold

25

V_EN/DLY1= V_EN/DLY2= 0V

A_VDDturns on

5.5

0.4

1.1

2

7

8.5

0.65

1.8

µA

V

0.58

1.35

2.4

Soft-start Begins Threshold

Soft-start Ends Threshold

Power Good

Channel soft-start begins

Channel soft-start ends

V

2.8

V

PG Threshold Voltage

PG Output Low Voltage

PG Leakage Current

V_OUTRising (% of V_OUTnominal)

V_FB= 0V, I_PG= 1mA

85

90

0.08

5

95

%Nom

V

0.3

V_FB= 800mV, V_PG= 5.5V

nA

Thermal Protection

Over-temperature Shutdown

T_JRising

165

22

°C

Over-temperature Shutdown

Hysteresis

Notes:

1. Exceeding the absolute maximum rating may damage the device.

2. The device is not guaranteed to function outside its operating rating.

3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5kΩ in series with 100pF.

4. Specification for packaged product only.

5. Minimum on-time before automatic cycle skipping begins. See applications section.

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Micrel, Inc.

MIC24420/MIC24421

Typical Characteristics

Enable and Switching Start

Operating Current vs Input

Voltage (O/P regulating)

UVLO vs Temperature

Thresholds vs. V_IN

4.25

45

40

35

30

25

20

15

10

5

1.6

1.4

1.2

1

4.2

MIC24420

4.15

SW on

UVLO rising

4.1

V_DDon

4.05

0.8

0.6

0.4

0.2

0

UVLO falling

4

MIC24421

3.95

3.9

V_DDoff

V_OUT1/2= 1.2V/3.3V

No Load

3.85

0

4

6

8

10

12

14

16

-60 -40 -20

0

20

40

60

80 100 120 140

4

6

8

10

12

14

16

V_IN(V)

Temperature (°C)

Input Voltage (V)

Current Limit trip Voltage vs

Temperature

Regulation vs. Load

V_IN= 12V

Regulation vs. Input Voltage

10

5

3.4

3.38

3.36

3.34

3.32

3.3

3.40

3.38

3.36

3.34

3.32

3.30

3.28

3.26

3.24

3.22

3.20

0

-5

3.28

3.26

3.24

3.22

3.2

-10

-15

-20

V_OUT= 3.3V

= 12V

V_IN= 12V

V_OUT= 3.3V

V

IN

-60 -40 -20

0

20 40 60 80 100 120 140

5

7

9

11

13

15

0

0.5

1

1.5

2

TEMPERATURE (°C)

INPUT VOLTABE (V)

OUTPUT CURRENT (A)

Efficiency vs. Load

V_IN= 5V

Efficiency vs. Load

V_IN= 12V

Current Sense Source Current

vs Temperature

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0%

225

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0%

215

205

195

185

175

165

V_OUT= 0.7V

V_OUT= 1.2V

V_OUT= 3.3V

V_OUT= 5V

V_OUT= 3.3V

V_OUT= 0.7V

V_OUT= 1.2V

V

IN

= 12V

V

= 12V

V

= 5V

IN

0

0.5

1

1.5

2

2.5

0

0.5

1

1.5

2

2.5

-60 -40 -20

0

20 40 60 80 100 120 140

OUTPUT CURRENT (A)

TEMPERATURE (°C)

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MIC24420/MIC24421

Functional Characteristics

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MIC24420/MIC24421

Functional Characteristics (Continued)

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Micrel, Inc.

MIC24420/MIC24421

Functional Characteristics (Continued)

Bode Plot MIC24420

(12V to 5V @ 1.5A)

Bode Plot MIC24421

(12V to 5V @ 1.5A)

180

144

108

72

180

144

108

72

50

40

50

40

30

20

36

10

0

-36

-72

-108

-144

-180

-36

-72

-108

-144

-180

-10

-20

-30

-40

-50

-10

-20

-30

-40

-50

Gain

Phas e

1

10

100

1000

1

10

100

1000

FREQUENCY (kHz)

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Micrel, Inc.

MIC24420/MIC24421

Functional Diagram

PWM Core

MIC24420 Block Diagram

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Micrel, Inc.

MIC24420/MIC24421

A 4.7µF ceramic capacitor should be used to decouple

AVDD to ground.

Functional Description

The MIC24420/MIC24421 are dual output, synchronous

buck regulators. Output regulation is performed using a

fixed frequency, voltage mode control scheme. The fixed

frequency clock drives the two sections 180° out of

phase, which reduces input ripple current.

EN/DLY pin

The EN/DLY pins are used to turn on, turn off and soft-

start the outputs. The pins can be controlled with an

open collector or open drain device as shown in Figure

1. It must not be actively driven high or damage will

result. When disabling the output with an external

device, the enable pin turn-off time must be less than

1µs.

Oscillator

An internal oscillator provides a clock signal to each of

the two sides. The clock signals are 180° out of phase

with the other. Each phase is used to generate a ramp

for the PWM comparator and a clock pulse that

terminates the switching cycle. The MIC24420 &

MIC24421 oscillator frequencies are nominally 1MHz

and 500 kHz respectively.

UVLO

The UVLO monitors voltage on the VIN pin. The circuit

controls both regulators (side1 and side2). It disables the

output drivers and discharges the EN/DLY capacitor

when VIN is below the UVLO threshold. As VIN rises

above the threshold, the internal high-side FET drivers

and external low-side drives are enabled and the

EN/DLY pins are released.

Figure 1. Enable and soft-start circuit

A low impedance source should be used to supply input

voltage to the MIC24420/MIC24421. When VIN drops

below the UVLO threshold and the outputs turn off, the

change in input current will cause VIN to rise. The

output voltage will momentarily turn back on if the rise in

VIN is greater than the UVLO hysteresis.

The preferred method is to use the EN/DLY pins, as

shown in Figure 1, for startup and shutdown of the

outputs. This avoids the possibility of glitching during

startup and shutdown. If an external control signal is not

available, the circuit in Figure 1A may be used to set a

higher turn-on and turn-off threshold than the internal

UVLO circuit. Moreover, the hysteresis is adjustable and

can accommodate a wider input source impedance

range. Please refer to the MIC841 datasheet for

additional information on selecting the resistor values.

Figure 1A. Adjustable UVLO startup circuit

Minimum Output Load when Disabled

Regulator/Reference

When one output is disabled and the other enabled, the

disabled output requires a minimum output load to

prevent its output voltage from rising. Typically a 2kꢀ

load on the output will keep the output voltage below

100mV. The output setting voltage divider resistors may

be used for the 2kꢀ load if the total resistance is set low

enough. A separate output resistor should be used for

lower output voltages since the voltage divider

resistance becomes impractically low.

The internal regulator generates an AVDD pin voltage

that powers the internal analog circuit blocks of the low

level analog and digital sections. The AVDD voltage is

also used by the bandgap to generate a nominal 700mV

for the error amplifier reference. The output undervoltage

and power good circuits use the bandgap for their

references. PVDD powers the high-side MOSFET and

low-side gate drive circuits.

The dropout of the internal regulator causes AVDD to

drop when VIN is below 6V. When operating below 6V,

the AVDD pin must be jumpered to VIN. This bypasses

the internal LDO and prevents AVDD from dropping out.

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MIC24420/MIC24421

Soft-start

can be connected to another regulator’s EN/DLY pin for

sequencing of the outputs. A pull-up resistor is not used

when the power good pin is connected to another

regulators EN/DLY pin.

Enable and soft-start waveforms are shown in Figure 2.

Output Sequencing

Sequencing of the outputs can be easily implemented as

shown in Figure 3. The power good pin is used to

disable V_OUT2until the V_OUT1reaches regulation.

Sequencing waveforms are shown in Figure 4.

Figure 2. Soft-start Timing Diagram

A capacitor, C_SS, is connected to the EN/DLY pin. The

C_SScapacitor range is 4.7nF to 22nF. Releasing the pin

allows an internal current source to charge the capacitor.

The delay (t_D) between the EN/DLY pin release and

when V_OUTstarts to rise can be calculated by the

equation below.

C_SS× V_{Threshold_Start}

Figure 3. Output Sequencing

t_D

=

I_SS

Where:

_SSis the soft-start capacitor.

_SSis the internal soft-start current (7µA nominal).

C

I

V_{Threshold_start}is the EN/DLY pin voltage where the output

starts to rise (1.35V nominal).

The output voltage starts to rise when voltage on the

EN/DLY pin reaches the start threshold. The output

voltage reaches regulation when the EN/DLY pin voltage

reaches the end threshold. The output voltage rise time

(t_R) can be calculated by the equation below:

C_SS×(V_{Threshold_End}−V_{Threshold_Start}

)

t_R=

I_SS

Where:

V_{Threshold_End}is the EN/DLY pin voltage where the output

reaches regulation (2.4V nominal).

As the MIC24420/MIC24421 uses a fold-back, hiccup

mode current limit, care should be taken to select t_Rto

ensure startup. See application information for details.

Figure 4. Output Sequencing Waveforms

Power Good

Power good is an open drain signal that asserts when

V_OUTexceed the power good threshold. The circuit

monitors the FB pin. The internal FET is turned on while

the FB voltage is below the FB threshold. When voltage

on the FB in exceeds the FB threshold, the FET is

turned off. A pull-up resistor can be connected to PVDD

or an external source. The external source voltage must

not exceed the maximum rating of the pin. The PG pin

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MIC24420/MIC24421

High-side Drive

discharging the gate through the LSD pin. The return

path is through the PGND pin and back to the

MOSFET’s Source pin. These circuit paths must be kept

short to minimize noise. See the layout section for

additional information.

The internal high-side drive circuit is designed to switch

the internal N-channel MOSFET. Figure 5 shows a

diagram of the high-side MOSFET, gate drive and

bootstrap circuit. D2 and C_BSTcomprise the bootstrap

circuit, which supplies drive voltage to the high-side

MOSFET. Bootstrap capacitor C_BSTis charged through

diode D2 when the low-side MOSFET turns on and pulls

the SW pin voltage to ground. When the high-side

MOSFET driver is turned on, energy from C_BSTcharges

the MOSFET gate, turning it on. Voltage on the SW pin

increases to approximately V_IN. Diode D2 is reversed

biased and C_BSTflies high while maintaining gate voltage

on the high-side MOSFET.

Driving the low-side MOSFET on and off dissipates

power in the MIC24420/21 regulator. The power can be

calculated by the equation below:

P_DRIVER= Q_G× V × f_S

IN

Where:

P_DRIVERis the power dissipated in the regulator by

switching the MOSFET on and off.

Q_Gis the total Gate charge of the MOSFET at V_GS

P_VDD.

=

A resistor should be added in series with the BST1 and

BST2 pins. This will slow down the turn-on time of the

high-side MOSFET while leaving the turn-off time

unaffected. Slowing down the MOSFET risetime will

reduce the turn-on overshoot at the switch node, which

is important when operating with an input voltage close

to the maximum operating voltage.

V_INis the input voltage to the internal A_VDDregulator.

f_Sis the switching frequency of the regulator

(1MHz/500kHz nominal).

dV/dt Induced Turn-on of the Low-side MOSFET

As the high-side MOSFET turns on, the rising dv/dt on

the switch-node forces current through C_GDof the low-

side MOSFET causing a glitch on its gate. Figure 6

demonstrates the basic mechanism causing this issue. If

the glitch on the gate is greater than the MOSFET’s turn-

on threshold, it may cause an unwanted turn-on of the

low-side MOSFET while the high-side MOSFET is on. A

short circuit between input and ground would

momentarily occur, which lowers efficiency and

increases power dissipation in both MOSFETs.

Additionally, turning on the low-side MOSFET during the

off-time could interfere with overcurrent sensing.

The recommended capacitor for C_BSTis a 0.01µF

ceramic capacitor. The recommended value for R_BSTis

20ꢀ to 60ꢀ.

Figure 5. High-side Drive Circuitry

Low-side Drive Output

The LSD pin is used to drive an external MOSFET. This

MOSFET is driven out of phase with the internal high-

side MOSFET to conduct inductor current during the

high-side MOSFETs off-time. Circuitry internal to the

regulator prevents short circuit “shoot-through” current

from flowing by preventing the high-side and low-side

MOSFETs conducting at the same time.

Figure 6. dV/dt induced turn-on of the low-side MOSFET

The low-side MOSFET gate voltage is supplied from

PVDD. Turn off of the MOSFET is accomplished by

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MIC24420/MIC24421

The following steps can be taken to lower the gate drive

impedance, minimize the dv/dt induced current and

lower the MOSFET’s susceptibility to the induced glitch:

•

Choose a low-side MOSFET with a high

C_GS/C_GDratio and a low internal gate resistance.

Do not put a resistor between the LSD output

and the gate.

Ensure both the gate drive and return etch are

short, low inductance connections.

Use a 4.5V V_GSrated MOSFET. It’s higher gate

threshold voltage is more immune to glitches

than a 2.5V or 3.3V rated MOSFET. MOSFETs

that are rated for operation at less than 4.5 V_GS

should not be used.

Figure 7. Over-current Circuit

Inductor current, I_L, flows from the lower MOSFET

source to the drain during the off-time, causing the drain

voltage to become negative with respect to ground. This

negative voltage is proportional to the instantaneous

inductor current times the MOSFET R_DS(ON). The low-

side MOSFET voltage becomes even more negative as

the output current increases.

•

Add a resistor in series with the BST pin. This

will slow down the turn-on time of the high-side

MOSFET while leaving the turn-off time

unaffected.

Pre-biased output protection:

The over-current circuit operates by passing a known

fixed current source through a resistor R_CS. This sets up

an offset voltage (I_CSx R_CS) that is compared to the V_DS

of the low-side MOSFET. When I_SD(source-to-drain

current) x R_DS(ON)is equal to this voltage the soft-start

circuit is reset and a hiccup current mode is initiated to

protect the power supply and load from excessive

current during short circuits. Fold back current limiting is

recommended to protect the switch devices during short

circuit faults. For more information on this, see the

application information section.

It is desirable in synchronous step down converters such

as MIC24420/MIC24421, to prevent the low-side

MOSFET from switching during startup or short periods

in an idle state, since during these times it is possible

that a voltage exists on the output of the converter. If the

low-side switch is allowed to operate, uncontrolled in this

state, large transient voltages can be created at the

switching nodes by ‘open-loop boost’ operation. To

prevent this unwanted operation, the MIC24420/24421

will gradually increase switching cycles on the low-side

MOSFET in ratio to the soft start ramping waveform. Full

operation of the low-side driver is achieved when the

ramp reaches the soft start end threshold (nominally

2.4V) when output voltage is at its nominal level.

Current Limit Calculations and Maximum Peak Limit

Proper current limiting requires careful selection of the

inductor value and saturation current. If a short circuit

occurs during the off-time, the overcurrent circuit will

take up to a full cycle to detect the overcurrent once it

exceeds the over-current limit. The worst case occurs if

the output current is 0A and a hard short is applied to the

output. The short circuit causes the output voltage to fall,

which increases the pulse width of the regulator. It may

take 3 or 4 cycles for the current to build up in the

inductor before current limit forces the part into hiccup

mode. The wider pulse width generates a larger peak to

peak inductor current which can saturate the inductor.

Current Limit

The MIC24420/MIC24421 use the synchronous (low-

side) MOSFET’s R_DS(ON)to sense an over-current

condition. The low-side MOSFET is used because it

displays lower parasitic oscillations after switching than

the upper MOSFET. Additionally, reduces false tripping

at lower voltage outputs and narrow duty cycles since

the off-time increases as duty cycle decreases. Figure 7

shows how over-current protection is performed using

the low-side MOSFET.

For this reason, the minimum inductor values for the

MIC24420/MIC24421 are 10µH/22µH respectively and

the maximum peak current limit set-point is 2.7A. The

saturation current for each of these inductors should be

at least 1.5A higher than the overcurrent limit setting.

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Micrel, Inc.

MIC24420/MIC24421

Voltage Setting Components

Thermal Protection

The regulator requires two external resistors to set the

output voltage as shown in Figure 8.

The internal temperature of the regulator is monitored to

prevent damage to the device. Both outputs are inhibited

from switching if the over-temperature threshold is

exceeded. Hysteresis in the circuit allows the regulator

to cool before turning back on.

Figure 8. Setting the Output Voltage

The output voltage is determined by the equation below.

R1

R2

⎛

⎞

⎟

V_OUT= V_REF× 1+

⎜

⎝

⎠

Where: V_REFis 0.7V nominal.

If the voltage divider resistance is used to provide the

minimum load (see EN/DLY section) then R1 should be

low enough to provide the necessary impedance.

Once R1 is selected, R2 can be calculated with the

following formula.

V_REF× R1

R2 =

V_OUT− V_REF

And

R2 + R1< 2kΩ

Minimum Pulse Width

Output voltage is regulated by adjusting the on-time

pulse width of the high-side MOSFET. This is

accomplished by comparing the error amplifier output

with a sawtooth waveform (see block diagram). The

pulse width output of the comparator becomes smaller

as the error amplifier voltage decreases. Due to

propagation delay and other circuit limitations, there is a

minimum pulse width at the output of the comparator. If

the error amplifier voltage drops any further, the output

of the comparator will be low.

The PWM circuit will skip pulses if a smaller duty cycle is

required to maintain output voltage regulation. This

effectively cuts the output frequency in half.

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Micrel, Inc.

MIC24420/MIC24421

usually available from the magnetics vendor.

Application Information

Input Capacitor

Component Selection

A 10μF ceramic is suggested on each of the V_INpins for

bypassing. X5R or X7R dielectrics are recommended for

the input capacitor. Y5V dielectrics should not be used.

Besides losing most of their capacitance over

temperature, they also become resistive at high

frequencies, which reduce their ability to filter out high

frequency noise.

Inductor

The value of inductance is determined by the peak-to-

peak inductor current. Higher values of inductance

reduce the inductor current ripple at the expense of a

larger inductor. Smaller inductance values allow faster

response to output current transients but increase the

output ripple voltage and require more output

capacitance.

Output Capacitor

The MIC24420/MIC24421 regulator is designed for

ceramic output capacitors although tantalum and

Aluminum Electrolytic may also be used.

The inductor value and saturation current are also

controlled by the method of overcurrent limit used (see

explanation in the previous section). The minimum value

of inductance for the MIC24420/MIC24421 is

10µH/22µH.

Output ripple voltage is determined by the magnitude of

inductor current ripple, the output capacitor’s ESR and

the value of output capacitance. When using ceramic

output capacitors, the primary contributor to output ripple

is the value of capacitance. Output ripple using ceramic

capacitors may be calculated using the equation below:

The peak-to-peak ripple current may be calculated using

the formula below.

V_OUT⋅ (η ⋅ V_IN(max)− V_OUT

η ⋅ V_IN(max)⋅ f_S⋅L

)

I_PP

=

I_PP

C_OUT

≥

8 ⋅ ΔV_OUT⋅ 2 ⋅ f_S

Where:

I_PPis the peak-to-peak inductor ripple current

L is the value of inductance

Where:

ΔV_OUTis the peak-to-peak output voltage ripple

f_Sis the switching frequency of the regulator

η is the efficiency of the power supply

I_PPis the peak-to-peak ripple current as see by the

capacitors

f_Sis the switching frequency (1MHz nominal).

Efficiency values from the Functional Characteristics

section can be use for these calculations.

When using tantalum or aluminum electrolytic

capacitors, both the capacitance and ESR contribute to

output ripple. The total ripple is calculated below:

The peak inductor current in each channel is equal to the

average output current plus one half of the peak to peak

inductor ripple current.

2

⎡

⎤

I_PP

2

I_PK= I_OUT+ 0.5 ×I_PP

The RMS inductor current is used to calculate the I²R

ΔV_OUT

=

+

[I_PP⋅R_ESR

]

⎢

⎣

⎥

⎦

8⋅C_OUT⋅2⋅f_S

losses in the inductor.

2

⎛

⎜

⎞

⎟

The output capacitor RMS current is calculated below:

I_PP

1

3

I_PP

I

=

⋅ 1+

I_OUT

INDUCTOR_RMS

⎜

⎝

⎟

⎠

I_OUT

I_COUT

=

RMS

12

Maximizing efficiency requires the proper selection of

core material and minimizing the winding resistance. The

high frequency operation of the MIC24420/MIC24421

requires the use of ferrite materials. Lower cost iron

powder cores may be used but the increase in core loss

will reduce the efficiency of the power supply. This is

especially noticeable at low output power. The inductor

winding resistance decreases efficiency at the higher

output current levels. The winding resistance must be

minimized although this usually comes at the expense of

a larger inductor.

The power dissipated in the output capacitors can be

calculated by the equation below:

2

P

=

(

I

)

⋅R_ESR

DISS_COUT

COUT_RMS

Soft start capacitor considerations:

Where a large amount of capacitance is present at the

output of the regulator, a fast rising output voltage can,

in extreme circumstances (since I=Cdv/dt), cause

current limit to operate and prevent startup. In order to

avoid this situation, the following equation can be used

to ensure t_R(output rise time) is set correctly.

The power dissipated in the inductor equals the sum of

the core and copper losses. Core loss information is

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Micrel, Inc.

MIC24420/MIC24421

C_OUT⋅V_OUT⋅I_SS

Short Circuit Protection

C_SS>

I_{S /C}

It is recommended that a fold-back current characteristic

be implemented to protect both external and internal

MOSFETs during short circuit (S/C) events. This can be

achieved by the addition of one additional resistor R_FBK

(R14 & R19 on the evaluation board) from V_OUTto the

CS pin.

Where

I_S/Cis the short circuit, fold-back current limit.

_SSis the capacitor connected to EN/DLY pin

_SSis the EN/DLY pull up current.

C

I

Current Limit Resistor

The current limit circuit responds to the peak inductor

current flowing through the low-side FET. Calculating the

current setting resistor R_CSshould take into account the

peak inductor current and the blanking delay of

approximately 100ns.

Figure 9a. Short Circuit Protection

Current limit will occur at:

⎛

⎞

V_OUT⋅ R_CS

1

⎜

⎟

I_OC

=

⋅ I_CS⋅ R_CS

+

−V_{CS _OFF}

⎜

⎝

R_DS(ON)

R_FBK

⎠

Where V_{CS_OFF}is the CS comparator offset voltage.

Figure 9. Overcurrent waveform

For simplicity, assuming V_{CS_OFF}is 0V, we can set I_S/C

(current limit when V_OUT= 0V) to be half I_OC(current limit

when V_OUT= nominal):

Figure 9 shows the low-side MOSFET current waveform.

Peak current is measured after a small delay. The

equations used to calculate the current limit resistor

value are shown below:

I_OC⋅ R_DS(ON)

R_CS

=

I_CS⋅2

V_OUT

I_PP

R_FBK

=

I_PK= I_OUT

⋅

I_CS

2

To determine worst case values, one must take into

account V_CSoffset voltage, I_CSrange and the range of

values for R_DS(ON)over the operating temperature range.

V_OUT⋅t_DLY

I_OC= I_PK−

L

I_OC⋅RDS_ON

Some typical example values for a 30mΩ MOSFET:

R_CS

=

I_CS

V_OUT

I_OC

3.3A

4.3A

3.3A

4.3A

3.3A

4.3A

I_S/CR_CS

R_FBK

1.7

249

24.9k

16k

Where:

_OCis the current limit set point

L = inductor value

5

I

16.5k

10.5k

5.1k

3.3

1.2

t

_DLY= Current limit blanking time ~ 100ns

I

_CSis the overcurrent pin sense current (200µA nominal)

R

_DS(ON)is the on resistance of the low-side MOSFET

3.83k

Due to the leading edge blanking, a 100ns slew rate for

the CS pin can be applied without interfering with current

limit operation. Limiting the CS pin’s slew rate will help to

prevent false triggering. A C·R product of at least 20ns

should be used.

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Micrel, Inc.

MIC24420/MIC24421

E.G. Where R_CS= 250ꢀ, C_CS= 82pF

is outlined below.

1. Measure the ringing frequency at the switch node

which is determined by parasitic L_Pand C_P. Define this

frequency as f₁.

Snubber

A snubber is used to damp out high frequency ringing

caused by parasitic inductance and capacitance in the

buck converter circuit. Figure 10 shows a simplified

schematic of one of the buck converter phases. Stray

capacitance consists mostly of the output capacitance

(C_OSS) of the two MOSFET’s. The stray inductance is

mostly package and etch inductance. The arrows show

the resonant current path when the high-side MOSFET

turns on. This ringing causes stress on the

semiconductors in the circuit as well as increased EMI.

2. Add a capacitor C_S(normally at least 3 times as big as

the C_OSSof the FET) from the switch node to ground and

measure the new ringing frequency. Define this new

(lower) frequency as f₂. L_Pand C_Pcan now be solved

using the values of f₁, f₂and C_S.

3. Add a resistor R_Sin series with C_Sto generate critical

damping.

Step 1: First measure the ringing frequency on the

switch node voltage when the high-side MOSFET turns

on. This ringing is characterized by the equation:

1

f₁=

2π L_P⋅ C_P

Where:

C_Pand L_Pare the parasitic capacitance and inductance

Step 2: Add a capacitor, C_S, in parallel with the

synchronous MOSFET, Q2. The capacitor value should

be approximately 3 times the C_OSSof Q2. Measure the

frequency of the switch node ringing, f_2.

1

f₂=

2π L_P⋅(C_S+ C_P)

Figure 10. Output Parasitics

Define f’ as:

f₁

f'=

One method of reducing the ringing is to use a resistor to

lower the Q of the resonant circuit. The circuit in Figure

11 shows an RC network connected between the switch

node and ground. Capacitor C_Sis used to block DC and

minimize the power dissipation in the resistor. This

capacitor value should be between 5 and 10 times the

parasitic capacitance of the MOSFET C_OSS. A capacitor

that is too small will have high impedance and prevent

the resistor from damping the ringing. A capacitor that is

too large causes unnecessary power dissipation in the

resistor, which lowers efficiency.

f₂

Combining the equations for f₁, f₂and f’ to derive C_P, the

parasitic capacitance

C_S

2 ⋅ (f^')²− 1

C_P

=

L_Pis solved by re-arranging the equation for f₁.

1

L_P

=

2

(

2π

)

⋅ C_P⋅ (f₁)²

The snubber components should be placed as close as

possible to the low-side MOSFET and/or external

Schottky diode since it contributes to most of the stray

capacitance. Placing the snubber too far from the

MOSFET or using traces that are too long or too thin

adds inductance to the snubber and diminishes its

effectiveness.

Step 3: Calculate the damping resistor.

Critical damping occurs at Q=1

1

L_P

Q =

= 1

R_SC_S+ C_P

Solving for R_S

L_P

Proper snubber design requires the parasitic inductance

and capacitance be known. A method of determining

these values and calculating the damping resistor value

R_S

=

C_S+ C_P

Figure 11 shows the snubber in the circuit and the

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Micrel, Inc.

MIC24420/MIC24421

damped switch node waveform.

Q_Gis the gate charge for both of the external MOSFETs.

This information should be obtained from the

manufacturer’s data sheet.

Since current from the gate drive is supplied by the input

voltage, power dissipated in the MIC24420/MIC24421

due to gate drive is:

P_{GATE_DRIVE}= Q_G⋅ f_S⋅ V_IN

Parameters that are important to MOSFET selection are:

•

Voltage rating

On resistance

Total gate charge

The MOSFET is subjected to a V_DSequal to the input

voltage. A safety factor of 20% should be added to the

V_DS(max)of the MOSFET to account for voltage spikes

due to circuit parasitics. Generally, 30V MOSFETs are

recommended for all applications since lower V_DSrated

MOSFETs tend to have a V_GSrating that is lower than

the recommended 4.5V.

Figure 11. Snubber Circuit

The snubber capacitor, C_S, is charged and discharged

each switching cycle. The energy stored in C_Sis

dissipated by the snubber resistor, R_S, two times per

switching period. This power is calculated in the

equation below.

RMS Current and MOSFET Power Dissipation

Calculation

Switching loss in the low-side MOSFET can be

neglected since it is turned on and off at a V_DSof 0V.

The power dissipated in the MOSFET is mostly

conduction loss during the on-time (P_CONDUCTION).

2

P_snubber= f_S⋅ C_S⋅ V_IN

Where:

P_CONDUCTION= I_{SW_RMS}²⋅R_DS(ON)

f_Sis the switching frequency for each phase

V_INis the DC input voltage

Where:

Low-side MOSFET Selection

R

_DS(ON)is the on resistance of the MOSFET switch.

An external N-channel logic level power MOSFET must

be used for the low-side switch. The MOSFET gate to

source drive voltage of the MIC24420/MIC24421 is

regulated by an internal 5V regulator. Logic level

MOSFETs, whose operation is specified at V_GS= 4.5V

must be used. Use of MOSFETs with a lower specified

V_GS(such as 3.3V or 2.5V) are not recommended since

the low threshold can cause them to turn on when the

high-side FET is turning on. When operating the

regulator below a 6V input, connect V_DDto V_INto prevent

the V_DDregulator from dropping out.

The RMS value of the MOSFET current is:

2

I_PP

2

I_{SW_RMS}= (1− D) ⋅ (I_{OUT_MAX}

+

)

12

Where:

D is the duty-cycle of the converter

I_PPis the inductor ripple current

V_OUT

D =

η ⋅ V_IN

Total gate charge is the charge required to turn the

MOSFET on and off under specified operating conditions

(V_DSand V_GS). The gate charge is supplied by the

regulator’s gate drive circuit. Gate charge is a source of

power dissipation in the regulator due to the high

switching frequencies. At low output load this power

dissipation is noticeable as a reduction in efficiency. The

average current required to drive the MOSFETs is:

Where:

η is the efficiency of the converter.

External Schottky Diode

A freewheeling diode in parallel with the low-side

MOSFET is needed to maintain continuous inductor

current flow while both MOSFETs are turned off (dead-

time). Dead-time is necessary to prevent current from

flowing unimpeded through both MOSFETs. An external

Schottky diode is used to bypass the low-side

MOSFET’s parasitic body diode. An external diode

I_DD= Q_G⋅ f_S

Where:

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Micrel, Inc.

MIC24420/MIC24421

improves efficiency due to its lower forward voltage drop

as compared to the internal parasitic diode in the

MOSFET. It may also decrease high frequency noise

because the schottky diode junction does not suffer from

reverse recovery.

s

1+

ωz

Gfilter(s) =

2

s

1+

+

Q

ωo

An external Schottky diode conducts at a lower forward

voltage preventing the body diode in the MOSFET from

turning on. The lower forward voltage drop dissipates

less power than the body diode. Depending on the circuit

components and operating conditions, an external

Schottky diode may give up to 1% improvement in

efficiency.

Where:

1

ωz =

ωo =

C_O⋅R_ESR

1

C_O⋅L_O

Compensation

C_O

The voltage regulation, filter and power stage sections

are shown in Figure 12. The error amplifier regulates the

output voltage and compensates the voltage regulation

loop. It is a simplified type III compensator utilizing two

compensating zeros and two poles. Figure 12 also

shows the transfer function for each section.

Q = R ⋅

L

The Modulator gain is proportional to the input voltage

and inversely proportional to the internal ramp voltage

generated by the oscillator. The peak-to-peak ramp

voltage is 1V.

Compensation is necessary to insure the control loop

has adequate bandwidth and phase margin to properly

respond to input voltage and output current transients.

High gain at DC and low frequencies is needed for

accurate output voltage regulation. Attenuation near the

switching frequency prevents switching frequency noise

from interfering with the control loop.

⎛

⎜

⎞

⎟

V_IN

Gmod =

V_RAMP

⎝

⎠

The output voltage divider attenuates V_OUTand feeds it

back to the error amplifier. The divider gain is:

V_REF

R4

H =

=

R1+ R4 V_OUT

The output filter contains a complex double pole formed

by the capacitor and inductor and a zero from the output

capacitor and its ESR. The transfer function of the filter

is:

Figure 12. Voltage Loop and Transfer Functions

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Micrel, Inc.

MIC24420/MIC24421

The modulator, filter and voltage divider gains can be

multiplied together to show the open loop gain of these

parts.

s

⎛

⎜

⎞⎛

⎟⎜

⎞

⎟

1+

ωz1

s

ωz2

s

⎝

⎛

⎠⎝

⎞⎛

⎠

⎞

Gea(s) = G_DC

×

⎜

⎟⎜

⎟

1+

Gvd(s) = Gfilter(s)⋅H⋅ Gmod

ωp1

ωp2

⎝

⎠⎝

⎠

This transfer function is plotted in Figure 13. At low

frequency, the transfer function gain equals the

modulator gain times the voltage divider gain. As the

frequency increases toward the LC filter resonant

frequency, the gain starts to peak. The increase in the

gain’s amplitude equals Q. Just above the resonant

frequency, the gain drops at a -40db/decade rate. The

phase quickly drops from 0° to almost 180° before the

phase boost of the zero brings it back up to -90°. Higher

values of Q will cause the phase to drop quickly. In a

well damped, low Q system the phase will change more

slowly.

The G_DCis the DC gain of the error amplifier. It is

internally set to 2500 (68dB).

As illustrated in Figure 12, there are two compensating

zeros. ωz1 is internally set with R3 and C3. The zero

frequency is fixed at

a

nominal 16kHz in the

MIC24420/MIC24421. The second zero, ωz2, is set by

the external capacitor, C2.

For the MIC24420:

R3 = 100k

C3 = 100pf

1

As the Gain/Phase plot approaches the zero frequency

(f_Z), formed by C_Oand its ESR, the slope of the gain

curve changes from -40db/dec. to -20db/dec and the

phase increases. The zero causes a 90° phase boost.

Ceramic capacitors, with their smaller values of

capacitance and ESR, push the zero and its phase boost

out to higher frequencies, which allow the phase lag

from the LC filter to drop closer to -180°. The system will

be close to being unstable if the overall open loop gain

crosses 0dB while the phase is close to -180°.

fz1 =

= 16kHz

2× π × R3 × C3

1

fz2 =

2 × π × 21⋅10³× C2

The two compensating pole frequencies are shown

below.

fp1 = 250Hz

1

fp2 =

2× π ×12 ⋅10³× C2

Gvd Transfer Function

fp2 and fz2 both depend on the value of C2 and are

proportionally spaced in frequency with the zero at a

lower frequency than the pole. This provides gain and

phase boost in the control loop.

50

40

90

60

30

Gain

20

0

Voltage Divider Feedforward Capacitor

10

-30

-60

-90

-120

-150

-180

-210

The capacitor across the upper voltage divider resistor

boosts the gain and phase of the control loop by short

circuiting the high-side resistor at higher frequencies.

The capacitor and upper resistor form a zero at a lower

frequency. The capacitor and parallel combination of

upper and lower resistors form a pole at a higher

frequency. This phase boost circuit is most effective at

higher output voltages, where there is a larger

attenuation from the voltage divider resistors.

Phase

0

-10

-20

-30

-40

-50

V_IN= 12V

V_OUT= 1.8V

C_OUT= 20µF

L = 4.7µH

10

100

1000

10000 100000 1000000

FREQUENCY (Hz)

Figure 13: Gvd Transfer Function

If the output capacitance and/or ESR is high, the zero

moves lower in frequency and helps to boost the phase,

leading to a more stable system.

Error Amplifier Poles and Zeros

The error amplifier has internal poles and zeros that can

be shifted in frequency with an external capacitor. The

general form of the error amplifier compensation is

shown in the equation below:

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Micrel, Inc.

MIC24420/MIC24421

The general form of the feedforward circuit is shown

below.

MIC24420

C16/17 R22/23 C29/30

V_OUTR1

R2

2.32k

1.4k

1k

C7/8

220pF

150pF

L_MIN

10µH

Co_MIN

47µF

1.0V

1.2V

1.4V

1.8V

2.5V

3.3V

5.0V

1k

3.3nF

4.7nF

10nF

NF

s

⎛

⎜

⎞

⎟

1+

ωz3

s

R2

⎝

⎛

⎠

⎞

H(s) =

×

R1+ R2

634

383

274

162

⎜

⎟

1+

ωp3

⎝

⎠

Where:

1

fz3 =

fp3 =

2× π × R1× C1

MIC24421

1

V_OUTR1

R2

2.32k

1.4k

1k

C7/8

C16/17 R22/23 C29/30

L_MIN

22µH

Co_MIN

100µF

R1× R2

R1+ R2

⎛

⎜

⎞

⎟

1.0V

1.2V

1.4V

1.8V

2.5V

3.3V

5.0V

1k

1000pF

22nF

22k

100nF

2× π × C1×

⎝

⎠

The total open loop transfer function is:

634

383

274

162

T(s) = Gea(s) × Gmod × Gfilter(s)× H(s)

The following tables list the recommended values of

compensation and filter components for different output

voltages. The output capacitors are ceramic.

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Micrel, Inc.

MIC24420/MIC24421

•

Do not replace the ceramic input capacitor with any

other type of capacitor. Any type of capacitor can be

placed in parallel with the input capacitor.

PCB Layout Guidelines

Warning!!! To minimize EMI and output noise, follow

these layout recommendations.

If a Tantalum input capacitor is placed in parallel

with the input capacitor, it must be recommended for

switching regulator applications and the operating

voltage must be derated by 50%.

PCB Layout is critical to achieve reliable, stable and

efficient performance. A ground plane is required to

control EMI and minimize the inductance in power,

signal and return paths.

•

In “Hot-Plug” applications, a Tantalum or Electrolytic

bypass capacitor must be used to limit the over-

voltage spike seen on the input supply with power is

suddenly applied. The value must be sufficiently

large to prevent this voltage spike from exceeding

The following guidelines should be followed to insure

proper operation of the MIC24420/MIC24421 converter.

IC

•

Place the IC and the external Low-side MOSFET

close to the point of load (POL).

the

maximum

voltage

rating

of

the

MIC24420/MIC24421.

Use fat traces to route the input and output power

lines.

An additional Tantalum or Electrolytic bypass input

capacitor of 22µF or higher is required at the input

power connection.

The exposed pad (EP) on the bottom of the IC must

be connected to the ground.

Inductor

Use several vias to connect the EP to the ground

plane on layer 2.

•

Keep the inductor connection to the switch node

(SW) short.

Signal and power grounds should be kept separate

and connected at only one location, the EP ground

of the package.

Do not route any digital or analog signal lines

underneath or close to the inductor.

Keep the switch node (SW) away from the feedback

(FB) pin.

•

The following signals and their components should

be decoupled or referenced to the power ground

plane: VIND1, VIND2, PVDD, PGND1, PGND2,

LSD1, and LSD2.

To minimize noise, place a ground plane underneath

the inductor.

These analog signals should be referenced or

decoupled to the analog ground plane: VIN,

EN/DLY1, EN/DLY2, COMP1, COMP2, FB1, and

FB2.

Output Capacitor

•

Use a wide trace to connect the output capacitor

ground terminal to the input capacitor ground

terminal.

Place the overcurrent sense resistor close to the

CS1 or CS2 pins. The trace coming from the switch

node to this resistor has high dv/dt and should be

routed away from other noise sensitive components

and traces. Avoid routing this trace under the

inductor to prevent noise from coupling into the

signal.

•

Phase margin will change as the output capacitor

value and ESR changes. Contact the factory if the

output capacitor is different from what is shown in

the BOM.

•

The feedback trace should be separate from the

power trace and connected as close as possible to

the output capacitor. Sensing a long high current

load trace can degrade the DC load regulation.

Input Capacitor

•

Place the input capacitor next. Ceramic capacitors

must be placed between VIND1 and PGND1 and

between VIND2 and PGND2.

If 0603 package ceramic output capacitors are used,

then make sure that it has enough capacitance at

the desired output voltage. Please refer to the

capacitor datasheet for more details.

•

Place the input capacitors on the same side of the

board and as close to the IC and low-side MOSFET

as possible.

Diode

•

The external Schottky diode is placed next to the

low-side MOSFET.

•

Keep both the VIN and PGND connections short.

Place several vias to the ground plane close to the

input capacitor ground terminal, but not between the

input capacitors and IC pins.

•

The connection from the Schottky diode’s Anode to

the input capacitors ground terminal must be as

short as possible.

•

Use either X7R or X5R dielectric input capacitors.

Do not use Y5V or Z5U type capacitors.

•

The diode’s Cathode connection to the switch node

M9999-062012-C

June 2012

23

Micrel, Inc.

MIC24420/MIC24421

the effect of dv/dt inducted turn-on.

(SW) must be keep as short as possible.

RC Snubber

Place the RC snubber on the same side of the board

•

Do not put a resistor between the LSD output and

the gate.

•

Use a 4.5V Vgs rated MOSFET. Its higher gate

threshold voltage is more immune to glitches than a

2.5V or 3.3V rated MOSFET. MOSFETs that are

rated for operation at less than 4.5V_GSshould not be

used.

and as close as possible to the low-side MOSFET.

Low-side MOSFET

•

Low-side drive MOSFET traces (LSD pin to

MOSFET gate pin) must be short and routed over a

ground plane. The ground plane should be the

connection between the MOSFET source and

PGND.

High-side MOSFET

•

Add a 20 to 60 ohm resistor in series with the boost

pin. This will slow down the turn-on time of the high-

side MOSFET while leaving the turn-off time

unaffected.

Chose a low-side MOSFET with a high CGS/CGD

ratio and a low internal gate resistance to minimize

M9999-062012-C

June 2012

24

Micrel, Inc.

MIC24420/MIC24421

MIC24420 Evaluation Board Schematic

M9999-062012-C

June 2012

25

Micrel, Inc.

MIC24420/MIC24421

MIC24420 Bill of Materials

Item

Part Number

Manufacturer

Murata⁽¹⁾

AVX⁽²⁾

Description

Qty.

GRM32ER61E226KE15

12103D226MAT2A

06033D103MAT2A

GRM21BR70J225KA01

08056D225MAT2A

VJ0603Y151KXXMB

VJ0603Y221KXXMB

GRM31CR60J476ME19

12066D476MAT2A

06033D105MAT2A

VJ0603Y103KXXMB

VJ0603Y471KXXMB

GRM188R60J475KE19

06036D475MAT2A

VJ0603Y820KXXMB

EEEFP1E151AP

3

C1, C2, C13

C4, C10, C16, C17

C5

Ceramic Capacitor, 22µF, 25V, X5R

Ceramic Capacitor, 10nF, 25V

Ceramic Capacitor, 2.2µF, 6.3V

AVX

4

1

Murata

AVX

Vishay⁽³⁾

Vishay

Murata

AVX

C7

C8

Ceramic Capacitor, 150pF, 50V, X7R

Ceramic Capacitor, 220pF, 50V, X7R

1

C11, C14

Ceramic Capacitor, 47µF, 6.3V, X5R

2

C12

AVX

Ceramic Capacitor, 1µF, 25V

1

2

1

C16, C17

C18, C19

Vishay

Murata

AVX

Ceramic Capacitor, 10nF, 50V, X7R

Ceramic Capacitor, 470pF, 50V, X7R

C20

Ceramic Capacitor, 4.7µF, 6.3V

C21, C22

C23

Vishay

Panasonic

Vishay

Ceramic Capacitor, 82pF

2

1

4

0

2

1

2

1

2

1

150uF, 25V, AL.EL. (80mΩ ESR)

Ceramic Capacitor, 100nF, 50V, X7R

Not Fitted

C24, C25, C26, C27, C28

C29, C30

D1, D2

VJ0603Y104KXXMB

SD103BWS

Vishay

Schottky Diode, 100mA, 30V

Schottky Diode, 30V, 0.5A

Inductor, 10 µH, 2.5A

D3, D4

B0530W

Diodes. Inc⁽⁴⁾

Cooper⁽⁵⁾

L1, L2

DR74-10R-R

R1, R6

CRCW06031001FRT1

CRCW06032740FRT1

CRCW06031002FRT1

CRCW06032490FRT1

CRCW06031401FRT1

CRCW06030000FRT1

CRCW06034992FRT1

CRCW06036040FRT1

CRCW06032210FRT1

CRCW06031472FRT1

CRCW060310R0FRT1

Vishay Dale

Resistor, 1k (0603 size), 1%

Resistor, 274 (0603 size), 1%

Resistor, 10k (0603 size), 1%

Resistor, 249 (0603 size), 1%

Resistor, 1.4k (0603 size), 1%

Resistor, 0ꢀ (0603 size)

R2

R3, R8

R4, R5

R7

R9, R15

R12, R13

R10, R11

R16, R17

R14

Resistor, 49.9k (0603 size), 1%

Resistor, 60.4 (0603 size), 1%

Resistor, 22.1 (0603 size), 1%

Resistor, 14.7k (0603 size), 1%

Resistor, 10 (0603 size), 1%

R18

R19

CRCW06035761FRT1

Vishay Dale

Resistor, 5.76k (0603 size), 1%

R20, R21

R22, R23

Q1, Q2

CRCW080512R1FRT1

Vishay Dale

-

Fairchild⁽⁶⁾

Resistor, 12.1ꢀ (0805 size), 1%

2

0

2

1

-

Not Fitter

MOSFET

FDC855N

BSS138

Q3, Q4

Fairchild

2A Dual Output PWM Synchronous Buck

Regulator IC

U1

MIC24420YML

Micrel, Inc.⁽⁷⁾

Notes:

1. Murata: www.murata.com

2. AVX: www.avx.com

M9999-062012-C

June 2012

26

Micrel, Inc.

MIC24420/MIC24421

3. Vishay: www.vishay.com

4. Diodes Inc.: www.diodes.com

5. Cooper Magnetics: www.cooperet.com

6. Fairchild Semiconductor: www.fairchildsemi.com

7. Micrel, Inc.: www.micrel.com

M9999-062012-C

June 2012

27

Micrel, Inc.

MIC24420/MIC24421

MIC24421 Bill of Materials

Item

Part Number

Manufacturer

Murata⁽¹⁾

AVX⁽²⁾

Description

Qty.

GRM32ER61E226KE15

12103D226MAT2A

06033D103MAT2A

GRM21BR70J225KA01

08056D225MAT2A

VJ0603Y102KXXMB

GRM31CR60J107ME39L

06033D105MAT2A

VJ0603Y223KXXMB

VJ0603Y471KXXMB

GRM188R60J475KE19

06036D475MAT2A

VJ0603Y101KXXMB

EEEFP1E151AP

3

C1, C2, C13

C4, C10

C5

Ceramic Capacitor, 22µF, 25V, X5R

Ceramic Capacitor, 10nF, 25V

Ceramic Capacitor, 2.2µF, 6.3V

AVX

4

1

Murata

AVX

Vishay⁽³⁾

Murata

AVX

C7, C8

Ceramic Capacitor, 1000pF, 50V, X7R

Ceramic Capacitor, 100µF, 6.3V, X5R

Ceramic Capacitor, 1µF, 25V

1

2

1

2

1

C11, C14

C12

C16, C17

C18, C19

Vishay

Murata

AVX

Ceramic Capacitor, 22nF, 50V, X7R

Ceramic Capacitor, 470pF, 50V, X7R

C20

Ceramic Capacitor, 4.7µF, 6.3V

C21, C22

C23

Vishay

Panasonic

Ceramic Capacitor, 100pF

2

1

7

150uF, 25V, AL.EL. (80mΩ ESR)

C24, C25, C26, C27,

C28, C29, C30

VJ0603Y104KXXMB

Vishay

Ceramic Capacitor, 100nF, 50V, X7R

D1, D2

D3, D4

L1, L2

R1, R6

R2

SD103BWS

Vishay

Diodes. Inc⁽⁴⁾

Schottky Diode, 100mA, 30V

Schottky Diode, 30V, 0.5A

Inductor, 22 µH, 7A

2

1

2

1

2

1

B0530W

CDRH125-220

Murata

CRCW06031001FRT1

CRCW06032740FRT1

CRCW06031002FRT1

CRCW06032490FRT1

CRCW06031401FRT1

CRCW06030000FRT1

CRCW06034992FRT1

CRCW06036040FRT1

CRCW06032210FRT1

CRCW06031652FRT1

CRCW060310R0FRT1

Vishay Dale

Resistor, 1k (0603 size), 1%

Resistor, 274 (0603 size), 1%

Resistor, 10k (0603 size), 1%

Resistor, 249 (0603 size), 1%

Resistor, 1.4k (0603 size), 1%

Resistor, 0ꢀ (0603 size)

R3, R8

R4, R5

R7

R9, R15

R12, R13

R10, R11

R16, R17

R14

Resistor, 49.9k (0603 size), 1%

Resistor, 60.4 (0603 size), 1%

Resistor, 22.1 (0603 size), 1%

Resistor, 16.5k (0603 size), 1%

Resistor, 10 (0603 size), 1%

R18

R19

CRCW06035101FRT1

Vishay Dale

Resistor, 5.1k (0603 size), 1%

R20, R21

R22, R23

Q1, Q2

CRCW080512R1FRT1

CRCW06032202FRT1

FDC855N

Vishay Dale

Fairchild⁽⁵⁾

Fairchild

Resistor, 12.1ꢀ (0805 size), 1%

Resistor, 22kꢀ (0603 size), 1%

MOSFET

2

1

Q3, Q4

BSS138

MOSFET

2A Dual Output PWM Synchronous Buck

Regulator IC

U1

MIC24421YML

Micrel, Inc.⁽⁶⁾

Notes:

1. Murata: www.murata.com

2. AVX: www.avx.com

3. Vishay: www.vishay.com

4. Diodes Inc.: www.diodes.com

M9999-062012-C

June 2012

28

Micrel, Inc.

MIC24420/MIC24421

5. Fairchild Semiconductor: www.fairchildsemi.com

6. Micrel, Inc.: www.micrel.com

M9999-062012-C

June 2012

29

Micrel, Inc.

MIC24420/MIC24421

PCB Layout Recommendations

Top Layer

Mid Layer 1

M9999-062012-C

June 2012

30

Micrel, Inc.

MIC24420/MIC24421

PCB Layout Recommendations

Mid Layer 2

Bottom Layer

M9999-062012-C

June 2012

31

Micrel, Inc.

MIC24420/MIC24421

Package Information

24-Pin 4mm x 4mm MLF^®(ML)

M9999-062012-C

June 2012

32

Micrel, Inc.

MIC24420/MIC24421

Recommended Land Pattern

24-Pin 4mm x 4mm MLF^®

(ML

)

M9999-062012-C

June 2012

33

Micrel, Inc.

MIC24420/MIC24421

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com

Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This

information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,

specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual

property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability

whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties

relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product

can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant

into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A

Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully

indemnify Micrel for any damages resulting from such use or sale.

M9999-062012-C

June 2012

34


型号：	MIC24420YML-TR
厂家：	MICROCHIP
描述：	SWITCHING REGULATOR 开关
文件：	总34页 (文件大小：1250K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MIC24420YML-TR [MICROCHIP]

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