MIC2585-2MBTSTR [MICROCHIP]
Power Supply Support Circuit, Adjustable, 2 Channel, PDSO24, TSSOP-24;
| 型号： | MIC2585-2MBTSTR |
| 厂家： | 
MICROCHIP |
| 描述： | Power Supply Support Circuit, Adjustable, 2 Channel, PDSO24, TSSOP-24 光电二极管 |
| 文件： | 总28页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC2584/MIC2585
Dual-Channel Hot Swap Controller/Sequencer
General Description
Features
The MIC2584 and MIC2585 are dual-channel positive volt-
age hot swap controllers designed to facilitate the safe
insertionofboardsintolivesystembackplanes.TheMIC2584
and MIC2585 are available in 16-pin and 24-pin TSSOP
packages, respectively. Using a few external discrete com-
ponents and by controlling the gate drives of external N-
Channel MOSFET devices, the MIC2584/85 provides inrush
current limiting and output voltage slew rate control in harsh,
criticalpowersupplyenvironments.Additionally,theMIC2585
provides output turn-on sequencing and output tracking
during turn-on and turn-off. In combination, the devices’
many features provide a simplified, robust solution for many
network applications to meet the power sequencing and
protection requirements of multiple-voltage logic systems.
• 1.0V to 13.2V supply voltage operation
• Surge voltage protection up to 20V
• Current regulation limits inrush current regardless of
load capacitance
• Programmable inrush current limiting
• Electronic circuit breaker
• Dual-level overcurrent fault sensing eliminates false
tripping
• Fast response to short circuit conditions (< 1µs)
• Two sequenced output mode selections
(MIC2585 only)
• ∆250mV supply tracking mode during turn-on/turn-off
(MIC2585 only)
• Overvoltage and undervoltage output monitoring
(Overvoltage for MIC2585 only)
• Undervoltage lockout protection
• /FAULT status output
• Power-On Reset and Power-Good status output
(Power-Good for MIC2585 only)
Applications
• RAID systems
• Network servers
• Base stations
• Network switches
• Hot-board insertion
Ordering Information
Part Number
Output Sequencing
Fast Circuit Breaker
Threshold
Package
16-pin TSSOP
x
Standard
Pb-Free
MIC2584-xBTS
MIC2584-xYTS
N/A
x = J, 100mV
x = K, 150mV *
MIC2585-1xBTS
MIC2585-2xBTS
MIC2585-1xYTS
MIC2585-2xYTS
OUT2
OUT1 follows OUT2
follows
x = M, Off *
OUT1
=
L,
* Contact Micrel for availability.
Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
March 2005
1
MIC2584/2585
MIC2584/2585
Micrel
Typical Application
Q1
Si7892DP
(PowerPAK™ SO-8)
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
RSENSE1
**BZX84Cxx
D1
0.006Ω
VOUT1
12V
6A
VCC1
12V
1
2
R1
3
4
CLOAD1
10Ω
330µF
C1
0.47µF
R14
10.7kΩ
1%
Q2
Si7892DP
(PowerPAK™ SO-8)
RSENSE2
VOUT2
3.3V
1.5A
0.020Ω
VCC2
3.3V
1
2
R2
3
4
CLOAD2
330µF
10Ω
D2
C2
0.47µF
C3
0.01µF
1
2
24
23
R3
47kΩ
VCC2
SENSE2 VCC1
SENSE1
GATE2
3
R12
105kΩ
1%
R4
22kΩ
8
22
5
ON
GATE1
OUT2
R5
22kΩ
R11
120Ω
6
7
C4
DIS2
FB2
0.01µF
14
12
/FAULT
Signal
R15
4.42kΩ
1%
/FAULT
CDLY
MIC2585-1
R6
130kΩ
1%
18
20
FB1
*C5
R13
14.7kΩ
1%
0.047µF
30.9kΩ
OUT1
R8
R10
560Ω
1%
21
4
19
OV1
OV2
DIS1
17
16
15
PG1
PG2
/POR
DOWNSTREAM
CONTROLLER(S)
R7
13kΩ
1%
Downstream Control Signals
R9
CPOR
GND
CFILTER
TRK
9
8.06kΩ
1%
10
13
11
C6
0.02µF
C7
0.033µF
GND
Undervoltage (Output1) = 10.5V
Undervoltage (Output2) = 2.95V
Overvoltage (Input1) = 13.2V
Overvoltage (Input2) = 3.65V
START-UP Delay = 2.5ms
POR Delay = 10ms
Circuit Breaker Response Time = 16ms
*C5 (optional) is used to set the delay for VOUT2 with respect to VOUT1
VOUT2 Delay = 9.5ms
**D1 is BZX84C18 and D2 is BZX84C8V2
Resistor tolerances are 5% unless specified otherwise.
Figure 1. Typical Application Circuit
MIC2584/2585
2
March 2005
MIC2584/2585
Micrel
Pin Configuration
VCC2
SENSE2
GATE2
OV2
1
2
3
4
5
6
7
8
9
24 VCC1
23 SENSE1
22 GATE1
21 OV1
VCC2
SENSE2
GATE2
OUT2
1
2
3
4
5
6
7
8
16 VCC1
15 SENSE1
14 GATE1
13 OUT1
12 FB1
OUT2
DIS2
20 OUT1
19 DIS1
18 FB1
FB2
ON
17 PG1
FB2
TRK
16 PG2
ON
11 /POR
10 /FAULT
CPOR 10
CFILTER 11
CDLY 12
15 /POR
14 /FAULT
13 GND
CPOR
CFILTER
9
GND
MIC2584
16-Pin TSSOP (TS)
MIC2585
24-Pin TSSOP (TS)
Pin Description
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
Pin Function
Positive Supply (Input), Channel 1: This input is the main supply to the
16
24
VCC1
internal circuitry and must be in the range of 2.3V to 13.2V. The GATE1 pin
is held low by an internal undervoltage lockout circuit until VCC1 and VCC2
exceed their respective undervoltage lockout threshold of 2.165V and 0.8V.
This input is protected up to 20V.
1
1
VCC2
Positive Supply (Input), Channel 2: The GATE2 pin is held low by an
internal undervoltage lockout circuit until VCC1 and VCC2 exceed their
respective undervoltage lockout threshold of 2.165V and 0.8V. This input
must be in the range of 1.0V to 13.2V and less than or equal to VCC1. This
input is protected up to 20V.
2, 15
2, 23
SENSE2, SENSE1 Circuit Breaker Sense (Inputs): A resistor between this pin and VCC1 and
VCC2 sets the current limit threshold for each channel. Whenever the
voltage across either sense resistor exceeds the slow trip current limit
threshold (VTRIPSLOW), the GATE voltage is adjusted to ensure a constant
load current. If VTRIPSLOW (50mV) is exceeded for longer than time period
tOCSLOW, then the circuit breaker is tripped and both GATE outputs are
immediately pulled low. If the voltage across either sense resistor exceeds
the fast trip circuit breaker threshold, VTRIPFAST, at any point due to fast,
high amplitude power supply faults, then both GATE outputs are immediately
brought low without delay. To disable the circuit breaker for either channel,
the SENSE and VCC pins can be tied together.
The default VTRIPFAST for either device is 100mV. Other fast trip thresholds
are available: 150mV, 200mV, or OFF (VTRIPFAST disabled). Please contact
factory for availability of other options.
6
8
ON
Enable (Input): Active High. The ON pin, an input to a Schmitt-triggered
comparator used to enable/disable the controller, is compared to a 1.235V
reference with 25mV of hysteresis. When a logic high is applied to the ON
pin (VON > 1.235V), a start-up sequence begins when the GATE1 and
GATE2 pins begin ramping up towards their final operating voltage. When
the ON pin receives a logic low signal (VON < 1.21V), the GATE pins are
grounded and /FAULT remains high if both inputs are above their respective
UVLO thresholds. The ON pin must be low for at least 20µs in order to
initiate a start-up sequence. Additionally, toggling the ON pin LOW to HIGH
resets the circuit breaker.
March 2005
3
MIC2584/2585
MIC2584/2585
Micrel
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
Pin Function
3, 14
3, 22
GATE2, GATE1
Gate Drive (Outputs): Connect each output to the gates of external
N-Channel MOSFETs. When ON is asserted, a 14µA current source is
activated and begins to charge the gate of the N-Channel MOSFET connected
to this pin. An internal clamp ensures that no more than 10V is applied
between the GATE and Source when VCC1 or VCC2 is above 5V. When the
circuit breaker trips or when an input undervoltage lockout condition is
detected, the GATE1 and GATE2 pins are immediately brought low.
9
7
13
10
GND
Ground: Tie to analog ground.
CPOR
Power-On Reset Timer (Input): A capacitor connected between this pin and
ground sets the start-up delay (tSTART) and the power-on reset interval
(tPOR). Once the lagging supply rises above its UVLO threshold and ON
asserts, the capacitor connected to CPOR begins to charge. When the
voltage at CPOR crosses 0.3V, the start-up threshold (VSTART), a start cycle
is initiated as the GATE outputs begin to ramp while capacitor CPOR is
immediately discharged to ground. When the voltage at the lagging FB pin
rises above its threshold (VFB), capacitor CPOR begins to charge again.
When the voltage at CPOR rises above the power-on reset delay threshold
(VPOR) of 1.235V, the timer resets by pulling CPOR to ground and /POR is
deasserted. If CPOR = 0, then tSTART defaults to 20µs.
8
11
CFILTER
FB2, FB1
Current Limit Response Timer (Input): A capacitor connected to this pin
defines the period of time, tOCSLOW, in which an overcurrent event must last
to signal a fault condition and trip the circuit breaker. When an overcurrent
condition occurs, a 2.5µA current source begins to charge this capacitor. If
the voltage at this pin reaches 1.235V, the circuit breaker is tripped, both
GATE pins immediately shut off, and /FAULT is asserted. If CFILTER = 0,
then tOCSLOW defaults to 20µs.
5, 12
7, 18
Power-Good Threshold Input (Undervoltage Detect): FB1 and FB2 are
internally compared to 1.235V and 0.80V references with 25mV of hyster-
esis, respectively. External resistive divider networks may be used to set the
voltage at these pins. If either FB input momentarily goes below its thresh-
old, then /POR is activated for one timing cycle, tPOR, indicating an output
undervoltage condition. The /POR signal deasserts one timing cycle after the
FB pin exceeds its power-good threshold by 25mV. A 5µs filter on these pins
prevents glitches from inadvertently activating the /POR signal.
10
11
14
15
/FAULT
/POR
Circuit Breaker Fault Status (Output): Active-Low, weak pull-up to VCC1 or
open-drain. Asserted when the circuit breaker is tripped due to an
overcurrent, undervoltage lockout, or overvoltage event. When deasserted,
the MIC2585 will initiate a new start cycle by toggling the ON pin.
Power-On Reset (Output): Active Low, weak pull-up to VCC1 or open drain.
This pin remains asserted during start-up until a time period (tPOR) after the
lagging FB pin threshold (VFB1 or VFB2) is exceeded. The timing capacitor
CPOR determines tPOR. When the output voltage monitored at either FB pin
falls below VFB, /POR is asserted for a minimum of one timing cycle (tPOR).
4, 13
N/A
5, 20
12
OUT2, OUT1
CDLY
Output Voltage Monitor (Inputs): For output tracking, connect these pins to
their respective output to sense the output voltage.
Output Sequence Delay Timer (Input): This pin is internally clamped to 6V.
A capacitor connected to this pin sets a timer delay, tDLY, between VOUT1
and VOUT2 as shown in Figure 5. With this pin pulled up to VCC1 through a
resistor, and if CGATE1 = CGATE2, both VOUT1 and VOUT2 ramp up and down
with the same dv/dt as depicted in the Tracking Mode diagram while
maintaining a maximum voltage differential between VOUT1 and VOUT2
.
N/A
9
TRK
Discharge Tracking Mode Pin (Input): Tie this pin to OUT1 or OUT2 to
enable tracking during turn-off cycle. Ground this pin to disable tracking
during turn-off. The TRK pin is not to be used as a digital input.
MIC2584/2585
4
March 2005
MIC2584/2585
Micrel
Pin Number
MIC2584
Pin Number
MIC2585
Pin Name
Pin Function
N/A
4, 21
OV2, OV1
Overvoltage Detect Inputs: Whenever the threshold voltage (VOV1, VOV2) on
either input is exceeded, the circuit-breaker is tripped while /FAULT is
asserted and the GATE1 and GATE2 outputs are immediately brought low.
N/A
6, 19
DIS2, DIS1
Discharge Outputs: When the ON pin receives a logic low signal
(deasserts), these pins provide a low impedance path to ground in order to
allow the discharging of any load capacitance. The DIS pins assert low if
TRK is less than 0.3V once ON has been deasserted. The typical DIS pin
resistance varies between 50Ω to 170Ω dependent upon input supply
voltage (see Electrical Table). An external resistor is required. See “Fast
Output Discharge for Capacitive Load” section in the Applications Informa-
tion for more detail.
N/A
16, 17
PG2, PG1
Power-Good Outputs: Active-HIGH, weak pull-up to VCC1 or open-drain.
These outputs are asserted whenever the FB1 and FB2 thresholds are
exceeded and will not be asserted when FB1 and FB2 are below their
thresholds.
March 2005
5
MIC2584/2585
MIC2584/2585
Micrel
Absolute Maximum Ratings (Note1)
Operating Ratings (Note 2)
All voltages are referred to GND)
Supply Voltage
V
V
......................................................................... 2.3V to 13.2V
......................................................................... 1.0V to 13.2V
Supply Voltage (V
/V
) .......................... –0.3V to 20V
CC1
CC2
CC1 CC2
SENSE1/SENSE2 pins .............................. –0.3V to V
CC1/2
Operating Temperature Range .................. –40°C to +85°C
TRK, ON, DIS1, DIS2, OUT1, OUT2,
Package Thermal Resistance
/POR, /FAULT, PG1, PG2 pins .................. –0.3V to 15V
GATE1/GATE2 pin ......................................... –0.3V to 25V
All other input pins........................................... -0.3V to 15V
DIS1/DIS2 current ....................................................±25mA
Junction Temperature ............................................... 125°C
ESD Rating
R
R
, 16-pin TSSOP.......................................99.1°C/W
, 24-pin TSSOP.......................................83.8°C/W
θ(JA)
θ(JA)
Human body model ...............................................1500V
Machine model ........................................................100V
Electrical Characteristics (Note 4)
2.3V ≤ VCC1 ≤ 13.2V, 1.0V ≤ VCC2 ≤ 13.2V, TA = 25°C unless otherwise noted. Bold values indicate –40°C ≤ TA ≤ 85°C.
Symbol
VCC1
ICC1
Parameter
Condition
Min
Typ
Max
13.2
3
Units
V
Supply Voltage
Supply Current
Supply Voltage
Supply Current
2.3
1.7
mA
V
VCC2
ICC2
VCC2 ≤ VCC1
1.0
13.2
0.15
2.275
0.05
mA
V
VUV1
VCC1 Undervoltage Lockout
Threshold
2.050
2.165
VUV1HYS
VUV2
VCC1 Undervoltage Lockout
Hysteresis
200
0.8
30
mV
V
VCC2 Undervoltage Lockout
Threshold
0.7
0.9
VUV2HYS
VCC2 Undervoltage Lockout
Hysteresis
mV
VTRIPSLOW
VTRIPHYS
VTRIPFAST
Slow Trip Overcurrent Threshold
Slow Trip Overcurrent Hysteresis
Fast Trip Overcurrent Threshold
VCCx – VSENSEx, VCC1 = VCC2 = 5V
42.5
90
50
2.5
100
150
200
8
57.5
110
mV
mV
mV
mV
mV
V
x = J
x = K
x = L
VCC1 = VCC2 = 5V
VGATE
External Gate Drive
VGATEx – VCCx
VCC1 or VCC2 > 5V
VCC1 or VCC2 < 5V
6
10
8
(GATE1 and GATE2)
GATE Pin Pull-up Current
GATE Pin Sink Current
3.5
–25
4.5
–14
50
V
IGATE
Start cycle
–8
µA
mA
µA
Ω
IGATEOFF
/FAULT asserted
Turn off (ON deasserted)
ON deasserted
TRK < 0.3V
30
45
70
RDIS
Discharge Pin Resistance
VCCx = 2.3V
VCCx = 5.0V
VCCx = 13.2V
170
70
Ω
50
Ω
ITMR
Overcurrent Timer Pin Charge
Current
VCCx – VSENSEx = 50mV
–3.5
1.5
–2.5
–1.5
3.5
µA
Overcurrent Timer Pin Discharge
Current
VCCx – VSENSEx = 25mV
2.5
µA
VTMR
Overcurrent Timer Pin Threshold
1.190
1.235
1.290
V
MIC2584/2585
6
March 2005
MIC2584/2585
Micrel
Symbol
Parameter
Condition
Min
Typ
–2.5
2.5
Max
–1.5
Units
ICPOR
Power-on Reset Current
VCC1 = 5V, CPOR = 0.5V
Charge current
Sink current
–3.5
µA
VPOR
Power-on Reset Delay Threshold
Start-up cycle
Start-up cycle
1.190
1.235
25
1.290
V
VPORHYS
Power-on Reset Delay Threshold
Hysteresis
mV
VSTART
VTRK
Start-up Threshold
0.25
0.30
0.30
0.35
V
V
TRK Pin Threshold
(MIC2585 only)
ON deasserted, IGATE > 10µA
VCC1 = VCC2 = 5V
0.25
0.35
VTRKOFF
TRK Pin Turn-off Voltage
(MIC2585 only)
ON asserted, VSENSE2 – VOUT2
VCC1 = VCC2 = 5V
150
250
400
mV
VFB1
FB1 Threshold
1.190
1.235
25
1.290
V
mV
V
VFB1HYS
VFB2
VFB2HYS
VOV1
FB1 Threshold Hysteresis
FB2 Threshold
0.75
0.80
25
0.85
FB2 Threshold Hysteresis
mV
V
OV1 Threshold
(MIC2585 only)
1.190
1.235
1.290
VOV1HYS
VOV2
VOV2HYS
IDELAY
OV1 Threshold Hysteresis
(MIC2585 only)
25
0.80
25
mV
V
OV2 Threshold
(MIC2585 only)
0.75
0.85
OV2 Threshold Hysteresis
(MIC2585 only)
mV
µA
Delay Timer Pin Current
(MIC2585 only)
VCC1 = VCC2 = 5V
Timer charge current
Timer discharge current
–9
–6
–3
200
VDELAY
Delay Timer Pin Threshold
(MIC2585 only)
1.190
1.235
1.290
V
VDLYHYS
Delay Timer Pin Threshold
Hysteresis (MIC2585 only)
25
mV
VON
ON Pin Input Threshold
ON Pin Hysteresis
1.190
1.235
25
1.290
V
mV
µA
V
VONHYS
ION
ON Pin Input Current
VON = VCCX
0.1
0.5
0.4
VOL
/FAULT , /POR , PG1, PG2 Output
Low Voltage (PG1 and PG2 for
MIC2585 only)
IOUT = 1.6mA, VCC1 = 5V
IPULLUP
/FAULT , /POR , PG1, PG2 Active
Output Pull-up Current
ON asserted, VFB1 > 1.25V, VFB2 > 0.8V
/POR = VCC1 – 1V
7
12
22
µA
(PG1 and PG2 for MIC2585 only)
VGATEWIN
GATE1 and GATE2 ON/OFF
Voltage Window (Tracking enabled)
Note 3
See Timing Diagram (Figure 2)
100
250
mV
AC Parameters
tOCFAST Fast Overcurrent Sense to GATE
VCCx – VSENSEx = 100mV, CGATE = 10nF
See Timing Diagram (Figure 3)
1
µs
µs
Low Trip Time
tOCSLOW
Slow Overcurrent Sense to GATE
Low Trip Time
VCCx – VSENSEx = 50mV, CFILTER = 0
20
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. For the MIC2584, V
is specified only when ON is asserted.
GATEWIN
Note 4. Specification for packaged product only.
March 2005
7
MIC2584/2585
MIC2584/2585
Micrel
Timing Diagrams
GATE1
GATE2
ON
GATE1 ON
GATE2 ON
100mV
GATE1 ON
GATE2 OFF
GATE1 OFF
GATE2 ON
OFF
ON
VOUT1 - VOUT2
ON Pin Asserted
GATE1 OFF
GATE2 OFF
100mV
GATE1 ON
GATE1 OFF
GATE2 ON
OFF GATE2 OFF
ON Pin Deasserted
VOUT1 - VOUT2
Figure 2. Gate Voltage Window — Tracking Mode
VTRIPFAST
50mV
(VCCx – VSENSEx
)
tOCFAST
tOCSLOW
VGATEx
0.5V
0.5V
Figure 3. Current Limit Response
VPOR
ON
VSTART
CPOR
VOUT[1,2]
PG[1/2]
/POR
tSTART
VPG[1/2]
tPOR
Figure 4. Start-Up Cycle Timing
VOUT1
∆V<0.25V
∆V<0.25V
VOUT2
Tracking Mode,TRK = VOUT1 or VOUT2
VOUT1,VOUT2
(-1) (-2)
∆V<0.25V
VFB
V
OUT2,VOUT1
(-1) (-2)
tDLY
Sequencing/Tracking Mode,TRK = VOUT1 or VOUT2
(-1) - VOUT2 follows VOUT1
(-2) - VOUT1 follows VOUT2
Figure 5. Sequencing Modes (MIC2585 only)
MIC2584/2585
8
March 2005
MIC2584/2585
Micrel
Typical Characteristics
V
V
V
TRIPSLOW1–
TRIPSLOW2+
TRIPSLOW1+
vs. Temperature
vs. Temperature
vs. Temperature
58
58
56
54
52
50
48
46
44
42
58
56
54
52
50
48
46
44
42
56
VCC1 = 13.2V
54
VCC1 = 5.0V
52
50
48
46
44
42
VCC1 = 13.2V
VCC2 = 5.0V
VCC2 = 13.2V
VCC2 = 2.3V
VCC1 = 5.0V
VCC1 = 2.3V
VCC1 = 2.3V
VCC2 = 1.0V
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
V
V
V
TRIPSLOW2–
TRIPFAST1
TRIPFAST2
vs. Temperature
vs. Temperature
vs. Temperature
58
56
54
52
50
48
46
44
42
110
108
106
104
102
100
98
110
108
106
104
102
100
98
VCC1 = 13.2V
VCC2 = 13.2V
VCC2 = 13.2V
VCC2 = 5.0V
VCC1 = 5.0V
VCC2 = 2.3V
VCC1 = 2.3V
VCC2 = 5.0V
VCC2 = 2.3V
96
96
94
94
VCC2 = 1.0V
92
92
90
90
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
V
V
GATE2
GATE1
UVLO1 and UVLO2
vs. Temperature
vs. Temperature
vs. Temperature
2.5
2.25
2
22.5
20
22.5
20
UVLO1+
VCC2 = 13.2V
VCC1 = 13.2V
17.5
15
17.5
15
UVLO1–
1.75
1.5
1.25
1
VCC1 = 5.0V
VCC1 = 2.3V
VCC2 = 5.0V
VCC2 = 2.3V
12.5
10
12.5
10
UVLO2+
7.5
7.5
5
0.75
0.5
UVLO2–
5
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
Overcurrent Timer Threshold
vs. Temperature
CPOR Threshold2
vs. Temperature
CPOR Threshold1 (Start-Up)
vs. Temperature
1.26
0.32
1.3
1.28
1.26
1.24
1.22
1.2
VCC1 = 13.2V
VCC = 13.2V
VCC = 5.0V
1.25
1.24
1.23
1.22
1.21
1.2
0.31
0.3
VCC1 = 5.0V
VCC1 = 2.3V
VCC2 = 5.0V
VCC2 = 13.2V
VCC = 2.3V
0.29
0.28
0.27
VCC2 = 2.3V
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
March 2005
9
MIC2584/2585
MIC2584/2585
Micrel
FB1 Threshold
vs. Temperature
Overvoltage1
vs. Temperature
Overvoltage2
vs. Temperature
1.25
1.24
1.23
1.22
1.21
0.85
0.83
0.81
0.79
0.77
0.75
0.73
0.71
1.25
1.24
1.23
1.22
1.21
1.2
VCC1=13.2V
VCC1 = 13.2V
FB1+
VCC1=2.3V
VCC2 = 13.2V
VCC1=5.0V
VCC1=5.0V
VCC1 = 5.0V
VCC1=13.2V
VCC2 = 5.0V
VCC1 = 2.3V
VCC2 = 2.3V
FB1–
VCC1=2.3V
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
Gate1 On Current
vs. Temperature
FB2 Threshold
vs. Temperature
Output Low Voltage
vs. Temperature
0.81
0.4
0.3
0.2
0.1
0
24
22
20
18
16
14
12
10
8
VCC2=13.2V
0.79 VCC2=5.0V
FB2+
VCC = 5.0V
VCC = 2.3V
0.77
VCC2=2.3V
VCC2=2.3V
VCC2=13.2V
VCC = 13.2V
0.75
VCC = 5.0V
VCC2=5.0V
FB2–
VCC = 2.3V
0.73
VCC = 13.2V
0.71
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
Overcurrent Timer
Discharge Current
vs. Temperature
Overcurrent Timer
Charge Current
vs. Temperature
Power On Reset Current
vs. Temperature
2.8
2.7
2.6
2.5
2.4
2.3
2.2
-2.9
-2.8
-2.7
-2.6
-2.5
-2.4
-2.3
-2.2
-2.1
2.8
2.7
2.6
2.5
2.4
VCC = 13.2V
VCC = 13.2V
VCC = 13.2V
VCC = 5.0V
VCC = 5.0V
VCC = 5.0V
VCC = 2.3V
VCC = 2.3V
VCC = 2.3V
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
Supply Current_1
vs. Temperature
Active Output Pull-Up Current
vs. Temperature
Supply Current_2
vs. Temperature
3
2.5
2
2.8
120
110
100
90
VCC = 13.2V
VCC1 = 13.2V
VCC2 = 13.2V
2.7
2.6
2.5
2.4
VCC1 = 5.0V
VCC = 5.0V
80
VCC2 = 5.0V
1.5
1
70
VCC1 = 2.3V
60
VCC = 2.3V
50
40
0.5
0
VCC2 = 2.3V
30
20
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
-40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
MIC2584/2585
10
March 2005
MIC2584/2585
Micrel
Test Circuit
IIN
IOUT
RSENSEx
IRF7822
(SO-8)
0.005Ω
VOUTx
+
VINx+
1
2
3
4
RLOAD
CINx
4.7µF
CLOAD
VOUTx
33kΩ
–
VINx–
SENSEx
VCCx
ON
GATEx
0.01µF
R1
R2
OUTx
FBx
CDLY
CFILTER
CDLY
(optional)
CPOR
8200pF
GND
0.1µF
(Not all pins shown for simplicity)
March 2005
11
MIC2584/2585
MIC2584/2585
Micrel
Functional Characteristics
Turn-On, Staggered Mode
(MIC2585-1BTS)
Turn-On (No Delay)
VCC1 = 5V
VCC2 = 3.3V
CDLY = 47nF
VCC1 = 5V
VCC2 = 3.3V
RL1 = 3.5Ω
RL2 = 1Ω
RL1 = RL2 = OPEN
CL1 = CL2 = 220µF
TIME (5ms/div.)
TIME (10ms/div.)
Turn-On (Channel 2)
Turn-On (Channel 1)
VCC1 = 5V
VCC2 = 3.3V
RL2 =1Ω
CL2 = 220µF
VCC1 = 5V
VCC2 = 3.3V
RL1 =1Ω
CL1 = 220µF
TIME (5ms/div.)
TIME (2.5ms/div.)
Turn-Off (Tracking Off)
Turn-Off (Tracking On)
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = 3Ω
CL1 = 2200µF
CL2 = 220µF
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = 3Ω
CL1 = 2200µF
CL2 = 220µF
TIME (500µs/div.)
TIME (1ms/div.)
MIC2584/2585
12
March 2005
MIC2584/2585
Micrel
Turn-On Response (Hot Insert)
Power-On Reset Response
VCC1 = 5V
VCC2 = 3.3V
CL = 250µF
RL = 5Ω
22.5ms
VCC1 = 5V
VCC2 = 3.3V
RL1 =3.5Ω
CL1 = 220µF
CPOR = 47nF
TIME (5ms/div.)
TIME (5ms/div.)
Short-Circuit Crowbar Channel 1
Short-Circuit Crowbar Channel 2
(SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
(SCR enabled through a PNP from DIS pin-MIC2585-1BTS)
VCC1 = 5V
VCC2 = 3.3V
4.5A peak
RL1 = 3.5Ω
RL2 = 1Ω
CL1 = CL2 = 220µF
VCC1 = 5V
VCC2 = 3.3V
RL1 = 3.5Ω
3.88A peak
RL2 = 1Ω
CL1 = CL2 = 220µF
TIME (25µs/div.)
TIME (10µs/div.)
Short-Circuit Response
VCC1 = 5V
VCC2 = 3.3V
RL1 = 1Ω
RL2 = open
CL1 = 2200µF
CL2 = 220µF
6.04A peak
TIME (25µs/div.)
March 2005
13
MIC2584/2585
MIC2584/2585
Micrel
Functional Diagram
MIC2585-J
Charge
Pump
1
22 (14)
GATE1
GATE2
21V
21V
23 (15)
SENSE1
+
–
24 (16)
Charge
Pump
2
10V
10V
VCC1
3 (3)
50mV
50mV
2 (2)
SENSE2
+
–
1 (1)
VCC2
20 (13)
5 (4)
19
Up & Down
Tracking
OUT1
OUT2
DIS1
+
–
100mV
+
–
6
DIS2
VCC1
100mV
ITMR
+
VCC1
2.5µA
UVLO1
2.165V
UVLO2
0.8V
20µA
14 (10)
15 (11)
/FAULT
/POR
11 (8)
CFILTER
+
–
VCC1
VREF
2.5µA
Logic
20µA
13 (9)
VCC1
GND
18 (12)
FB1
+
–
Glitch
Filter
20µA
20µA
VREF
0.8V
17
16
PG1
PG2
VCC1
7 (5)
FB2
+
–
Glitch
Filter
12
CDLY
+
–
VCC1 VREF
2.5µA
ICPOR
10 (7)
9
CPOR
TRK
OV1
OV2
+
–
+
–
0.3V
VREF
0.3V
21
4
+
–
+
–
VREF
+
–
8 (6)
ON
+
–
0.8V
VREF
1.235V
Reference
Pin numbers for MIC2584 are in parenthesis ( ) where applicable
MIC2584/2585
14
March 2005
MIC2584/2585
Micrel
This second timing cycle (t
voltage exceeds its FB pin threshold (V ). See Figure 4 in
) begins when the lagging
Functional Description
Hot Swap Insertion
POR
FB
the "Timing Diagrams". When the power supply is already
present(i.e.,nota“hotswapping”condition)andtheMIC2584/
85 device is enabled by applying a logic high signal at the ON
pin, the GATE outputs begin ramping immediately as the first
CPOR timing cycle is bypassed. Active current regulation is
employedtolimittheinrushcurrenttransientresponseduring
start-up by regulating the load current at the programmed
current limit value (See "Current Limiting and Dual-Level
Circuit Breaker" section). The following equation is used to
determine the nominal current limit value:
When circuit boards are inserted into live system backplanes
and supply voltages, high inrush currents can result due to
the charging of bulk capacitance that resides across the
supply pins of the circuit board. This inrush current, although
transient in nature, may be high enough to cause permanent
damage to on-board components or may cause the system’s
supply voltages to go out of regulation during the transient
period which may result in system failures. The MIC2584 and
MIC2585actasacontrollerforexternalN-ChannelMOSFET
devices in which the gate drive is controlled to provide inrush
currentlimitingandoutputvoltageslewratecontrolduringhot
swap insertions.
V
50mV
TRIPSLOW
I
=
=
LIM
(2)
R
R
SENSE
SENSE
Power Supply
where V
in the electrical table and R
is the current limit slow trip threshold found
TRIPSLOW
VCC1 is the main supply input to the MIC2584/85 controller
with a voltage range of 2.3V to 13.2V. The VCC2 supply input
ranges from 1.0V to 13.2V and must be less than or equal to
VCC1 for operation. Both inputs can withstand transient
spikes up to 20V. In order to ensure stability of the supplies,
a minimum 1µF capacitor from each VCC to ground is
recommended. Alternatively, a low pass filter, shown in the
typical application circuit, can be used to eliminate high
frequency oscillations as well as help suppress transient
spikes.
is the selected value that
SENSE
will set the desired current limit. There are two basic start-up
modes for the MIC2584/85: 1)Start-up dominated by load
capacitance and 2)start-up dominated by total gate capaci-
tance. The magnitude of the inrush current delivered to the
load will determine the dominant mode. If the inrush current
is greater than the programmed current limit (I ), then load
LIM
capacitance is dominant. Otherwise, gate capacitance is
dominant. The expected inrush current may be calculated
using the following equation:
Also, due to the existence of undetermined parasitic induc-
tance in the absence of bulk capacitance, placing a Zener
diode at each VCC of the controller to ground in order to
provide external supply transient protection is strongly rec-
ommended. See the typical application circuit in Figure 1.
C
C
C
C
LOAD
LOAD
INRUSH I
×
14µA ×
GATE
(3)
is the
GATE
GATE
where I
is the GATE pin pull-up current, C
LOAD
GATE
load capacitance, and C
is the total GATE capacitance
GATE
Start-Up Cycle
(C
of the external MOSFET and any external capacitor
ISS
connected from the MIC2584/85 GATE pin to ground).
Supply Contact Delay
Load Capacitance Dominated Start-Up
DuringahotinsertofaPCboardintoabackplaneorwhenthe
main supply (VCC1) is powered up from a cold start, as the
voltage at the ON pin rises above its threshold (1.235V
typical), the MIC2584/85 first checks that both supply volt-
ages are above their respective UVLO thresholds. If so, then
the device is enabled and an internal 2.5µA current source
In this case, the load capacitance (C
) is large enough to
LOAD
cause the inrush current to exceed the programmed current
limit but is less than the fast-trip threshold (or the fast-trip
threshold is disabled, ‘M’ option). During start-up under this
condition, the load current is regulated at the programmed
begins charging capacitor C
to 0.3V to initiate a start-up
current limit value (I ) and held constant until the output
POR
LIM
sequence. Once the start-up delay (t
CPOR pin is pulled immediately to ground and a separate
14µA current source begins charging each GATE output to
) elapses, the
voltage rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
START
drive the external MOSFET that switches V to V
programmed contact start-up delay is calculated using the
following equation:
. The
IN
OUT
I
LIM
Output Voltage Slew Rate,dV
/dt =
OUT
(4)
C
LOAD
where I
quently, the value of C
the overcurrent response time, t
is the programmed current limit value. Conse-
VSTART
LIM
tSTART = CPOR
×
0.12 × CPOR (µF)
(1)
must be selected to ensure that
FILTER
ICPOR
, exceeds the time
OCSLOW
where the start-up delay timer threshold (V
) is 0.3V,
) is 2.5µA. See
needed for the output to reach its final value. For example,
given a MOSFET with an input capacitance C = C =
GATE
START
and the Power-On Reset timer current (I
CPOR
ISS
Table 2 for some typical supply contact start-up delays using
2000pF, C
is 1000µF, and I
is set to 5A with a 12V
LOAD
LIM
several standard value capacitors. As each GATE voltage
input, then the load capacitance dominates as determined by
continues ramping toward its final value (V
+ V ) at a
the calculated INRUSH > I . Therefore, the output voltage
CC
GS
LIM
defined slew rate (See Load Capacitance/Gate Capacitance
Dominated Start-Up sections), a second CPOR timing cycle
begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not an
overvoltage, undervoltage lockout, or overcurrent state).
slew rate determined from Equation 4 is:
5A
V
Output Voltage Slew Rate, (dVOUT/dt) =
= 5
100µF
ms
March 2005
15
MIC2584/2585
MIC2584/2585
Micrel
and the resulting t
approximately 2.5ms. (See "Power-On Reset, Overcurrent
Timer, and Sequenced Output Delays" section to calculate
needed to achieve a 12V output is
GATE outputs shut down immediately, bypassing the
overcurrent timer period. To disable current limit and circuit
breaker operation, tie each channel’s SENSE and VCC pins
together and the CFILTER pin to ground.
OCSLOW
t
).
OCSLOW
GATE Capacitance Dominated Start-Up
Output Undervoltage Detection
In this case, the value of the load capacitance relative to the
GATE capacitance is small enough such that during start-up
the output current never exceeds the current limit threshold
The MIC2584/85 employ output undervoltage detection by
monitoring the output voltage through a resistive divider
connected at the FB pins. During turn on, while the voltage at
as determined by Equation 3. The minimum value of C
either FB pin is below its threshold (V ), the /POR pin is
GATE
FB
that will ensure that the current limit is never exceeded is
given by the equation below:
asserted low. Once both FB pin voltages cross their respec-
tive threshold (V ), a 2.5µA current source charges capaci-
FB
tor C
timeperiodt
. Once the CPOR pin voltage reaches 1.235V, the
POR
IGATE
CGATE(Min) =
× CLOAD
elapsesaspinCPORispulledtogroundand
POR
ILIMIT
the /POR pin goes HIGH. If the voltage at either FB drops
belowV formorethan10µs, the/PORpinresetsforatleast
WhereC
isthesummationoftheMOSFETinputcapaci-
FB
GATE
one timing cycle defined by t
tion" for an example).
(See "Applications Informa-
tance (C ) specification and the value of the capacitor
connectedtotheGATEpinoftheMIC2584/85(andMOSFET)
POR
ISS
to ground. Once C
is determined, use the following
Input/Output Overvoltage Protection
GATE
equation to determine the output slew rate
TheMIC2585monitorsanddetectsovervoltageconditionsin
the event of excessive supply transients at the MIC2585
input(s)/output(s). Whenever the voltage threshold is ex-
ceeded at either OV1 or OV2 of the MIC2585, the circuit
breaker is tripped and both GATE outputs are immediately
brought low.
dV
/dt for gate capacitance dominated start-up:
OUT
IGATE
dVOUT/dt =
CGATE
Table1depictstheoutputslewrateforvariousvaluesofC
.
GATE
Power-On Reset, Overcurrent Timer, and Sequenced
Output Delays
IGATE = 14µA
The Power-On Reset delay, t
/POR pin to go HIGH once the lagging voltage exceeds the
, is the time period for the
CGATE
0.001µF
0.01µF
0.1µF
1µF
dVOUT/dt
14V/ms
POR
power-good threshold (V ) monitored at the FB pin. A
FB
1.4V/ms
capacitor connected to CPOR sets the interval and is deter-
mined by using Equation 1 with V
The resulting equation becomes:
0.14V/ms
0.014V/ms
substituted for V
.
POR
START
Table 1. Output Slew Rate Selection for GATE
Capacitance Dominated Start-Up
VPOR
tPOR = CPOR
×
0.5 × CPOR µF
(
)
(7)
) and timer
ICPOR
Current Limiting and Dual-Level Circuit Breaker
where the Power-On Reset threshold (V
POR
Manyapplicationswillrequirethattheinrushandsteadystate
supply current be limited at a specific value in order to protect
critical components within the system. Connecting a sense
resistor between the VCC and SENSE pins of each channel
sets the nominal current limit value for each channel of the
MIC2584/85 and the current limit is calculated using
Equation 2.
current (I
) are typically 1.235V and 2.5µA, respectively.
CPOR
For the MIC2584/85, a capacitor connected to CFILTER is
usedtosetthetimerwhichactivatesthecircuitbreakerduring
overcurrentconditions.Whenthevoltageacrosseithersense
resistor exceeds the slow trip current limit threshold of 50mV,
the overcurrent timer begins to charge for a period, t
determined by C
,
OCSLOW
. If t
elapses, then the circuit
FILTER
OCSLOW
The MIC2584/85 also features a dual-level circuit breaker
triggeredvia50mVand100mVcurrentlimitthresholdssensed
across the VCC and SENSE pins. The first level of the circuit
breaker functions as follows. For the MIC2584/85, once the
voltage sensed across these two pins exceeds 50mV on
either channel, the overcurrent timer, its duration set by
breaker is activated and both GATE outputs are immediately
pulled to ground. The following equation is used to determine
the overcurrent timer period, t
.
OCSLOW
VTMR
tOCSLOW = CFILTER
×
0.5 × CFILTER(µF)
(8)
ITMR
capacitor C
, starts to ramp the voltage at CFILTER
FILTER
where V
, the overcurrent timer threshold, is 1.235V and
TMR
using a 2.5µA constant current source. If the voltage at
CFILTER reaches the overcurrent timer threshold (V ) of
I
, the overcurrent timer current, is 2.5µA. If no capacitor
TMR
TMR
for CFILTER is used, then t
defaults to 20µs.
OCSLOW
1.235V, then CFILTER immediately returns to ground as the
circuit breaker trips and both GATE outputs are immediately
shut down. For the second level, if the voltage sensed across
VCC and SENSE of either channel exceeds 100mV
(–J option) at any time, the circuit breaker trips and both
MIC2584/2585
16
March 2005
MIC2584/2585
Micrel
The sequenced output feature is enabled for the MIC2585 by
placing a capacitor from CDLY to ground. The –1 option
C
t
OCSLOW
FILTER
220pF
680pF
110µs
allows for V
to follow V
and the –2 option allows for
OUT2
OUT1
340µs
500µs
1.6ms
5ms
V
to follow V
during start-up (See "Timing Dia-
OUT1
OUT2
grams, Figure 5"). The sequenced output delay time is
determined using the following equation:
1000pF
3300pF
0.01µF
0.047µF
0.1µF
V
DELAY
t
C
×
0.2 × C
(µF)
(9)
DLY
DLY
DLY
I
DELAY
23.5ms
50ms
where V
, the CDLY pin threshold, is typically 1.235V,
DELAY
I
, the CDLY pin charge current, is typically 6µA, and
DELAY
0.33µF
165ms
C
is the capacitor connected to CDLY. Tables 2, 3, and 4
DLY
provide a quick reference for several timer calculations using
select standard value capacitors.
Table 3. Selected Overcurrent Timer Delays
C
t
DLY
Undervoltage Lockout
DLY
4700pF
0.01µF
0.047µF
0.1µF
950µs
2ms
Internal circuitry keeps both GATE output charge pumps off
untilVCC1andVCC2exceed2.165Vand0.8V, respectively.
C
t
t
POR
9.5ms
20ms
66ms
165ms
200ms
440ms
POR
START
0.01µF
0.033µF
0.05µF
0.1µF
1.2ms
4ms
5ms
16.5ms
25ms
0.33µF
0.82µF
1µF
6ms
12ms
40ms
56ms
120ms
50ms
0.33µF
0.47µF
1µF
165ms
235ms
500ms
2.2µF
Table 4. Selected Sequenced Output Delays
Table 2. Selected Power-On Reset and
Start-Up Delays
March 2005
17
MIC2584/2585
MIC2584/2585
Micrel
up and power-down independent of the load capacitance of
each supply. See "Figure 2" of the "Timing Diagrams".
Applications Information
Output Tracking and Sequencing
Wiring the TRK pin to either OUT1 or OUT2 of the MIC2585
enables the tracking feature. The OUT1 and OUT2 pins
provide output track sensing and are wired directly to the
output (source) of the external MOSFET for Channel 1 and
Channel 2, respectively.
The MIC2585 is equipped with optional supply
settings: Tracking or Sequencing. There are many applica-
tions that require two supplies to track one another within a
specifiedmaximumpotentialdifference(ortime)duringpower-
up and power-down, such as in switching a processor on and
off. Inmanyothersystemsandapplications, supplysequenc-
ing during turn-on may be essential such as when a specific
circuit block (e.g., a system clock) requires available power
before another block of system circuitry. For either supply
configuration, the MIC2585 requires only one additional
component and can be used as an integrated solution to
traditional, andmostoftencomplex, discretecircuitsolutions.
Additionally, the two optional supply settings may be com-
bined to provide supply sequencing during start-up and
supply tracking during turn-off (see Figure 6 below). The
MIC2585guaranteessupplytrackingwithin250mVforpower-
The MIC2584/85 can also be used in systems that support
more than two supplies. Figure 7 illustrates the generic use
of two separate controllers configured to support four inde-
pendent supply rails with an associated output timing re-
sponse. ThePG(or/POR)outputofthefirstcontrollerisused
to enable the second controller. As configured, a fault condi-
tion on either V
or V
will result in all channels being
OUT1
OUT2
shut down. For systems with multiple power sequencing
requirements, the controllers’ output tracking and sequenc-
ingfeaturescanbeimplementedinordertomeetthesystem’s
timing demands.
**Q1
RSENSE1
Si4922DY (2)
0.007Ω
VOUT1
5V@5A
(SO-8)
5%
VIN1
5V
1
3
4
CLOAD1
1500µF
*D1
(8V)
C1
1µF
**Q2
Si4922DY (1)
(SO-8)
RSENSE2
0.015Ω
5%
R4
8.06kΩ
1%
VOUT2
VIN2
1
2
1.8V@2A
1.8V
3
4
CLOAD2
*D2
C2
100µF
(6V)
1µF
C4
0.022µF
24
23
1
2
R1
47kΩ
VCC1
SENSE1 VCC2
SENSE2
GATE2
3
5
R2
39.2kΩ
1%
8
ON
OUT2
9
7
TRK
FB2
11
CFILTER
CDLY
MIC2585-1
R5
10.5kΩ
1%
C5
0.01µF
22
GATE1
C3
0.022µF
12
C6
0.1µF
20
18
OUT1
FB1
R3
15.8kΩ
1%
GND
13
Undervoltage (OUT1) = 4.4V
Undervoltage (OUT2) = 1.5V
Circuit Breaker Response Time = 5ms
Sequenced Output Delay = 20ms
*Diodes are BZX84C(x)V(x)
**Si4922DY is a dual Power MOSFET
Additional pins omitted for clarity
Figure 6. Output Sequencing/Tracking Combination
MIC2584/2585
18
March 2005
MIC2584/2585
Micrel
Fast Output Discharge for Capacitive Loads
Output Turn-Off Sequencing - No Tracking
Inmanyapplicationswhereaswitchcontrolleristurnedoffby
either removing the PCB from the backplane or the ON pin is
reset, capacitive loading will cause the output to retain
voltage unless a ‘bleed’ (low impedance) path is in place in
ordertodischargethecapacitance.TheMIC2585isequipped
with an internal MOSFET that allows the discharging of any
load capacitance to ground through a 50Ω to 170Ω path. The
discharge feature is configured by wiring the DIS pin to the
output (source) of the external MOSFET and is enabled if the
TRK pin is below 0.3V after the controller has been disabled
by a logic low signal received at the ON pin of Figure 1. See
the "Typical Application" circuit of Figure 1. A series resistor
There are many applications where it is necessary or desir-
able for the supply rails to sequence during turn-on and turn-
off, as is the case with some microprocessor requirements.
The MIC2585 can be configured to allow one output to shut
off first, followed by the other output. Figure 8 illustrates an
examplecircuitthatsequencesOUT1andOUT2inafirston–
last off application. During start-up, capacitor C
allows for
DLY
V
to turn on followed by V
20ms later. Once the ON
OUT1
OUT2
pin receives a low signal by removing the PCB from the
backplane,orbyanexternalprocessorsignal,DIS1andDIS2
will assert low. The external crowbar circuit connected from
the DIS2 pin will immediately bring V
to ground while
OUT2
is required from DIS to V
so that the maximum current of
V
will discharge to ground through the 750Ω (680Ω
OUT
OUT1
25mA for the DIS pin is not exceeded.
external, 70Ω internal) series path.
VIN1
MIC2585
GATE1
OUT1
EN
ON
VOUT1
VIN2
ON
VOUT1/VOUT2
PG
/FAULT
Short Circuit
on VOUT1
GATE2
PG
OUT2
VOUT2
VIN3
/FAULT
MIC2585
GATE1
OUT1
ON
VOUT3
VIN4
VOUT3/VOUT4
System Timing
GATE2
/FAULT
OUT2
VOUT4
Figure 7. Supporting More Than Two Supplies
March 2005
19
MIC2584/2585
MIC2584/2585
Micrel
Q1
IRF7822
(SO-8)
RSENSE1
0.012Ω
5%
VOUT1
5V@2.5A
VIN1
5V
1
2
3
4
CLOAD1
220µF
*D1
(8V)
C1
1µF
Q2
IRF7822
(SO-8)
RSENSE2
0.012Ω
5%
VOUT2
3.3V@2.5A
VIN2
3.3V
1
2
3
4
CLOAD2
220µF
*D2
(8V)
C2
1µF
R5
24
23
1
2
20.5kΩ
1%
VCC1
SENSE1 VCC2
SENSE2
GATE2
3
7
R1
C4
0.022µF
33kΩ
R3
FB2
39.2kΩ
1%
R6
8.66kΩ
1%
8
ON
5
OUT2
R2
47kΩ
R9
3.6kΩ
Q3
ZTX788A
R8
1.5kΩ
6
MIC2585-1
11
DIS2
CFILTER
CDLY
C5
0.01µF
Q4
TCR22-4
C7
0.033µF
R10
22
360Ω
GATE1
C3
0.022µF
12
R7
680Ω
C6
0.1µF
19
20
18
DIS1
OUT1
FB1
GND
13
TRK
9
R4
15.8kΩ
1%
Undervoltage (OUT1) = 4.4V
Undervoltage (OUT2) = 2.85V
Circuit Breaker Response Time = 5ms
Sequenced Output Delay (Turn-On) = 20ms
*Dual package Diode is AZ23C8V2
Resistors are 5% unless specified otherwise
Additional pins omitted for clarity
Figure 8. First On—Last Off Application Circuit
Output Undervoltage Detection
2) Next, determine R12 using the output “good”
voltage of 10.5V and the following equation:
Foroutputundervoltagedetection,thefirstconsiderationisto
establish the output voltage level that indicates “power is
good.” For this example, the output value for which a 12V
supply will signal “good” is 10.5V. Next, consider the toler-
R12 +R13
(
)
V
= V
FB1(MAX)
(10)
OUT1(Good)
R13
ances of the input supply and FB threshold (V ). For this
Using some basic algebra and simplifying Equation 10 to
isolate R12, yields:
FB
example, givena12V±5%supplyforChannel1, theresulting
output voltage may be as low as 11.4V and as high as 12.6V.
Additionally, the FB1 threshold has ±50mV tolerance and
may be as low as 1.19V and as high as 1.29V. Thus, to
determine the values of the resistive divider network (R12
and R13) at the FB1 pin, shown in the typical application
circuit on page 1, use the following iterative design proce-
dure.
VOUT1(Good)
R12 = R13
where V
–1
(10.1)
VFB1(MAX)
= 1.29V, V
= 10.5V, and R13 is
FB1(MAX)
OUT1(Good)
14.7kΩ. Substituting these values into Equation 10.1 now
yields R12 = 104.95kΩ. A standard 105kΩ ± 1% is selected.
Now, consider the 11.4V minimum output voltage, the lower
tolerance for R13 and higher tolerance for R12, 14.55kΩ and
106.05kΩ, respectively. With only 11.4V available, the voltage
1) Choose R13 so as to limit the current through
the divider to approximately 100µA or less.
V
1.29V
FB1(MAX)
sensed at the FB1 pin exceeds V
, thus the /POR and
R13
12.9kΩ
.
FB1(MAX)
100µA
100µA
PG1 (MIC2585) signals will transition from LOW to HIGH,
indicating “power is good” given the worse case tolerances of
thisexample. AsimilarapproachshouldbeusedforChannel2.
R13 is chosen as 14.7kΩ ± 1%.
MIC2584/2585
20
March 2005
MIC2584/2585
Micrel
Input Overvoltage Protection
thevoltagesensedattheOV1pinisbelowV
, andthe
OV1(MIN)
MIC2584/85 will not indicate an overvoltage condition until
exceeds approximately 13.2V considering the given
tolerances. A similar approach should be used for Channel 2.
A similar design approach as the previous Undervoltage
Detection example is recommended for the overvoltage
protection circuitry, resistors R6 and R7 for OV1, in Figure 1.
For input overvoltage protection, the first consideration is to
establish the input voltage level that indicates an overvoltage
triggering a system (output voltage) shut down. For our
example, the input value for which the Channel 1 12V supply
will signal an “output shutdown” is 13.2V (+10%). Similarly,
from the previous example:
V
CC1
PCB Connection Sense
ThereareseveralconfigurationoptionsfortheMIC2584/85’s
ON pin to detect if the PCB has been fully seated in the
backplane before initiating a start-up cycle. In Figure 1, the
MIC2584/85 is mounted on the PCB with a resistive divider
network connected to the ON pin. R4 is connected to a short
pin on the PCB edge connector. Until the connectors mate,
the ON pin is held low which keeps the GATE output charge
pump off. Once the connectors mate, the resistor network is
pulled up to the input supply, 12V in this example, and the ON
1) Choose R7 to satisfy 100µA condition.
VOV1(MIN)
1.19V
R7 ≥
≥
≥ 11.9kΩ
100µA
100µA
pin voltage exceeds its threshold (V ) of 1.235V and the
R7 is chosen as 13.0kΩ ±1%
ON
MIC2584/85initiatesastart-upcycle.InFigure9,theconnec-
tion sense consisting of a discrete logic-level MOSFET
and a few resistors allows for interrupt control from the
processororothersignalcontrollertoshutofftheoutputofthe
2) Thus, following the previous example and
substituting R6 and R7 for R12 and R13,
respectively, V
for V
, and 13.2V
OV1(MIN)
FB1(MAX)
overvoltage for 10.5V output “good,” the same
formula yields R6 of 131.2kΩ. The nearest
standard 1% value is 130kΩ.
MIC2584/85. R4 pulls the GATE of Q2 to V and the ON pin
IN
is held low until the connectors are fully mated. Once the
connectors fully mate, a logic LOW at the /ON_OFF signal
turns Q2 off and allows the ON pin to pull up above its
threshold and initiate a start-up cycle. Applying a logic HIGH
at the /ON_OFF signal will turn Q2 on and short the ON pin
of the MIC2584/85 to ground which turns off the GATE output
charge pump.
Now, consider the 12.6V maximum input voltage
(V
+5%), the higher tolerance for R7 and lower tolerance
CC1
forR6, 13.13kΩ and128.7kΩ, respectively. With12.6Vinput,
RSENSE1
0.005Ω
Q1
Si7892DP
(PowerPAK™ SO-8)
Backplane PCB Edge
Connector Connector
Long
Pin
5%
VIN1
5V
1
2
VOUT1
5V@7A
3
4
C1
1µF
CLOAD1
1000µF
R5
10Ω
16
15
R4
VCC1 SENSE1
ON
20kΩ
14
GATE1
R6
6
27.4kΩ
1%
R1
33kΩ
R2
33kΩ
C2
0.01µF
*Q2
R3
33Ω
/ON_OFF
13
12
MIC2584
OUT1
FB1
PCB Connection Sense
Short
Pin
R7
10.5kΩ
1%
10
11
Downstream
Signal
/FAULT
GND
/FAULT
/POR
CPOR
GND
CFILTER
Medium or
Short Pin
7
9
8
C3
0.033µF
C4
0.01µF
Long
Pin
Undervoltage (Output) = 4.45V
/POR Delay = 16.5ms
START-UP Delay = 4ms
Circuit Breaker Response Time = 5ms
*Q2 is TN0201T (SOT-23)
Channel 2 and additional pins omitted for clarity.
Figure 9. PCB Connection Sense with ON/OFF Control
March 2005
21
MIC2584/2585
MIC2584/2585
Micrel
Higher UVLO Setting
being simultaneously configured as outputs. In this case, the
outputdriversofeachdevicecontendforcontroloversending
dataalongthebuswhichmaycauseexcessivecurrenttoflow
in one of the paths (I or I ) shown in the bidirectional port of
Figure 11. Upon powering down the system, the core voltage
supply should turn off after the I/O as the bus control signal(s)
may enter an indeterminate state if the core is powered down
first. Thus, for power sequencing of a dual supply voltage
Once a PCB is inserted into a backplane (power supply), the
internal UVLO circuit of the MIC2584/85 holds the GATE
output charge pump off until VCC1 exceeds 2.165V and
VCC2 exceeds 0.8V. If VCC1 falls below 1.935V or VCC2
falls below 0.77V, the UVLO circuit pulls the GATE output to
ground and clears the overvoltage and/or current limit faults.
For a higher UVLO threshold, the circuit in Figure 10 can be
used to delay the output MOSFET from switching on until the
desired input voltage is achieved. The circuit allows the
1
2
DSP implementing the MIC2585 (if V
≥ V ), a circuit
CORE
I/O
similar to Figure 8 is recommended with the core voltage
supplied through Channel 1 and the I/O voltage supplied
charge pumps to remain off until V
exceeds
IN1
through Channel 2. For systems with V
< V , the
CORE
I/O
R1
MIC2585-2optionwiththeI/OvoltagethroughChannel1and
core through Channel 2 is used to implement the first on-last
off application.
1+
×1.235V
provided that VCC2 has exceeded its
R2
threshold. Both GATE drive outputs will be shut down when
R1
Sense Resistor Selection
1+
×1.21V
. In the example circuit , the
V
falls below
IN1
R2
TheMIC2584andMIC2585usealow-valuesenseresistorto
measure the current flowing through the MOSFET switch
(and therefore the load). This sense resistor is nominally set
rising UVLO threshold is set at approximately 9.0V and the
falling UVLO threshold is established as 8.9V. The circuit
consists of an external resistor divider at the ON pin that
keeps both GATE output charge pumps off until the voltage
at the ON pin exceeds its threshold (V ) and after the start-
up timer elapses.
at 50mV/I
. To accommodate worst-case toler-
LOAD(CONT)
ances for both the sense resistor (allow ±3% over time and
temperature for a resistor with ±1% initial tolerance) and still
supply the maximum required steady-state load current, a
slightly more detailed calculation must be used.
ON
Hot Swap Power Control for DSPs
The current limit threshold voltage (i.e., the “trip point”) for the
In designing power supplies for dual supply logic devices,
such as a DSP, consideration should be given to the system
timing requirements of the core and I/O voltages for power-
up and power-down operations. When power is provided to
the core and I/O circuit blocks in an unpredictable manner,
the effects can be detrimental to the life cycle of the DSP or
logicdevicebyallowingunexpectedcurrenttoflowinthecore
and I/O isolation structures. Additionally, bus contention is
one of the critical system-level issues supporting the need for
power supply sequencing. Since the core supplies logic
control for the bus, powering up the I/O before the core may
result in both the DSP and an attached peripheral device
MIC2584/85 may be as low as 42.5mV, which would equate
toasenseresistorvalueof42.5mV/I
.Carryingthe
LOAD(CONT)
numbers through for the case where the value of the sense
resistor is 3% high yields:
42.5mV
41.3mV
RSENSE(MAX)
=
=
(11)
ILOAD(CONT)
1.03 I
(
)
(
)
LOAD(CONT)
Once the value of R
has been chosen in this manner,
SENSE
it is good practice to check the maximum I
which
LOAD(CONT)
the circuit may let through in the case of tolerance build-up in
RSENSE1
0.010Ω
Q1
IRF7822
5%
(SO-8)
VIN1
12V
1
2
VOUT1
12V@4A
CLOAD1
3
4
C1
1µF
D1
(18V)
1000µF
R4
R3
R1
154kΩ
1%
16
15
10Ω
133kΩ
1%
VCC1 SENSE1
14
12
GATE1
FB1
C2
0.01µF
6
ON
MIC2584
R2
24.3kΩ
1%
R5
16.2kΩ
1%
GND
9
Undervoltage Lockout Threshold (rising) = 9.0V
Undervoltage Lockout Threshold (falling) = 8.9V
Undervoltage (Output) = 11.4V
Channel 2 and additional pins omitted for clarity.
Figure 10. Higher UVLO Setting
MIC2584/2585
22
March 2005
MIC2584/2585
Micrel
the opposite direction. Here, the worst-case maximum cur-
rent is found using a 57.5mV trip voltage and a sense resistor
that is 3% low in value. The resulting equation is:
MOSFET Voltage Requirements
The first voltage requirement for the MOSFET is easily stated:
the drain-source breakdown voltage of the MOSFET must be
greater than V
. For instance, a 12V input may reason-
57.5mV
59.3mV
IN(MAX)
ILOAD(CONT,MAX)
=
=
ably be expected to see high-frequency transients as high as
18V. Therefore, the drain-source breakdown voltage of the
MOSFET must be at least 19V. For ample safety margin and
standard availability, the closest minimum value will be 20V.
(12)
RSENSE(NOM)
0.97 R
(
)
(
)
SENSE(NOM)
As an example, if an output must carry a continuous 6A
without nuisance trips occurring, Equation 11
The second breakdown voltage criterion that must be met is a
bit subtler than simple drain-source breakdown voltage, but is
not hard to meet. In MIC2584/85 applications, the gate of the
external MOSFET is driven up to approximately 20V by the
internal output MOSFET (again, assuming 12V operation). At
thesametime,iftheoutputoftheexternalMOSFET(itssource)
issuddenlysubjectedtoashort, thegate-sourcevoltagewillgo
to (20V – 0V) = 20V. This means that the external MOSFET
must be chosen to have a gate-source breakdown voltage of
20V or more, which is an available standard maximum value.
However, if operation is above 12V, the 20V gate-source
maximumwilllikelybeexceeded.Asaresult,anexternalZener
diode clamp should be used to prevent breakdown of the
external MOSFET when operating at voltages above 10V. A
Zener diode with 10V rating is recommended as shown in
Figure 12. At the present time, most power MOSFETs with a
20Vgate-sourcevoltageratinghavea30Vdrain-sourcebreak-
down rating or higher. As a general tip, choose surface-mount
devices with a drain-source rating of 30V as a starting point.
41.3mV
R
=
= 6.88mΩ
. The next lowest
yields:
SENSE(MAX)
6A
standardvalueis6mΩ Attheothersetoftoleranceextremes
for the output in question,
.
59.3mV
I
=
= 9.88A
. Knowing this final da-
LOAD(CONT,MAX)
6.0mΩ
tum, we can determine the necessary wattage of the sense
2
I will be I
, and
resistor using P = I R, where
LOAD(CONT, MAX)
R will be (0.97)(R
).
These numbers yield the
= 0.568W. In this ex-
SENSE(NOM)
2
following: P
= (9.88A) (5.82mΩ)
MAX
ample, a 1W sense resistor is sufficient.
MOSFET Selection
Selecting the proper external MOSFET for use with the
MIC2584/85 involves three straightforward tasks:
• Choice of a MOSFET which meets minimum
voltage requirements.
• Selection of a device to handle the maximum
continuous current (steady-state thermal is-
sues).
Finally, the external gate drive of the MIC2584/85 requires a
low-voltage logic level MOSFET when operating at voltages
lower than 3V. There are 2.5V logic level MOSFETs available.
See Table 5, "MOSFET and Sense Resistor Vendors" for
suggested manufacturers.
• Verify the selected part’s ability to withstand any
peak currents (transient thermal issues).
CORE SUPPLY
I/O SUPPLY
(VCC
)
(VDD)
VDD
VDD
Data In
OE
Data In
OE
I1
OUTPUT
DRIVER
CIRCUIT
BLOCK
OUTPUT
DRIVER
CIRCUIT
BLOCK
I2
Data Out
Data Out
External
Bus Control
TX_/RX
CORE
I/O
Dual Supply DSP
Peripheral
Figure 11. Bidirectional Port Bus Contention
March 2005
23
MIC2584/2585
MIC2584/2585
Micrel
MOSFET Steady-State Thermal Issues
R
10mΩ[1 + (110 - 25)(0.005)] 14.3mΩ
ON
TheselectionofaMOSFETtomeetthemaximumcontinuous
current is a fairly straightforward exercise. First, arm yourself
with the following data:
The final step is to make sure that the heat sinking available
to the MOSFET is capable of dissipating at least as much
power (rated in °C/W) as that with which the MOSFET’s
performance was specified by the manufacturer. Here are a
few practical tips:
• The value of I
for the output in
LOAD(CONT, MAX.)
question (see "Sense Resistor Selection").
1. The heat from a surface-mount device such as
an SO-8 MOSFET flows almost entirely out of
the drain leads. If the drain leads can be sol-
dered down to one square inch or more, the
copper will act as the heat sink for the part. This
copper must be on the same layer of the board
as the MOSFET drain.
• The manufacturer’s data sheet for the candidate
MOSFET.
• The maximum ambient temperature in which the
device will be required to operate.
• Any knowledge you can get about the heat
sinking available to the device (e.g., can heat be
dissipated into the ground plane or power plane,
if using a surface-mount part? Is any airflow
available?).
2. Airflow works. Even a few LFM (linear feet per
minute) of air will cool a MOSFET down sub-
stantially. If you can, position the MOSFET(s)
near the inlet of a power supply’s fan, or the
outlet of a processor’s cooling fan.
The data sheet will almost always give a value of on resis-
tancegivenfortheMOSFETatagate-sourcevoltageof4.5V,
and another value at a gate-source voltage of 10V. As a first
approximation, addthetwovaluestogetheranddividebytwo
to get the on-resistance of the part with 8V of enhancement.
3. The best test of a surface-mount MOSFET for
an application (assuming the above tips show it
to be a likely fit) is an empirical one. Check the
MOSFET's temperature in the actual layout of
the expected final circuit, at full operating
current. The use of a thermocouple on the drain
leads, or infrared pyrometer on the package, will
then give a reasonable idea of the device’s
junction temperature.
Call this value R . Since a heavily enhanced MOSFET acts
ON
as an ohmic (resistive) device, almost all that’s required to
determine steady-state power dissipation is to calculate I R.
The one addendum to this is that MOSFETs have a slight
2
increase in R
with increasing die temperature. A good
ON
approximation for this value is 0.5% increase in R per °C
ON
riseinjunctiontemperatureabovethepointatwhichR was
ON
MOSFET Transient Thermal Issues
initially specified by the manufacturer. For instance, if the
selected MOSFET has a calculated R
of 10mΩ at a
Having chosen a MOSFET that will withstand the imposed
voltage stresses, and the worse case continuous I R power
ON
2
T = 25°C, and the actual junction temperature ends up
J
at 110°C, a good first cut at the operating value for R
would be:
dissipation which it will see, it remains only to verify the
MOSFET’s ability to handle short-term overload power dissi-
pation without overheating. A MOSFET can handle a much
ON
RSENSE1
0.006Ω
Q1
IRF7822
(SO-8)
*D2
1N5240B
10V
5%
VIN
12V
1
2
VOUT
12V@6A
3
4
D1
(18V)
CLOAD1
220µF
C1
1µF
R1
33kΩ
R4
100kΩ
1%
R3
10Ω
16
15
VCC1 SENSE1
14
GATE1
C2
0.01µF
6
ON
12
11
MIC2584
FB1
R5
13.3kΩ
1%
R2
33kΩ
DOWNSTREAM
SIGNAL
/POR
CPOR
GND
7
9
C3
0.05µF
Undervoltage (Output) = 11.0V
/POR Delay = 25ms
START-UP Delay = 6ms
*Recommended for MOSFETs with gate-source
breakdown of 20V or less for catastrophic output
short circuit protection. (IRF7822 V (MAX) = 12V)
GS
Channel 2 and additional pins omitted for clarity.
Figure 12. Zener Clamped MOSFET Gate
MIC2584/2585
24
March 2005
MIC2584/2585
Micrel
higher pulsed power without damage than its continuous
dissipationratingswouldimply.Thereasonforthisisthat,like
everything else, thermal devices (silicon die, lead frames,
etc.) have thermal inertia.
Recalling from our previous approximation hint, the part has
an R of (0.0335/2) = 17mΩ at 25°C.
ON
Assume it has been carrying just about 1.2A for some time.
When performing this calculation, be sure to use the highest
In terms related directly to the specification and use of power
MOSFETs, this is known as “transient thermal impedance,”
anticipated ambient temperature (T
) in which the
A(MAX)
MOSFET will be operating as the starting temperature, and
or Z
. Almost all power MOSFET data sheets give a
θ(J-A)
find the operating junction temperature increase (∆T ) from
J
Transient Thermal Impedance Curve. For example, take the
followingcase:V =12V, t hasbeensetto100msec,
thatpoint.Then,asshownnext,thefinaljunctiontemperature
IN
OCSLOW
isfoundbyaddingT
and∆T . Sincethisisnotaclosed-
A(MAX)
J
I
is 1.2A, the slow-trip threshold is 50mV
LOAD(CONT. MAX)
formequation, gettingacloseapproximationmaytakeoneor
two iterations, But it’s not a hard calculation to perform, and
tends to converge quickly.
nominal, and the fast-trip threshold is 100mV. If the output is
accidentally connected to a 6Ω load, the output current from
the MOSFET will be regulated to 1.2A for 100ms (t
)
OCSLOW
Then the starting (steady-state)T is:
before the part trips. During that time, the dissipation in the
MOSFET is given by:
J
T
T
T
+ ∆T
J
J
A(MAX)
P = E x I E
= [12V-(1.2A)(6Ω)] = 4.8V
+ [R + (T
– T )(0.005/°C)(R )]
A ON
MOSFET
A(MAX)
ON
A(MAX)
P
= (4.8V x 1.2A) = 5.76W for 100msec.
2
MOSFET
x I x R
θ(J-A)
At first glance, it would appear that a really hefty MOSFET is
required to withstand this sort of fault condition. This is where
the transient thermal impedance curves become very useful.
Figure13showsthecurvefortheVishay(Siliconix)Si4410DY,
a commonly used SO-8 power MOSFET.
T
T
55°C + [17mΩ + (55°C-25°C)(0.005)(17mΩ)]
J
J
2
x (1.2A) x (50°C/W)
(55°C + (0.02815W)(50°C/W)
54.6°C
Taking the simplest case first, we’ll assume that once a fault
eventsuchastheoneinquestionoccurs, itwillbealongtime,
10 minutes or more, before the fault is isolated and the
channel is reset. In such a case, we can approximate this as
a“singlepulse”event,thatistosay,there’snosignificantduty
cycle. Then, reading up from the X-axis at the point where
“SquareWavePulseDuration”isequalto0.1sec(=100msec),
Iterate the calculation once to see if this value is within a few
percent of the expected final value. For this iteration we will
start with T equal to the already calculated value of 54.6°C:
J
T
T
T + [17mΩ + (54.6°C-25°C)(0.005)(17mΩ)]
J
A
2
x (1.2A) x (50°C/W)
( 55°C + (0.02832W)(50°C/W) 56.42°C
J
we see that the Z
of this MOSFET to a highly infrequent
So our original approximation of 56.4°C was very close to the
θ(J-A)
event of this duration is only 8% of its continuous R
.
correct value. We will use T = 56°C.
θ(J-A)
θ(J-A)
J
This particular part is specified as having an R
of
Finally, add (5.76W)(50°C/W)(0.08) = 23°C to the steady-state
50°C/W for intervals of 10 seconds or less. Thus:
T to get T
= 79°C. This is an acceptable
J
J(TRANSIENT MAX.)
maximum junction temperature for this part.
Assume T = 55°C maximum, 1 square inch of copper at the
A
drain leads, no airflow.
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
1
Duty Cycle = 0.5
0.2
Notes:
0.1
P
DM
0.1
0.05
t
1
t
2
t
t
1
1. Duty Cycle, D =
2
0.02
2. Per Unit Base = R
= 50¡ C/W
thJA
(t)
3. T —T = P
Z
JM DM thJA
A
Single Pulse
4. Surface Mounted
0.01
—4
10
—3
—2
10
—1
10
10
1
10
30
Square Wave Pulse Duration (sec)
Figure 13. Transient Thermal Impedance
March 2005
25
MIC2584/2585
MIC2584/2585
Micrel
PCB Layout Considerations
Becauseofthelowvaluesofthesenseresistorsusedwiththe
MIC2584/85 controllers, special attention to the layout must
be used in order for the device’s circuit breaker function to
operate properly. Specifically, the use of a 4-wire Kelvin
a 12V application. Many hot swap applications will require
load currents of several amperes. Therefore, the power (V
CC
andReturn)tracewidths(W)needtobewideenoughtoallow
the current to flow while the rise in temperature for a given
copper plate (e.g., 1oz. or 2oz.) is kept to a maximum of
10°C ~ 25°C. Also, these traces should be as short as
possible in order to minimize the IR drops between the input
and the load. For a starting point, there are many trace width
calculation tools available on the web such as the following
link:
connectiontoaccuratelymeasurethevoltageacrossR
SENSE
is highly recommended. Kelvin sensing is simply a means of
making sure that any voltage drops in the power traces
connecting to the resistors does not get picked up by the
traces themselves. Additionally, these Kelvin connections
should be isolated from all other signal traces to avoid
introducing noise onto these sensitive nodes. Figure 14
http://www.aracnet.com/cgi-usr/gpatrick/trace.pl
illustratesarecommended, multi-layerlayoutfortheR
,
SENSE
Power MOSFET, timer(s), and feedback network connec-
tions. The feedback network resistor values are selected for
Finally, the use of plated-through vias will be needed to make
circuitconnectionstopowerandgroundplaneswhenutilizing
multi-layer PC boards.
Current Flow
to the Load
Current Flow
to the Load
*POWER MOSFET
*SENSE RESISTOR
(2512)
(SO-8)
D
G
D
D
S
S
W
W
D
S
Via to
GND plane
**RGATE
**CGATE
12.4k
1%
93.1k
1%
16
15
14
13
12
11
10
9
Via to
GND plane
Current Flow
from the Load
W
DRAWING IS NOT TO SCALE
Similar considerations should be used for Channel 2.
*See Table 5 for part numbers and vendors.
**Optional components.
Trace width (W) guidelines given in "PCB Layout Recommendations" section of the datasheet.
Figure 14. Recommended PCB Layout for Sense Resistor, Power MOSFET and Feedback Network
MIC2584/2585
26
March 2005
MIC2584/2585
Micrel
MOSFET and Sense Resistor Vendors
Devicetypesandmanufacturercontactinformationforpower
MOSFETs and sense resistors is provided in Table 5. Some
of the recommended MOSFETs include a metal heat sink on
the bottom side of the package that is connected to the drain
leads. The recommended trace for the MOSFET gate of
Figure 14 must be redirected when using MOSFETs pack-
aged in this style. Contact the device manufacturer for
package information.
MOSFET Vendors
Key MOSFET Type(s)
*Applications
Contact Information
Vishay (Siliconix)
Si4420DY (SO-8 package)
Si4442DY (SO-8 package)
Si3442DV (SO-8 package)
Si7860DP (PowerPAK™ SO-8)
Si7892DP (PowerPAK™ SO-8)
Si7884DP (PowerPAK™ SO-8)
SUB60N06-18 (TO-263)
I
I
I
I
I
I
I
I
≤ 10A
www.siliconix.com
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 10A-15A, V ≤ 5V (203) 452-5664
≤ 3A, V ≤ 5V
≤ 12A
≤ 15A
≤ 15A
CC
CC
≥ 20A, V ≥ 5V
≥ 20A, V ≥ 5V
CC
SUB70N04-10 (TO-263)
CC
International Rectifier
IRF7413 (SO-8 package)
IRF7457 (SO-8 package)
IRF7822 (SO-8 package)
IRLBA1304 (Super220™)
I
I
I
I
≤ 10A
≤ 10A
= 10A-15A, V ≤ 5V
www.irf.com
(310) 322-3331
OUT
OUT
OUT
OUT
CC
≥ 20A, V ≥ 5V
CC
Fairchild Semiconductor
FDS6680A (SO-8 package)
FDS6690A (SO-8 package)
I
I
≤ 10A
≤ 10A, V ≤ 5V
www.fairchildsemi.com
(207) 775-8100
OUT
OUT
CC
Philips
Hitachi
PH3230 (SOT669-LFPAK)
HAT2099H (LFPAK)
I
I
≥ 20A
≥ 20A
www.philips.com
OUT
OUT
www.halsp.hitachi.com
(408) 433-1990
* These devices are not limited to these conditions in many cases, but these conditions are provided as a helpful reference for customer applications.
Resistor Vendors
Sense Resistors
Contact Information
Vishay (Dale)
“WSL” Series
www.vishay.com/docswsl_30100.pdf
(203) 452-5664
IRC
“OARS” Series
“LR” Series
(second source to “WSL”)
www.irctt.com/pdf_files/OARS.pdf
www.irctt.com/pdf_files/LRC.pdf
(828) 264-8861
Table 5. MOSFET and Sense Resistor Vendors
March 2005
27
MIC2584/2585
MIC2584/2585
Micrel
Package Information
Rev. 01
16-Pin TSSOP (TS)
4.50 (0.177)
4.30 (0.169)
DIMENSIONS:
MM (INCH)
6.4 BSC (0.252)
0.30 (0.012)
0.19 (0.007)
7.90 (0.311)
7.70 (0.303)
1.10 MAX (0.043)
0.20 (0.008)
0.09 (0.003)
0.65 BSC
(0.026)
1.00 (0.039) REF
8°
0°
0.15 (0.006)
0.05 (0.002)
0.70 (0.028)
0.50 (0.020)
24-Pin TSSOP (TS)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
MIC2584/2585
28
March 2005
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