MIC2586-2YMTR_技术文档

MIC2586/MIC2586R

Single-Channel, Positive High-Voltage

Hot Swap Controller/Sequencer

NOT RECOMMENDED FOR NEW DESIGNS

General Description

Features

The MIC2586 and MIC2586R are single-channel positive

voltage hot swap controllers/sequencers designed to

provide safe insertion and removal of boards for systems

that require live (always-powered) backplanes. These

devices use few external components and act as

controllers for external N-channel power MOSFET devices

to provide inrush current control and output voltage slew

rate control. Overcurrent fault protection is provided via

programmable analog foldback current-limit circuitry

equipped with a programmable overcurrent filter. These

protection circuits combine to limit the power dissipation of

the external MOSFET to insure that the MOSFET is in its

SOA during fault conditions.

• Operates from +10V to +80V with 100V ABS MAX

operation

• Industrial temperature specifications at V_CC= +24V and

V_CC= +48V

• Programmable current limit with analog foldback

• Active current regulation minimizes inrush current

• Electronic circuit breaker for overcurrent fault protection

• Output latch off (MIC2586) or output auto-retry

(MIC2586R)

• Fast responding circuit breaker (< 2µs) to short-circuit

loads

• Programmable input undervoltage lockout

The MIC2586 provides a circuit breaker function that

latches the output MOSFET off if the load current exceeds

the current-limit threshold for the duration of the

programmable timer. Conversely, the MIC2586R will

attempt to restart power after a load current fault with a low

duty cycle to prevent the MOSFET from overheating.

Each device provides either an active-HIGH (−1BM) or an

active-LOW (−2BM) “power-is-good” (PWRGD) signal.

The MIC2586 and the MIC2586R provide up to three,

time-sequenced PWRGD outputs that can be used as a

control for DC/DC converter circuits or power modules.

• Fault Reporting:

Three open-drain PWRGD outputs for enabling DC/DC

converter(s)

− Active-HIGH: MIC2586-1/MIC2586R-1

− Active-LOW: MIC2586-2/MIC2586R-2

Applications

• General-purpose hot board insertion

• High-voltage, high-side electronic circuit breaker

• +12V/+24V/+48V distributed power systems

• +24V/+48V industrial/alarm systems

• Telecom systems

Data sheets and support documentation can be found on

Micrel’s web site at: www.micrel.com.

• Medical systems

Power, Connect and Protect is a trademark of Micrel, Inc.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

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MIC2586/MIC2586R

Typical Application

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MIC2586/MIC2586R

Ordering Information

Part Number

PWRGD Polarity

Circuit Breaker Function

Package

Standard

Pb-Free

MIC2586-1BM

MIC2586-2BM

MIC2586R-1BM

MIC2586R-2BM

MIC2586-1YM

MIC2586-2YM

MIC2586R-1YM

MIC2586R-2YM

Active-HIGH

Active-LOW

Active-HIGH

Active-LOW

Latched

14-Pin SOIC

Auto-Retry

Pin Configuration

14-Pin SOIC (M)

MIC2586-1BM

MIC2586R-1BM

Pin Description

Pin Number

Pin Name

Pin Function

Reserved: Make no external connections to these pins.

1, 8, 12

NC

Enable Input: When the voltage at the ON pin is higher than the V_ONHthreshold, a start cycle is

initiated. An internal current source (I_GATEON) is activated which charges the GATE pin, ramping

up the voltage at this pin to turn on an external MOSFET. Whenever the voltage at the ON pin is

lower than the V_ONLthreshold, an undervoltage lockout condition is detected and the I_GATEON

current source is disabled while the GATE pin is pulled low by another internal current source

(I_GATEOFF). After a load current fault, toggling the ON pin LOW will reset the circuit breaker then

back HIGH (ON pin) will initiate another start cycle.

2

3

ON

FB

Output Voltage Feedback Input: This pin is connected to an external resistor divider that is used

to sample the output load voltage. The voltage at this pin is measured against an internal

comparator whose output controls the PWRGD (or /PWRGD) signal. PWRGD (or /PWRGD)

asserts when the FB pin voltage crosses the V_FBHthreshold. When the FB pin voltage is lower

than its V_FBLthreshold, PWRGD (or /PWRGD) is deasserted. The FB comparator exhibits a

typical hysteresis of 80mV.

The FB pin voltage also affects the MIC2586/MIC2586R’s foldback current limit operation (see the

Functional Description section for further information).

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MIC2586/MIC2586R

Pin Description (Continued)

Pin Number

Pin Name

Pin Function

Power-is-Good (PWRGD1 or /PWRGD1), Open-Drain Output: This pin remains deasserted during

start up while the FB pin voltage is below the V_FBHthreshold. Once the voltage at the FB pin rises

above the V_FBHthreshold, the PWRGD output asserts with minimal delay (typically ≤ 5µs).

PWRGD1

(MIC2586-1)

(MIC2586R-1)

Active-HIGH

For the (−1) options, the PWRGDx output pin will be high-impedance when the FB pin voltage is

higher than V_FBHand will pull down to GND when the FB pin voltage is less than V_FBL

.

For the (−2) options, the /PWRGDx output pin will be high-impedance when the FB pin voltage is

lower than V_FBLand will pull down to GND when the FB pin voltage is higher than V_FBH

4

.

/PWRGD1

(MIC2586-2)

Each PWRGD output pin is connected to an open-drain, N-channel transistor implemented with

high-voltage structures. These transistors are capable of operating with pull-up resistors to supply

voltages as high as 100V.

(MIC2586R-2)

Active-LOW

To use this signal as a logic control in low-voltage DC/DC conversion applications, an external

pull-up resistor between this pin and the logic supply voltage is recommended, unless an internal

pull-up impedance is provided by the DC/DC module or other device (load).

Power-is-Good 2 (PWRGD2 or /PWRGD2), Open-Drain Output: For the (−1) option, this output

signal is asserted when the following is true: PWRGD1 = Asserted AND the PWRGD1-to-

PWRGD2 delay (t_PG(1-2)) has elapsed, where t_PG(1-2)is the time delay programmed by the

capacitor (C_PG) connected to the PGTIMER pin. Once PWRGD1 is asserted, an internal current

source (I_CPG) begins to charge C_PG. When the voltage on C_PGcrosses the V_PG2threshold

(typically, 0.625V), PWRGD2 is asserted. The same description above applies to the (−2) option.

For further information, refer to the PWRGD1 and PGTIMER pin descriptions.

PWRGD2

(MIC2586-1)

(MIC2586R-1)

Active-HIGH

5

7

9

/PWRGD2

(MIC2586-2)

To use this signal as a logic control in low-voltage DC/DC conversion applications, an external

pull-up resistor between this pin and the logic supply voltage is recommended, unless internal

pull-up impedance is provided by the DC/DC module or other device (load).

(MIC2586R-2)

Active-LOW

Power-is-Good Delay Timer: A capacitor (C_PG) connected from this pin to GND sets a delay from

PWRGD1 to PWRGD2 (t_PG(1-2)) and from PWRGD1 to PWRGD3 (t_PG(1-3)). An internal current

source (I_CPG) is used to charge C_PGonly after PWRGD1 has been asserted. The same description

applies to the active-LOW (−2) output signals.

PGTIMER

Power-is-Good Output 3 (PWRGD3 or /PWRGD3), Open-Drain Output: For the (−1) option, this

output signal is asserted when the following is true: PWRGD1 = Asserted AND the PWRGD1-to-

PWRGD3 delay (t_PG(1-3)) has elapsed, where t_PG(1-3)is the time delay programmed by the

capacitor (C_PG) connected to the PGTIMER pin. Once PWRGD1 is asserted, an internal current

source (I_CPG) begins to charge C_PG. When the voltage on C_PGcrosses the V_PG3threshold

(typically, 1.25V), PWRGD3 is asserted. The same description above applies to the (−2) option.

For further information, refer to the PWRGD1 and PGTIMER pin descriptions.

PWRGD3

(MIC2586-1)

(MIC2586R-1)

Active-HIGH

/PWRGD3

(MIC2586-2)

To use this signal as a logic control in low-voltage DC/DC conversion applications, an external

pull-up resistor between this pin and the logic supply voltage is recommended, unless internal

pull-up impedance is provided by the DC/DC module or other device (load).

(MIC2586R-2)

Active-LOW

Current-Limit Response Timer: A capacitor connected from this pin to GND provides overcurrent

filtering to prevent nuisance “tripping” of the circuit breaker by setting the time (t_FLT) for which the

controller is allowed to remain in current limit. Once the MIC2586 circuit breaker trips, the output

latches off. Under normal (steady-state) operation, the TIMER pin is held to GND by an internal

3.5µA current source (I_TIMERDN). When the voltage across the external sense resistor exceeds the

V_TRIPthreshold, an internal 65µA current source (I_TIMERUP) is activated to charge the capacitor

connected to the TIMER pin. When the TIMER pin voltage reaches the V_TIMERHthreshold, the

circuit breaker is tripped pulling the GATE pin low, the I_TIMERUPcurrent source is disabled, and the

TIMER pin capacitor is discharged by the I_TIMERDNcurrent source. When the voltage at the TIMER

pin is less than 0.5V, the MIC2586 can be restarted by toggling the ON pin LOW then HIGH.

10

TIMER

For the MIC2586R, the capacitor connected to the TIMER pin sets the period of auto-retry where

the duty cycle is fixed at a nominal 5%.

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MIC2586/MIC2586R

Pin Description (Continued)

Pin Number

Pin Name

Pin Function

Gate Drive Output: This pin is the output of an internal charge pump connected to the gate of an

external, N-channel power MOSFET. The charge pump has been designed to provide a minimum

gate drive (∆V_GATE= V_GATE- V_CC) of +7.5V over the input supply’s full operating range. When the

ON pin voltage is higher than the V_ONHthreshold, a 16µA current source (I_GATEON) charges the

GATE pin.

When in current limit, the output voltage at the GATE pin is adjusted so that the voltage across

the external sense resistor is held equal to V_TRIPwhile the capacitor connected to the TIMER pin

charges. If the current-limit condition goes away before the TIMER pin voltage rises above the

V_TIMERHthreshold, then steady-state operation resumes.

11

GATE

The GATE output pin is shut down whenever: (1) the input supply voltage is lower than the V_UVL

threshold, (2) the ON pin voltage is lower than the V_ONLthreshold, (3) the TIMER pin voltage is

higher than the V_TIMERHthreshold, or (4) the difference between the VCC and SENSE pins is

greater than V_TRIPwhile the TIMER pin is grounded. For cases (3) and (4) – overcurrent fault

conditions – the GATE is immediately pulled to ground by I_GATEFLT, a 30mA (minimum) pulldown

current.

Circuit Breaker Sense Input: This pin is the (-) Kelvin sense connection for the output supply rail.

A low-valued resistor (R_SENSE) between this pin and the VCC pin sets the circuit breaker’s current

limit trip point. When the current limit detector circuit is enabled (as well as the current-limit timer),

while the FB pin voltage remains higher than 1V, the voltage across the sense resistor (V_CC

-

V_SENSE) will be regulated to V_TRIP(47mV, typically) to maintain a constant current into the load.

When the FB pin voltage is less than ≅0.8V, the voltage across the sense resistor decreases

linearly to a minimum of 12mV (typical) when the FB pin voltage is at 0V.

13

14

SENSE

To disable the circuit breaker (and defeat all current limit protections), the SENSE pin and the

VCC pin can be tied together.

Positive Supply Voltage Input: This pin is the (+) Kelvin sense connection for the output supply

rail. The nominal operating voltage range for the MIC2586 and the MIC2586R is +10V to +80V,

and VCC can withstand input transients up to +100V. An undervoltage lockout circuit holds the

GATE pin low whenever the supply voltage to the MIC2586/MIC2586R is less than the V_UVH

threshold.

VCC

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MIC2586/MIC2586R

Absolute Maximum Ratings⁽¹⁾

Operating Ratings⁽²⁾

(All voltages are referred to GND)

Supply Voltage (V_CC)...................................... +10V to +80V

Ambient Temperature (T_A)..........................–40°C to +85°C

Junction Temperature (T_J) ....................................... +125°C

Package Thermal Resistance

Supply Voltage (V_CC)................................... −0.3V to +100V

GATE........................................................... −0.3V to +100V

ON, SENSE................................................. −0.3V to +100V

PWRGDx, /PWRGDx.................................. −0.3V to +100V

FB .............................................................. −0.3V to +100V

TIMER, CPG ................................................... −0.3V to +6V

ESD Rating⁽³⁾

14-Pin SOIC.....................................................120°C/W

Human Body Model .................................................2kV

Machine Model ......................................................200V

Lead Temperature (soldering)

Standard Package (−xBM)

IR Reflow....................................240°C + 0°C/−5°C

Lead-Free Package (−xYM)

IR Reflow....................................260°C + 0°C/−5°C

DC Electrical Characteristics⁽⁴⁾

V_CC= +24V and +48V; T_A= 25°C, unless otherwise noted. Bold values indicate specifications apply over the full operating temperature

range of –40°C to +85°C.

Symbol Parameter

Condition

Min.

10

Typ.

Max.

80

Units

V

V_CC

I_CC

Supply Voltage

5

Supply Current

2

mA

7.5

7.0

8.5

8.0

V_UVH

V_UVL

V_CCrising

V_CCfalling

8.0

7.5

Supply Voltage Undervoltage Lockout

V

V_HYSLO

V_FBH

V_FBL

V_CCUndervoltage Lockout Hysteresis

Feedback Pin Voltage High Threshold

Feedback Pin Voltage Low Threshold

Feedback Voltage Hysteresis

500

1.313

1.233

80

mV

V

1.280

1.208

1.345

1.258

FB Low-to-High transition

FB High-to-Low transition

V

V_HYSFB

∆V_FB

I_FB

mV

mV/V

µA

0.05

1

FB Pin Threshold Line Regulation

FB Pin Input Current

−0.05

−1

10V ≤ V_CC≤ 80V

0V ≤ V_FB≤ 3V

5

17

55

V_FB= 0V (see Figure 1)

12

47

Circuit Breaker Trip Voltage,

V_TRIP

mV

V_CC-V_SENSE

39

V_FB= 1V (see Figure 1)

7.5

−10

30

18

MOSFET Gate Drive, V_GATE-V_CC

GATE Pin Pull-Up Current

V

∆V_GATE

+10V ≤ V_CC≤ +80V

I_GATEON

Start cycle, V_GATE= 7V

-16

80

−22

200

µA

(V_CC- V_SENSE) = (V_TRIP+ 10mV)

V_GATE= 5V

GATE Pin Rapid Pull-Down Current (in

fault condition, until V_GATE= V_GATE[TH]

I_GATEFLT

mA

)

Normal turn-off, or from V_GATE[TH]

(MOSFET) to 0V after a fault condition

I_GATEOFFGATE Pin Turn-Off Current

1.8

Notes:

1. Exceeding the absolute maximum rating may damage the device.

2. The device is not guaranteed to function outside its operating rating.

3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.

4. Specification for packaged product only.

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MIC2586/MIC2586R

DC Electrical Characteristics⁽⁴⁾(Continued)

V_CC= +24V and +48V; T_A= 25°C, unless otherwise noted. Bold values indicate specifications apply over the full operating temperature

range of –40°C to +85°C.

Symbol Parameter

I_TIMERUPTIMER Pin Charging Current

I_TIMERDN

Condition

Min.

Typ.

Max.

Units

(V_CC– V_SENSE) > V_TRIP

−24

-65

−120

µA

V

_TIMER= 0V

(V_CC– V_SENSE) < V_TRIP

_TIMER= 0.6V

1.5

5

TIMER Pin Pull-Down Current

3.5

µA

V

1.280

0.4

1.345

0.6

V_TIMERH

V_TIMERL

V_ONH

TIMER Pin High Threshold Voltage

TIMER Pin Low Threshold Voltage

ON Pin High Threshold Voltage

ON Pin Low Threshold Voltage

ON Pin Hysteresis

1.313

0.49

1.313

1.233

80

V

1.280

1.208

1.355

1.258

ON Low-to-High transition

ON High-to-Low transition

V

V_ONL

V

V_HYSON

I_ON

mV

µA

2

ON Pin Input Current

0V ≤ V_ON≤ 80V

PWRGDx or /PWRGDx = LOW

I_OL= 1.6 mA

0.4

0.8

V_OL

Power-Good Output Voltage

Power-Good Leakage Current

V

I

_OL= 4 mA

PWRGDx or /PWRGDx = Open-Drain

_PGx= V_CC, V_ON= 1.5V

10

I_OFF

I_CPG

µA

V

Power-Good Delay Capacitor Charging V_PGTIMER= 0.6V

4

7

Current

V_CC= 10V, 24V, 48V, 80V

PGTIMER Threshold Voltage to Assert

PWRGD2 (MIC2586/86R-1) or

/PWRGD2 (MIC2586/86R-2)

0.5

0.7

V_PG2

0.625

V

PGTIMER Threshold Voltage to Assert

PWRGD3 (MIC2586/86R-1) or

/PWRGD2 (MIC2586/86R-2)

1.04

1.46

V_PG3

1.25

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MIC2586/MIC2586R

AC Electrical Characteristics⁽⁴⁾

V_CC= +24V and +48V; T_A= 25°C, unless otherwise noted. Bold values indicate specifications apply over the full operating temperature

range of –40°C to +85°C.

Symbol

t_PONLH

Parameter

Condition

Min.

Typ.

Max.

Units

ms

ON High to GATE High

ON Low to GATE Low

IRF530, C_GATE= 10nF

V_IN= 48V, IRF530, C_GATE= 10nF

3

1

t_PONHL

ms

FB Valid to PWRGDx High

(MIC2586/86R-1)

t_PFBLH

t_PFBHL

t_PFBLH

t_PG(1-2)

t_PG(1-3)

t_OCSENSE

2

4

µs

ms

µs

R_PG= 50kΩ pull-up to 48V, C_L= 100pF

C_PG= 0.1µF

FB Invalid to PWRGDx Low

(MIC2586/86R-1)

FB Valid to /PWRGDx Low

(MIC2586/86R-2)

4

FB Invalid to /PWRGDx High

(MIC2586/86R-2)

2

Delay from PWRGD1 to PWRGD2 or

Delay from /PWRGD1 to /PWRGD2

21

42

1

Delay from PWRGD1 to PWRGD3 or

Delay from /PWRGD1 to /PWRGD3

C_PG= 0.1µF

Overcurrent Sense to GATE Low

Trip Time

(V_CC- V_SENSE) = (V_TRIP+ 10mV)

(see Figure 7)

2

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MIC2586/MIC2586R

Timing Diagrams

Figure 1. Foldback Current-Limit Transfer Characteristic

Figure 2. ON-to-Gate Timing

Figure 3. MIC2586/86R-1 FB-to-PWRGD1 Timing

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MIC2586/MIC2586R

Timing Diagrams (Continued)

Figure 4. MIC2586/86R-2 FB-to-/PWRGD1 Timing

Figure 5. MIC2586/86R-1 Multiple PWRGDx Timing

Figure 6. MIC2586/86R-2 Multiple /PWRGDx Timing

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MIC2586/MIC2586R

Timing Diagrams (Continued)

Figure 7. Overcurrent Sense-to-GATE Timing

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MIC2586/MIC2586R

Functional Block Diagram

MIC2586/MIC2586R Block Diagram

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MIC2586/MIC2586R

The internal charge pump has sufficient output drive to

fully enhance commonly available power MOSFETs for

the lowest possible DC losses. The gate drive is

guaranteed to be between 7.5V and 18V over the entire

supply voltage operating range (10V to 80V), so 60V

BVDSS and 30V BVDSS N-channel power MOSFETs

can be used for +48V and +24V applications,

respectively. However, an external Zener diode (18-V)

connected from the source to the gate as shown in the

typical applications circuit is highly recommended. A

good choice for an 18-V Zener diode in this application is

the MMSZ5248B, available in a small SOD123 package.

Functional Description

Hot Swap Insertion

When circuit boards are inserted into systems carrying

live supply voltages ("hot swapped"), high inrush

currents often result due to the charging of bulk

capacitance that resides across the circuit board's

supply pins. These current spikes can cause the

system's supply voltages to temporarily go out of

regulation causing data loss or system lock-up. In more

extreme cases, the transients occurring during a hot

swap event may cause permanent damage to

connectors or on-board components.

C_GATEis used to adjust the GATE voltage slew rate while

R3 minimizes the potential for high-frequency parasitic

oscillations from occurring in M1. However, note that

resistance in this part of the circuit has a slight

destabilizing effect upon the MIC2586/MIC2586R's

current regulation loop. Compensation resistor R4 is

necessary for stabilization of the current regulation loop.

The current through the power transistor during initial

inrush is given by Equation 2:

The MIC2586/MIC2586R is designed to address these

issues by limiting the maximum current that is allowed to

flow during hot swap events. This is achieved by

implementing a constant-current control loop at turn-on.

In addition to inrush current control, the MIC2586 and

MIC2586R incorporate input voltage supervisory

functions

and

user-programmable

overcurrent

protection, thereby providing robust protection for both

the system and the circuit board.

Input Supply Transient Suppression and Filtering

I_GATEON

I

= C_LOAD

×

Eq. 2

The MIC2586/MIC2586R is guaranteed to withstand

transient voltage spikes up to 100V. However, voltage

spikes in excess of 100V may cause damage to the

controller. In order to suppress transients caused by

parasitic inductances, wide (and short) power traces

should be utilized. Alternatively, a heavier trace plating

will help minimize inductive spikes that may arise during

events (e.g., short-circuit loads) that can cause a large

di/dt to occur. External surge protection, such as a

clamping diode, is also recommended as an added

safeguard for device (and system) protection. Lastly, a

0.1µF filter capacitor is recommended to help reject

additional noise.

INRUSH

C_GATE

The drain current of the MOSFET is monitored via an

external current sense resistor to ensure that it never

exceeds the programmed threshold, as described in the

"Circuit Breaker Operation" subsection.

A capacitor connected to the controller’s TIMER pin sets

the value of overcurrent detector delay, t_FLT, which is the

time for which an overcurrent event must last to signal a

fault condition and to cause an output latch-off. These

devices will be driving a capacitive load in most

applications, so a properly chosen value of C_TIMER

prevents false-, or nuisance-, tripping at turn-on as well

as providing immunity to noise spikes after the start-up

cycle is complete. The procedure for selecting a value

for C_TIMERis given in the "Circuit Breaker Operation"

subsection.

Start-Up Cycle

When

the

power

supply

voltage

to

the

MIC2586/MIC2586R is higher than the V_UVHand the

V_ONHthreshold voltages, a start cycle is initiated. When

the controller is enabled, an internal 16µA current source

(I_GATEON) is enabled and the GATE pin voltage rises from

0V with respect to ground at a rate equal to Equation 1:

Overcurrent Protection

The MIC2586 and the MIC2586R use an external, low-

value resistor in series with the drain of the external

MOSFET to measure the current flowing into the load.

The VCC connection (Pin 14) and the SENSE

connection (Pin 13) are the (+) and (-) inputs,

respectively, of the device's internal current sensing

circuits Kelvin sense connections are strongly

recommended for sensing the voltage across these pins.

See the Applications Information section for further

details.

dV_GATEI_GATEON

Eq. 1

=

dt

C_GATE

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MIC2586/MIC2586R

The nominal current limit is determined by Equation 3:

The nominal overcurrent response time is calculated

using Equation 4:

V

TRIP(TYP)

I

=

Eq. 3

C

× V

TIMERH

LIMIT

FILTER

R

t

(ms) =

SENSE

FLT

I

Eq. 4

TIMERUP

(ms) = 20 × C

(μμF

where V_TRIP(TYP)is the typical current limit threshold

specified in the datasheet and R_SENSEis the value of the

selected sense resistor. As the MIC2586 and the

MIC2586R employ a constant-current regulation scheme

in current limit, the charge pump’s output voltage at the

GATE pin is adjusted so that the voltage across the

external sense resistor is held equal to V_TRIPwhile the

capacitor connected to the TIMER pin is being charged.

If the current-limit condition goes away before the

TIMER pin voltage rises above the V_TIMERHthreshold,

then steady-state operation resumes. To prevent

excessive power dissipation in the external MOSFET

under load current fault conditions, the FB pin voltage is

used as the control element in a circuit that lowers the

current limit as a function of the output voltage. When

the load current increases to the point where the output

voltage at the load approaches 0V (likewise, the

MIC2586/MIC2586R’s FB pin voltage also approaches

0V), the result is a proportionate decrease in the

maximum current allowed into the load. This foldback

current limit subcircuit’s transfer characteristic is shown

in Figure 1. Under excessive load conditions (output and

FB voltage equals 0V), the foldback current limiting

circuit controls the MIC2586/MIC2586R’s GATE drive to

force a constant 12mV (typical) voltage drop across the

external sense resistor.

FILTER

Whenever the voltage across R_SENSEexceeds the

MIC2586/MIC2586R’s nominal circuit breaker threshold

voltage of 47mV during steady-state operation, two

things occur:

1. A constant-current regulation loop will engage within

1µs after an overcurrent condition is detected by

R_SENSE, and the control loop is designed to hold the

voltage across R_SENSEequal to 47mV. This feature

protects both the load and the MIC2586/MIC2586R

circuits from excessively high currents.

2. Capacitor C_TIMERis then charged up to the V_TIMERH

threshold (1.313V) by an internal 65µA current

source (I_TIMERUP). If the excessive current persists

such that the voltage across C_TIMERcrosses the

V_TIMERHthreshold, the circuit breaker trips and the

GATE pin is immediately pulled low by a 30mA

(minimum) internal current sink. This operation turns

off the MOSFET quickly and disconnects the input

from the load. The value of C_TIMERshould be

selected to allow the circuit's minimum regulated

output current (I_OUT) to equal I_LIMITfor somewhat

longer than the time it takes to charge the total load

capacitance.

Circuit Breaker Operation

The MIC2586/MIC2586R employ an electronic circuit

breaker that protects the external N-channel power

MOSFET and other system components against large-

scale output current faults, both during initial card

insertion or during steady-state operation. The current-

An initial value for C_TIMERis found by calculating the time

it will take for the MIC2586/MIC2586R to completely

charge up the output capacitive load. Assuming the load

is enabled by the PWRGDx (or /PWRGDx) signal(s) of

the controller, the turn-on delay time is derived from the

following expression, I = C × (dV/dt):

limit threshold is set via an external resistor, R_SENSE

,

connected between the circuit’s VCC pin and SENSE

pin. For the MIC2586/MIC2586R, a fault current timing

circuit is set via an external capacitor (C_TIMER) that

determines the length of the time delay (t_FLT) for which

the controller remains in current limit before the circuit

breaker is tripped. Programming the response time of

the overcurrent detector helps to prevent nuisance

tripping of the circuit breaker because of high inrush

currents charging bulk and distributed capacitive loads.

C

× V

LOAD

CC(MAX)

t

=

Eq. 5

TURN-ON

I

LIMIT

M9999-122012

December 2012

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Micrel, Inc.

MIC2586/MIC2586R

Using parametric values for the MIC2586/MIC2586R, an

expression relating a worse-case design value for

C_TIMER, using the MIC2586/MIC2586R specification

limits, to the circuit's turn-on delay time is:

Capacitor C_TIMERwill then be discharged by I_TIMERDNuntil

the voltage across C_TIMERdrops below the V_TIMERL

threshold, at which time another start cycle is initiated.

This will continue until any of the following occurs:

a) The fault condition is removed.

b) The input supply voltage power is removed/cycled

c) The ON pin is toggled LOW then HIGH.

t_TURN-ON× I_TIMERUP(MAX)

C_TIMER(MAX)

=

V_TIMERH(MIN)

120µA













The duty cycle of the auto-restart function is therefore

fixed at 5% and the period of the auto-restart cycle is

given by:

C

= t

×

TIMER(MAX)

TURN − ON

1.280V

µF









C

× 94 × 10^{− 6}



TIMER(MAX)

sec



t

= 20 × t

= 20 ×

AUTO_RESTART

FLT_AUTO

Eq. 6

(

C

)

×

(

V

− V

)

TIMER

TIMERH

TIMERL

AUTO − RESTART

For example, in a system with a C_LOAD= 1000µF, a

maximum V_CC= +72V, and a maximum load current on a

nominal +48V buss of 1.65A, the nominal circuit design

equations steps are:

I

TIMERUP

ms

µF







t

= C

× 250



AUTO − RESTART

TIMER





1. Choose I_LIMIT= I_{HOT_SWAP(NOM)}= 2A (1.65A + 20%)

2. Select an R_SENSE(Closest 1% standard value is

Eq. 8

19.6mΩ)

3. Using I_CHARGE= I_LIMIT= 2A, the application circuit

turn-on time is calculated using Equation 5:

The auto-restart period for the example above where the

worse-case C_TIMERwas calculated to be 3.3µF is:

(

1000μ0 × 72V

)

= 36ms

t_TURN-ON

=

t

= 825ms

2A

AUTO - RESTART

Allowing for capacitor tolerances and a nominal 36ms

turn-on time, an initial worse-case value for C_TIMERis:

Input Undervoltage Lockout

The MIC2586/MIC2586R have an internal undervoltage

lockout circuit that inhibits operation of the controller’s

internal circuitry unless the power supply voltage is

stable and within an acceptable tolerance. If the supply

voltage to the controller with respect to ground is greater

than the V_UVHthreshold voltage (8V typical), the

controller’s internal circuits are enabled and the

controller is then ready for normal operation pending the

state of the ON pin voltage. Once in steady-state

operation, the controller’s internal circuits remain active

so long as the supply voltage with respect to ground is

higher than the controller’s internal V_UVLthreshold

voltage (7.5V typical).

μF











-6

C

= 0.036s × 94 ×10

= 3.38µF



TIMER(MAX)

sec

Eq. 7

The closest standard ±5% tolerance capacitor value is

3.3µF and would be a good initial starting value for

prototyping.

Whenever the MIC2586 is not in current limit, C_TIMERis

discharged to GND by an internal 3.5µA current sink

(I_TIMERDN).

For the MIC2586R, the circuit breaker automatically

resets after (20) t_{FLT_AUTO}time constants. If the fault

condition still exists, capacitor C_TIMERwill begin to charge

up to the V_TIMERHthreshold, and if exceeded, trip the

circuit breaker.

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Micrel, Inc.

MIC2586/MIC2586R

Power Good (PWRGD) Output Signals

For the MIC2586-1/MIC2586R-1, the power good output

signal PWRGD1 will be high impedance when the FB pin

voltage is higher than the V_FBHthreshold and will pull

down to GND when the FB pin voltage is lower than the

V_FBLthreshold. For the MIC2586-2/MIC2586R-2, power-

good output signal /PWRGD1 will pull down to GND

when the FB pin voltage is higher than the V_FBH

threshold and will be high impedance when the FB pin

voltage is lower than the V_FBLthreshold. Hence, the (−1)

parts have an active-HIGH PWRGDx signal and the (−2)

parts have an active-LOW /PWRGDx output. PWRGDx

(or /PWRGDx) may be used as an enable signal for one

or more DC/DC converter modules or for other system

functions. When used as an enable signal, the time

necessary for the PWRGDx (or /PWRGDx) signal to pull-

up (when in high impedance state) will depend upon the

(RC) load at the respective PWRGD pin.

PWRGD3 (/PWRGD3) follows the assertion of PWRGD1

(/PWRGD1) by a delay:

Eq. 12

t

(ms) ≅ 180 × C (µF)

PG

PG(1−3)

For example, for a C_PGof 0.1µF, PWRGD2 (or

/PWRGD2) will be asserted 9ms after PWRGD1 (or

/PWRGD1). PWRGD3 (or /PWRGD3) will then be

asserted 9ms after PWRGD2 (or /PWRGD2) and 18ms

after the assertion of PWRGD1 (or /PWRGD1). The

relationships between V_OUT, V_FBH, PWRGD1, PWRGD2,

and PWRGD3 are shown in Figures 5 and 6.

Each PWRGD output pin is connected to an open-drain,

N-channel transistor implemented with high-voltage

structures. These transistors are capable of operating

with pull-up resistors to supply voltages as high as 100V.

PWRGD output signals PWRGD2 (/PWRGD2) and

PWRGD3 (/PWRGD3) are asserted after the assertion

of PWRGD1 (/PWRGD1) by a user-programmable time

delay set by an external capacitor (CPG) from the

controller's PGTIMER pin (Pin 7) to GND. An expression

for the time delay to assert PWRGD2 (or /PWRGD2)

after PWRGD1 (or /PWRGD1) asserts is given by:

C_PG

Eq. 9

t_PG(1−2)

=

× V_PG2

I_CPG

where V_PG2(0.625V, typically) is the PWRGD2 (or

/PWRGD2) threshold voltage for PGTIMER and I_CPG

(7µA, typically) is the internal PGTIMER pin charging

current. Similarly, an expression for the time delay to

assert PWRGD3 (or /PWRGD3) after PWRGD1 (or

/PWRGD1) asserts is given by:

C_PG

t_PG(1−3)

=

× V_PG3

Eq. 10

I_CPG

where V_PG3(1.25V, typically) is the PWRGD3 (or

/PWRGD3) threshold voltage for PGTIMER. Therefore,

PWRGD2 (or /PWRGD2) will be delayed after the

assertion of PWRGD1 (or /PWRGD1) by:

Eq. 11

t_PG(1−2)(ms) ≅ 90 × C_PG(µF)

M9999-122012

December 2012

16

Micrel, Inc.

MIC2586/MIC2586R

Using standard 1% resistor values, the external circuit's

nominal ON and OFF thresholds are V_ON(EX)= +36V and

V_OFF(EX)= +34V. In solving for V_OFF(EX), replace V_ONHwith

V_ONLin Equation 13.

Application Information

External ON/OFF Control

The MIC2586/MIC2586R has an ON pin input that is

used to enable the controller to commence a start-up

sequence upon card insertion or to disable controller

operation upon card removal. In addition, the ON pin

can be used to reset the MIC2586/MIC2586R’s internal

electronic circuit breaker in the event of a load current

fault. To reset the electronic circuit breaker, the ON pin

is toggled LOW then HIGH. The ON pin is internally

connected to an analog comparator with 80mV of

hysteresis. When the ON pin voltage falls below its

internal V_ONLthreshold, the GATE pin is immediately

pulled low. The GATE pin will be held low until the ON

pin voltage is above its internal V_ONHthreshold. The

external circuit's ON threshold voltage level is

programmed using a resistor divider (R1 and R2) as

shown in the typical application circuit. The equations to

set the trip points are shown below. For the following

example, the external circuit's ON threshold is set to

V_ONH(EX)= +37V, a value commonly used in +48V Central

Office power distribution applications.

Output Voltage PWRGD Detection

The MIC2586/86R includes an analog comparator used

to monitor the output voltage of the controller through an

external resistor divider as shown in the typical

application circuit. The FB input pin is connected to the

non-inverting input and is compared against an internal

reference voltage. The analog comparator exhibits a

hysteresis of 80mV.

Setting the PWRGD threshold for the circuit follows a

similar approach as setting the circuit's ON/OFF input

voltage. The equations to set the trip points are shown

below. For the following +48V telecom application,

power-is-good output signal PWRGD1 (or /PWRGD1) is

to be de-asserted when the output supply voltage is

lower than +48V-10% (+43.2V):

R5 + R6













V_{OUT(NOT GOOD)}= V_FBL

×

Eq.16

R6

R1+ R2













V

= V

×

Eq. 13

ONH(EX)

ONH

Given V_FBLand R6, a value for R5 can be determined. A

suggested value for R6 is that which will provide

approximately 100µA of current through the voltage

R2

divider chain at V_OUT(NOT

following equation as a starting point:

= V_FBL. This yields the

Given V_ONHand R2, a value for R1 can be determined.

A suggested value for R2 is that which will provide

approximately 100µA of current through the voltage

divider chain at V_CC= V_ONH. This yields the following as

a starting point:

GOOD)

V_FBL(TYP)

100µA

1.233V

100µA

Eq. 17

R6 =

=

= 12.33kΩ

V

1.313V

100µA

ONH(TYP)

Eq. 14

R2 =

=

= 13.13kΩ

The closest standard 1% value for R6 is 12.4kΩ. Now,

solving for R5 yields:

100µA

The closest standard 1% value for R2 is 13kΩ. Now,

solving for R1 yields:















V

43.2V

















^{OUT(NOT GOOD)}

R5 = R6×

= 422kΩ

−1 = 12.4kΩ×

−1









V_FBL(TYP)

1.233V

































V

37V





ONH(EX)













R1 = R2 ×

− 1 = 13kΩ ×

− 1







V

1.313V













ONH(TYP)

Eq. 18

= 353.3kΩ

The closest standard 1% value for R5 is 422kΩ.

Eq.15

Using standard 1% resistor values, the external circuit's

nominal "power-is-good" and "power-is-not-good" output

voltages are V_OUT(GOOD)= +46V and V_OUT(NOT

+43.2V

=

GOOD)

The closest standard 1% value for R1 is 357kΩ.

M9999-122012

December 2012

17

Micrel, Inc.

MIC2586/MIC2586R

In solving for V_OUT(GOOD), substitute V_FBHfor V_FBLin

Equation 16.

In this case, the application circuit must be sturdy

enough to operate over a ~1.5-to-1 range in hot swap

load currents. For example, if an MIC2586 circuit must

pass a minimum hot swap load current of 4A without

nuisance trips, R_SENSEshould be set to:

Sense Resistor Selection

The sense resistor is nominally valued at:

V_TRIP(TYP)

39mV

Eq. 19

R_SENSE

=

R

=

= 9.75mΩ

Eq. 22

SENSE(NOM)

I_{HOT_SWAP(NOM)}

4A

where V_TRIP(TYP)is the nominal circuit breaker threshold

voltage (47mV) and I_{HOT_SWAP(NOM)}is the nominal inrush

load current level to trip the internal circuit breaker.

where the nearest 1% standard value is 9.76mΩ. At the

other tolerance extremes, I_{HOT_SWAP(MAX)}for the circuit in

question is then simply:

To accommodate worse-case tolerances in the sense

resistor (for a ±1% initial tolerance, allow ±3% tolerance

for variations over time and temperature) and circuit

breaker threshold voltages, a slightly more detailed

calculation must be used to determine the minimum and

maximum hot swap load currents.

56.7mV

I

=

= 5.8A

Eq. 23

HOT_SWAP(MAX)

9.76mΩ

With a knowledge of the application circuit's maximum

hot swap load current, the power dissipation rating of the

sense resistor can be determined using P = I²R. Here,

The current is I_{HOT_SWAP(MAX)}= 5.8A and the resistance

R_SENSE(MIN)= (0.97)(R_SENSE(NOM)) = 9.47mΩ. Thus, the

sense resistor's maximum power dissipation is:

The MIC2586/MIC2586R has a minimum current limit

threshold voltage of 39mV, thus the minimum hot swap

load current is determined where the sense resistor is

3% high:

39mV

37.9mV

I_{HOT_SWAP(MIN)}

=

2

(

1.03 × R_SENSE(NOM)

)

R_SENSE(NOM)

P

=

(

5.8A

)

×

(

9.47mΩ

)

= 0.319W

Eq. 24

MAX

Eq. 20

A 0.5W sense resistor is a good choice in this

application.

Keep in mind that the minimum hot swap load current

should be greater than the application circuit's upper

steady-state load current boundary. Once the lower

value of R_SENSEhas been calculated, it is good practice

to check the maximum hot swap load current

(I_{HOT_SWAP(MAX)}), which the circuit may let pass in the case

of tolerance build-up in the opposite direction. Here, the

worse-case maximum is found using a V_TRIP(MAX)

threshold of 55mV and a sense resistor 3% low in value:

When the MIC2586/MIC2586R's foldback current limiting

circuit is engaged in the above example, the current limit

would nominally fold back to 1.23A when the output is

shorted to ground.

PCB Layout Considerations

4-Wire Kelvin Sensing

Because of the low value typically required for the sense

resistor, special care must be used to accurately

measure the voltage drop across it. Specifically, the

measurement technique across R_SENSEmust employ 4-

wire Kelvin sensing. This is simply a means of ensuring

that any voltage drops in the power traces connected to

the resistors are not picked up by the signal conductors

measuring the voltages across the sense resistors.

55mV

56.7mV

I

=

HOT_SWAP(MAX)

(

0.97 × R

)

R

SENSE(NOM)

Eq. 21

Figure 8 illustrates how to implement 4-wire Kelvin

sensing. As the figure shows, all the high current in the

circuit (from V_CCthrough R_SENSEand then to the drain of

the N-channel power MOSFET) flows directly through

the power PCB traces and through R_SENSE

.

M9999-122012

December 2012

18

Micrel, Inc.

MIC2586/MIC2586R

The voltage drop across R_SENSEis sampled in such a

way that the high currents through the power traces will

not introduce significant parasitic voltage drops in the

sense leads. It is recommended to connect the hot swap

controller's sense leads directly to the sense resistor's

metalized contact pads. The Kelvin sense signal traces

should be symmetrical with equal length and width, kept

as short as possible and isolated from any noisy signals

and planes.

Other Layout Considerations

Figure 10 is a recommended PCB layout diagram for the

MIC2586-2BM. Many hot swap applications will require

load currents of several amperes. Therefore, the power

(V

and Return) trace widths (W) need to be wide

CC

enough to allow the current to flow while the rise in

temperature for a given copper plate (e.g., 1oz. or 2oz.)

is kept to a maximum of 10°C to 25°C. Also, these traces

should be as short as possible in order to minimize the

IR drops between the input and the load. The feedback

network resistor values in Figure 10 are selected for a

+24V application. The resistors for the feedback (FB)

and ON pin networks should be placed close to the

controller and the associated traces should be as short

as possible to improve the circuit’s noise immunity. The

input “clamping diode” (D1) is referenced in the typical

application circuit. If possible, use high-frequency PCB

layout techniques around the GATE circuitry (shown in

the typical application circuit) and use a dummy resistor

(e.g., R3 = 0Ω) during the prototype phase. If R3 is

needed to eliminate high-frequency oscillations, common

values for R3 range between 4.7Ω to 20Ω for various

power MOSFETs. Finally, the use of plated-through vias

will be needed to make circuit connection to the power

and ground planes when utilizing multi-layer PCBs.

Figure 8. 4-Wire Kelvin Sense Connections for R_SENSE

Additionally, for designs that implement Kelvin sense

connections that exceed 1” in length and/or if the Kelvin

(signal) traces are vulnerable to noise possibly being

injected onto these signals, the example circuit shown in

Figure

9 can be implemented to combat noisy

environments. This circuit implements a 1.6 MHz low-

pass filter to attenuate higher frequency disturbances on

the current sensing circuitry. However, individual system

analysis should be used to determine if filtering is

necessary and to select the appropriate cutoff frequency

for each specific application.

Figure 9. Current-Limit Sense Filter for Noisy Systems

M9999-122012

December 2012

19

Micrel, Inc.

MIC2586/MIC2586R

Figure 10. Recommended PCB Layout for Sense Resistor, Power MOSFET, Timer, and Feedback Network

M9999-122012

December 2012

20

Micrel, Inc.

MIC2586/MIC2586R

MOSFET and Sense Resistor Vendors

Device types, part numbers, and manufacturer contacts

for power MOSFETs and sense resistors are provided in

Table 1 and Table 2.

Breakdown

Voltage (V_DSS

MOSFET Vendor

Key MOSFET Type(s)

Contact Information

)

SUM75N06-09L (TO-263)

SUM70N06-11 (TO-263)

SUM50N06-16L (TO-263)

60V

www.siliconix.com

(203) 452-5664

Vishay − Siliconix

SUP85N10-10 (TO-220AB)

SUB85N10-10 (TO-263)

SUM110N10-09 (TO-263)

SUM60N10-17 (TO-263)

100V

www.siliconix.com

(203) 452-5664

International Rectifier

Renesas

IRF530 (TO-220AB)

IRF540N (TO-220AB)

100V

www.irf.com

(310) 322-3331

Table 1. MOSFET Vendors

Resistor Vendors

Sense Resistors

Contact Information

www.vishay.com/docswsl_30100.pdf

(203) 452-5664

Vishay - Dale

“WSL” and “WSR” Series

“OARS” Series

“LR” Series

Second source to “WSL”

www.irctt.com/pdf_files/OARS.pdf

www.irctt.com/pdf_files/LRC.pdf

(828) 264-8861

IRC

Table 2. Sense Resistor Vendors

M9999-122012

December 2012

21

Micrel, Inc.

MIC2586/MIC2586R

Package Information⁽¹⁾

14-Pin SOIC (M)

Note:

1. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com

Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This

information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,

specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual

property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability

whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties

relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product

can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical

implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user.

A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to

fully indemnify Micrel for any damages resulting from such use or sale.

M9999-122012

December 2012

22


型号：	MIC2586-2YMTR
厂家：	MICROCHIP
描述：	Power Supply Support Circuit, Adjustable, 1 Channel, PDSO14, LEAD FREE, SOIC-14 光电二极管
文件：	总22页 (文件大小：492K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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