MIC44F20YMM [MICROCHIP]
6A BUF OR INV BASED MOSFET DRIVER, PDSO8;
| 型号： | MIC44F20YMM |
| 厂家： | 
MICROCHIP |
| 描述： | 6A BUF OR INV BASED MOSFET DRIVER, PDSO8 驱动 信息通信管理 光电二极管 接口集成电路 驱动器 |
| 文件： | 总13页 (文件大小：840K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC44F18/19/20
6A High Speed MOSFET Drivers
in 2mm
× 2mm Package
General Description
Features
The MIC44F18, MIC44F19 and MIC44F20 are high-
speed single MOSFET drivers capable of sinking and
sourcing 6A for driving capacitive loads. With delay
times of less than 15ns and rise times into a 1000pF
load of 10ns, these MOSFET drivers are ideal for driving
large gate charge MOSFETs in power supply
applications. The MIC44F18 is a non-inverting driver,
the MIC44F19 is an inverting driver suited for driving P-
Channel MOSFETs and the MIC44F20 is an inverting
driver for N-Channel MOSFETs.
• 4.5V to 13.2V input operating range
• 6A peak output current
• High accuracy ±5% enable input threshold
• High speed switching capability
-
-
10ns rise time in 1000pF load
<15ns propagation delay time
• Flexible UVLO function
-
-
4.2V internally set UVLO
Programmable with external resistors
Fabricated using Micrel’s proprietary BiCMOS/DMOS
process for low power consumption and high efficiency,
the MIC44F18/19/20 translates TTL or CMOS input logic
levels to output voltage levels that swing within 25mV of
the positive supply or ground. Comparable bipolar
devices are capable of swinging only to within 1V of the
supply.
• Latch-up protection to >500mA reverse current on the
output pin
• Enable function
• Thermally enhanced ePAD MSOP-8 package option
• Miniature 2mm x2mm MLF™-8 package option
• Pb-free packaging
The input supply voltage range of the MIC44F18/19/20
is 4.5V to 13.2V, making the devices suitable for driving
MOSFETs in a wide range of power applications. Other
features include an enable function, latch-up protection,
and a programmable UVLO function.
Applications
• Synchronous switch-mode power supplies
• Secondary side synchronous rectification
The MIC44F18/19/20 has a junction temperature range
of –40°C to +125°C with exposed pad ePAD MSOP-8
and 2X2 MLF™-8 package options.
Data sheets and support documentation can be found
on Micrel’s web site at www.micrel.com.
_________________________________________________________________________________________________________
Typical Applications
MOSFET Driver with 4V
MOSFET Driver with 6.2V Programmed UVLO Internally
Set
MLF and MicroLead Frame are trademarks of Amkor Technologies
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
M9999-032906
(408) 955-1690
March 2006
Micrel, Inc.
MIC44F18/19/20
Ordering Information
Part Number
Configuration
Junction Temp.
Range(1)
Package
Lead
Finish
MIC44F18YML
Non-Inverting
2x2 MLF-8
Pb-Free
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
-40°C to 125°C
MIC44F18YMM Non-Inverting
ePAD MSOP-8 Pb-Free
2x2 MLF-8 Pb-Free
ePAD MSOP-8 Pb-Free
2x2 MLF-8 Pb-Free
ePAD MSOP-8 Pb-Free
MIC44F19YML
Inverting Output high when disabled
MIC44F19YMM Inverting Output high when disabled
MIC44F20YML
Inverting Output low when disabled
MIC44F20YMM Inverting Output low when disabled
Pin Configuration
OUT
VDD
NC
1
2
3
4
8
7
6
5
OUT
OUT
VDD
1
8
7
6
5
OUT
GND
2
GND
GND
NC
IN
3
4
GND
EP
EP
IN
EN/UVLO
EN/UVLO
8-pin MLF(ML)
8-pin ePAD MSOP (MM)
Pin Description
Pin Number
Pin Name
OUT
Pin Function
Driver Output
Supply Input
No Connect
1,8
2
VDD
3
NC
Input (Input): Logic high produces a high output voltage for the MIC44F18
and a low output voltage for the MIC44F19/20. Logic low produces a low
output voltage for the MIC44F18 and a high output voltage for the
MIC44F19/20.
4
5
IN
EN / Under-Voltage Lockout (Input): Pulling this pin below low disables the
driver. When disabled, the output is in the off state (low for the MIC44F18
and high for the MIC44F19). Floating this pin enables the driver and the
UVLO circuitry when VDD reaches the UVLO threshold. A resistor divider
can set a different UVLO threshold voltage as shown on page 1 (See
“Application Information” section for more details).
EN/UVLO
6,7
EP
GND
GND
Ground
Ground. Exposed Backside Pad.
Logic Table
EN/UVLO
IN
MIC44F18
OUTPUT
LOW
MIC44F19
MIC44F20
OUTPUT
LOW
OUTPUT
HI
0
0
1
1
0
1
0
1
LOW
HI
LOW
LOW
HI
HI
HI
LOW
LOW
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March 2006
Micrel, Inc.
MIC44F18/19/20
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (Vdd). ………………………………….. 14V
UVLO/Enable Voltage (VUVLO/EN)…………………....... 14V
Input Voltage (VIN) …………….. (VS + 0.1V) to (GND-5V)
Output Voltage (VOUT) ……………………………........ 14V
Junction Temperature (TJ)…………………... ..........150°C
Ambient Storage Temperature (Tdd) ….. -65°C to +150°C
Lead Temperature (10 sec).....................................300°C
ESD Rating, Note 3
Supply Voltage (Vdd) ............................... 4.5V to 13.2V
Package Thermal Impedance
θ
θ
JA ePAD MSOP-8 ……………………….110°C/W
JA 2x2 MLF-8L…………………… ..............93°C/W
Operating Junction Temperature (TJ).................. 125°C
Pins 1,2,3,5,6,7,8.................................................2KV
Pin 4................................................................... 500V
Electrical Characteristics(4)
4.5V< Vdd< 13.2V; CL =1000pf; TA = 25°C, bold values indicate –40°C< Tj < +125°C, unless noted.
Symbol
Parameter
Condition
Min
Typ
Max
Units
Power Supply
Vdd
Supply Voltage Range
4.5
13.2
2.5
V
High Output Quiescent
Current
VIN = 5V (MIC44F18), VIN = 0V
(MIC44F19/20)
mA
IS
Low Output Quiescent
Current
VIN = 0V (MIC44F18), VIN = 5V
(MIC44F19/20)
2.5
mA
Shutdown Current
VEN = 0V
200
µA
ISD
EN/UVLO
VEN
Enable Threshold
Enable Hysteresis
1.3
1.4
1.5
V
120
mV
VEN = open
Under-Voltage Lockout
Threshold (Internally Set)
VUVLO
3.6
4.2
4.4
V
VDD rising
UVLO Hysteresis
370
mV
V
Under-Voltage Lockout
Threshold (Externally Set)
VEN
(MAX)
VUVLO
VDD rising
Vdd
Input
VIN
Input Voltage Range
Logic 1 Input Voltage
Steady State Voltage (note 5)
Ta=25C (+/-5%)
0
Vdd
1.785
1.87
1.607
1.683
5
VIH
1.615
1.53
1.45
1.377
1.7
1.7
V
Over temperature range (+/-10%)
Ta=25C (+/-5%)
VIL
IIN
Logic 0 Input Voltage
Input Current
1.53
1.53
V
Over temperature range (+/-10%)
4.5V< VIN< 10V
uA
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MIC44F18/19/20
Electrical Characteristics (cont.)
Symbol
Parameter
Condition
Min
Typ
Max
Units
Output
VOH
High Output Voltage
Low Output Voltage
See Figure 1
VS-
0.025
V
V
VOL
See Figure 1
0.025
Output Resistance, Output
High
IOUT = 100mA, Vdd = 12V
IOUT = 100mA, Vdd = 5V
IOUT = 100mA, Vdd = 12V
2
3
2
3
Ω
Ω
RO
Output Resistance, Output
Low
IOUT = 100mA, Vdd = 5V
Peak Output Sink Current
Vdd=12V
6
6
A
A
IPEAK
Peak Output Source Current VS=12V
IR
Latch-Up Protection
Withstand Reverse Current
>500
mA
Switching Time
VS=12V, CL=1000pF
See Figure 1 and 2
VS=12V, CL=1000pF
See Figure 1 and 2
VS=12V, CL=1000pF
See Figure 1 and 2
VS=12V, CL=1000pF
See Figure 1 and 2
VS=12V
tR
Rise Time
10
10
15
13
20
20
35
35
50
nS
nS
tF
Fall Time
tD1
tD2
tPW
Delay Time
nS
Delay Time
nS
Minimum Input Pulse Width
Maximum Input Frequency
nS
See Figure 1 and 2
VS=12V
fMAX
Note 6
MHz
See Figure 1 and 2
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
4. Specification for packaged product only.
5. The device is protected from damage when -5V< Vin< 0V. However, 0V is the recommended minimum continuous VIL voltage. See the applications
section for additional information.
6. See applications section for information on the maximum operating frequency.
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Micrel, Inc.
MIC44F18/19/20
Typical Characteristics
5
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Micrel, Inc.
MIC44F18/19/20
Typical Characteristics cont.
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MIC44F18/19/20
Timing Diagram
Functional Diagram
Figure 1. MIC44F18/19/20 Functional Block Diagram
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MIC44F18/19/20
tolerance of the internal resistors from affecting the
tolerance of the enable voltage setting.
Functional Description
The MIC44F18/19/20 family of drivers are high speed,
high current drivers that are designed to drive P-channel
and N-channel MOSFETs. The drivers come in both
inverting and non-inverting versions. The block diagram
of the MIC44Fxx driver is shown in Figure 1.
The MIC44F18 is a non-inverting driver.
When
disabled, the VOUT pin is pulled low. The MIC44F19 is
an inverting driver that is optimized to drive P-channel
MOSFETs. When disabled, the VOUT pin is pulled
high, which turns off the P-channel MOSFET. The
MIC44F20 is an inverting driver, whose VOUT pin is
pulled low when disabled. This allows it to drive an
N-channel MOSFETs and turn it off when the driver is
disabled. The logic table below summarizes the driver
operation.
EN/UVLO
IN
MIC44F18
OUTPUT
MIC44F19
OUTPUT
MIC44F20
OUTPUT
Figure 2. UVLO Circuit
Input Stage
0
0
1
1
0
1
0
1
LOW
LOW
LOW
HI
HI
HI
HI
LOW
LOW
HI
The MIC44Fxx family of drivers have a high impedance,
TTL compatible input stage. The tight tolerance of the
input threshold makes it compatible with CMOS devices
powered from any supply voltage between 3V and VDD.
Hysteresis on the input pin improves noise immunity and
prevents input signals with slow rise times from falsely
triggering the output. The amplitude of the input voltage
has no effect on the supply current draw of the driver.
LOW
LOW
Startup and UVLO
The UVLO circuit disables the output until the VDD
supply voltage exceeds the UVLO threshold. Hysteresis
in the UVLO circuit prevents noise and finite circuit
impedance from causing chatter during turn-on and turn-
off.
The input voltage signal may go up to -5V below ground
without damaging the driver or causing a latch up
condition. Negative input voltages 0.7V below ground or
greater will cause an increase in propagation delay.
As shown in figure 2, with the EN/UVLO pin open, an
internal resistor divider senses the VDD voltage and the
UVLO threshold is set at the minimum operating voltage
of the driver. The driver can be set to turn on at a higher
voltage by adding an external resistor to the UVLO pin.
With an external divider, the VDD turn on (rising VDD)
threshold is calculated as:
R1
R2
⎡
⎤
VDD
VDD
= VTH × 1+
enable
⎢
⎥
⎣
⎦
R1
R2
⎡
⎤
= VHyst × 1+
hysteresis
⎢
⎥
⎣
⎦
where : VTH = Enable Threshold Voltage
VDDHysteresis = Hysteresis Voltage at the VDDpin
VHyst = Enable Hysteresis Voltage
Because the external resistors are parallel with the
internal resistors, it is important to keep the value of the
external resistors at least 10 times lower than the typical
values of the internal resistors. This prevents the
internal resistors from affecting the accuracy of the
enable calculation as well as preventing the large
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Micrel, Inc.
MIC44F18/19/20
Output Driver Section
A block diagram of the low-side driver is shown in Figure
3. Low driver impedances allow the external MOSFET to
be turned on and off quickly. The rail-to-rail drive
capability of the output ensures a low RDSON from the
external MOSFET.
Redundant Vout pins lower the driver circuit impedance,
which helps increase the drive current and minimize LC
circuit ringing between the MOSFET gate and driver
output.
The slew rate of the output is non-adjustable and
depends only on the VDD voltage and how much
capacitance is present at the VOUT pin. The slew rate
at the MOSFET gate can be adjusted by adding a
resistor between the MOSFET gate and the driver
output.
Figure 3. Output Driver Section
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Micrel, Inc.
MIC44F18/19/20
2
E = 1 ×Ciss ×VGS
Application Information
2
but
Power Dissipation Considerations
Q = C × V
so
Power dissipation in the driver can be separated into two
areas:
E = 1/2 × Qg×VGS
where
•
•
Output driver stage dissipation
Quiescent current dissipation used to supply the
internal logic and control functions.
Cissis the total gate capacitance of the MOSFET
Output Driver Stage Power Dissipation
Power dissipation in the output driver stage is mainly
caused by charging and discharging the gate to source
and gate to drain capacitance of the external MOSFET.
Figure 4 shows a simplified equivalent circuit of the
MIC44F18 driving an external MOSFET.
Figure 5. GATE Charge
The same energy is dissipated by ROFF, RG and RG_FET
when the driver IC turns the MOSFET off. Assuming Ron
is approximately equal to ROFF, the total energy and power
dissipated by the resistive drive elements is:
Figure 4. Output Driver Stage Power Dissipation
Dissipation During the External MOSFET Turn-On
Energy from capacitor CVDD is used to charge up the input
capacitance of the MOSFET (CGD and CGS). The energy
delivered to the MOSFET is dissipated in the three
resistive components, RON, RG and RG_FET. RON is the on
resistance of the upper driver MOSFET in the MIC44F18.
RG is the series resistor (if any) between the driver IC and
the MOSFET. RG_FET is the gate resistance of the
MOSFET. RG_FET is usually listed in the power MOSFET’s
specifications. The ESR of capacitor CB and the resistance
of the connecting etch can be ignored since they are much
E
= Q ×V
DRIVER
G
GS
and
P
=Q ×V ×f
S
DRIVER
G
GS
Where
EDRIVER is the energy dissipated per switching
power
PDRIVER is the power dissipated by switching the
MOSFET on and off
less than RON and RG_FET
.
QG is the total GATE charge at VGS
The effective capacitance of CGD and CGS is difficult to
calculate since they vary non-linearly with ID, VGS, and VDS.
Fortunately, most power MOSFET specifications include a
typical graph of total gate charge vs. VGS. Figure 5 shows
a typical gate charge curve for an arbitrary power
MOSFET. This illustrates that for a gate voltage of 10V,
the MOSFET requires about 23.5nC of charge. The energy
dissipated by the resistive components of the gate drive
circuit during turn-on is calculated as:
VGS is the GATE to SOURCE voltage on the
MOSFET
fS is the switching frequency of the GATE drive
circuit
The power dissipated inside the MIC4100/4101 is equal to
the ratio of RON & ROFF to the external resistive losses in
RG and RG_FET. Letting RON = ROFF, the power dissipated in
the MIC44F18 due to driving the external MOSFET is:
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MIC44F18/19/20
RON
Pdissdrive = PDRIVER
RON + RG + RG _FET
Supply Current Power Dissipation
Power is dissipated in the MIC44F18 even if is there is
nothing being driven. The supply current is drawn by the
bias for the internal circuitry, the level shifting circuitry and
shoot-through current in the output drivers. The supply
current is proportional to operating frequency and the VDD
voltage. The typical characteristic graphs show how supply
current varies with switching frequency and supply voltage.
The power dissipated by the MIC44F18 due to supply
current is
PdissSUPPLY = VDD × IDD
Figure 6A. Driver Power Dissipation
Total Power Dissipation and Thermal Considerations
Total power dissipation in the Driver equals the power
dissipation caused by driving the external MOSFETs plus
the supply current.
PdissTOTAL = PdissSUPPLY + PdissDRIVE
The die temperature may be calculated once the total
power dissipation is known.
TJ = TA + PdissTOTAL ×θJA
Where
TA is the Maximum ambient temperature
TJ is the junction temperature (°C)
PdissTOTAL is the power dissipation of the Driver
θJC is the thermal resistance from junction-to-
ambient air (°C/W)
Figure 6B. Driver Power Dissipation
The following graphs help determine the maximum
gate charge that can be driven with respect to
switching frequency, supply voltage and ambient
temperature.
Figure 6A shows the power dissipation in the driver for
different values of gate charge with VDD=5V. Figure 6B
shows the power dissipation at VDD=12V. Figure 6C
show the maximum power dissipation for a given
ambient temperature for the MLF and ePad packages.
The maximum operating frequency of the driver may
be limited by the maximum power dissipation of the
driver package.
Figure 6C. Max. Driver Power Dissipation
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Micrel, Inc.
MIC44F18/19/20
Propagation Delay and Delay Matching and Other
Timing Considerations
the ground return path causes a voltage spike or ringing to
appear on the source of the MOSFET. This voltage works
against the gate drive voltage and can either slow down or
turn off the MOSFET during the period when it should be
turned on.
Fast propagation delay between the input and output drive
waveform is desirable. It improves overcurrent protection
by decreasing the response time between the control
signal and the MOSFET gate drive. Minimizing
propagation delay also minimizes phase shift errors in
power supplies with wide bandwidth control loops.
Care must be taken to insure the input signal pulse width
is greater than the minimum specified pulse width. An
input signal that is less than the minimum pulse width may
result in no output pulse or an output pulse whose width is
significantly less than the input.
IN
Figure 7. Critical Current Paths for High Driver
Outputs
Decoupling and Bootstrap Capacitor Selection
Figure 8 shows the critical current paths when the driver
outputs go low and turn off the external MOSFETs. Short,
low impedance connections are important during turn-off
for the same reasons given in the turn-on explanation.
Current from the VDD supply replenishes charge in the
Decoupling capacitors are required for proper operation by
supplying the charge necessary to drive the external
MOSFETs as well as minimizing the voltage ripple on the
supply pins.
Ceramic capacitors are recommended because of their
low impedance and small size. Z5U type ceramic capacitor
dielectrics are not recommended due to the large change
in capacitance over temperature and voltage. A minimum
value of 0.1µf is required for each of the capacitors,
regardless of the MOSFETs being driven. Larger
MOSFETs may require larger capacitance values for
proper operation. The voltage rating of the capacitors
depends upon the supply voltage, ambient temperature
and the voltage derating used for reliability.
decoupling capacitor, CVdd
.
IN
Placement of the decoupling capacitors is critical. The
bypass capacitor for VDD should be placed as close as
possible between the VDD and VSS pins. The etch
connections must be short, wide and direct. The use of a
ground plane to minimize connection impedance is
recommended. Refer to the section on layout and
component placement for more information.
Figure 8. Critical Current Paths for High Driver
Outputs
The following circuit guidelines should be adhered to for
optimum circuit performance:
1. The VCC bypass capacitor must be placed close to
the VDD and ground pins. It is critical that the etch
length between the decoupling capacitor and the
VDD & GND pins be minimized to reduce pin
inductance.
Grounding, Component Placement and Circuit Layout
Nanosecond switching speeds and ampere peak currents
in and around the MOSFET driver requires proper
placement and trace routing of all components. Improper
placement may cause degraded noise immunity, false
switching and excessive ringing.
2. A ground plane is recommended to minimize
parasitic inductance and impedance of the return
paths. The MIC44F18 family of drivers is capable
of high peak currents and very fast transition
times. Any impedance between the driver, the
decoupling capacitors and the external MOSFET
will degrade the performance of the circuit.
Figure 7 shows the critical current paths when the driver
outputs go high and turn on the external MOSFETs. It also
helps demonstrate the need for a low impedance ground
plane. Charge needed to turn-on the MOSFET gates
comes from the decoupling capacitors CVDD. Current in the
gate driver flows from CVDD through the internal driver, into
the MOSFET gate and out the source. The return
connection back to the decoupling capacitor is made
through the ground plane. Any inductance or resistance in
3. Trace out the high di/dt and dv/dt paths, as shown
in Figures 7 and 8 and minimize etch length and
loop area for these connections. Minimizing these
parameters decreases the parasitic inductance
and the radiated EMI generated by fast rise and
fall times.
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March 2006
Micrel, Inc.
MIC44F18/19/20
Package Information
8-Pin ePad MSOP (M)
8-Pin 2mmX2mm MLF (ML)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2004 Micrel, Incorporated.
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