MIC4607-1YML-T5 [MICROCHIP]
85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection;
| 型号： | MIC4607-1YML-T5 |
| 厂家： | 
MICROCHIP |
| 描述： | 85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection 驱动 接口集成电路 驱动器 |
| 文件： | 总42页 (文件大小：1162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MIC4607
85V, Three-Phase MOSFET Driver with Adaptive
Dead-Time, Anti-Shoot-Through and Overcurrent
Protection
Features
General Description
• Gate Drive Supply Voltage Up To 16V
• Overcurrent Protection
The MIC4607 is an 85V, three-phase MOSFET driver.
The MIC4607 features a fast (35 ns) propagation delay
time and a 20 ns driver rise/fall time for a 1 nF
capacitive load. TTL inputs can be separate high- and
low-side signals or a single PWM input with high and
low drive generated internally. High- and low-side
outputs are guaranteed to not overlap in either mode.
The MIC4607 includes overcurrent protection as well
as a high-voltage internal diode that charges the
high-side gate drive bootstrap capacitor.
• Drives High-Side And Low-Side N-Channel
MOSFETs With Independent Inputs Or With A
Single PWM Signal
• TTL Input Thresholds
• On-Chip Bootstrap Diodes
• Fast 35 ns Propagation Times
• Shoot-Through Protection
• Drives 1000 pF Load With 20 ns Rise And Fall
Times
A robust, high-speed, and low-power level shifter
provides clean level transitions to the high-side output.
The robust operation of the MIC4607 ensures that the
outputs are not affected by supply glitches, HS ringing
below ground, or HS slewing with high-speed voltage
transitions. Undervoltage protection is provided on both
the low-side and high-side drivers.
• Low Power Consumption
• Supply Undervoltage Protection
• –40°C to +125°C Junction Temperature Range
Applications
The MIC4607 is available in a both a 28-pin 4 mm ×
5 mm QFN and 28-pin TSSOP package with an
operating junction temperature range of –40°C to
+125°C.
• Three-Phase and BLDC Motor Drives
• Three-Phase Inverters
Typical Application Circuit
MIC4607
Three-Phase Motor Driver
DS20005610A-page 1
2016 Microchip Technology Inc.
MIC4607
Package Type
MIC4607-1
MIC4607-2
28-pin QFN
28-pin QFN
MIC4607-1
MIC4607-2
28-pin TSSOP
28-pin TSSOP
DS20005610A-page 2
2016 Microchip Technology Inc.
MIC4607
Functional Diagram
MIC4607 xPhase Top-Level
Functional Diagram
Input Logic Block
2016 Microchip Technology Inc.
DS20005610A-page 3
MIC4607
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †, (Note 2)
Supply Voltage (V , V
– V
)..................................................................................................................................... –0.3V to 18V
DD
xHB
xHS
Input Voltages (V , V , V
, V )...................................................................................................................–0.3V to V + 0.3V
EN DD
xLI
xHI
xPWM
FLT/ Pin....................................................................................................................................................................–0.3V to V + 0.3V
DD
DLY Pin ............................................................................................................................................................................... –0.3V to 18V
Voltage on xLO (V )..............................................................................................................................................–0.3V to V + 0.3V
xLO
DD
Voltage on xHO (V
) ....................................................................................................................................V – 0.3V to V + 0.3V
xHO
HS HB
Voltage on xHS (Continuous)................................................................................................................................................. –1V to 90V
Voltage on xHB ................................................................................................................................................................................108V
ILIM+................................................................................................................................................................................... –0.3V to +5V
ILIM– ................................................................................................................................................................................... –0.3V to +2V
Average Current in V to HB Diode ...........................................................................................................................................100 mA
DD
ESD Protection On All Pins (Note 1):
HBM.................................................................................................................................................................................. 1 kV
MM...................................................................................................................................................................................200V
CDM.................................................................................................................................................................................200V
Operational Characteristics ††, (Note 2)
Supply Voltage (V ), [decreasing V ]............................................................................................................................. 5.25V to 16V
DD
DD
Supply Voltage (V ), [increasing V ] ................................................................................................................................ 5.5V to 16V
DD
DD
Voltage on xHS ...................................................................................................................................................................... –1V to 85V
Voltage on xHS (repetitive transient <100 ns)........................................................................................................................ –5V to 90V
HS Slew Rate............................................................................................................................................................................... 50 V/ns
Voltage on xHB ................................................................................................................................................ V + 5.5V to V + 16V
HS
HS
and/or............................................................................................................................................................ V –1V to V +85V
DD
DD
† Notice: Exceeding the absolute maximum ratings may damage the device.
†† Notice: The device is not guaranteed to function outside its operating ratings.
Note 1: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 kΩ in series with 100 pF.
2: An “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI).
DS20005610A-page 4
2016 Microchip Technology Inc.
MIC4607
DC CHARACTERISTICS (Note 1, 2)
Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VHS = 0V; No load on
xLO or xHO; TA = 25°C; unless noted. Bold values indicate –40°C< TJ < +125°C.
Parameters
Supply Current
Sym.
Min.
Typ.
Max.
Units
Conditions
—
—
VDD Quiescent Current
VDD Shutdown Current
VDD Operating Current
IDD
390
2.2
750
10
μA
xLI = xHI = 0V
xLI = xHI = 0V;
EN = 0V with
HS = floating
IDDSH
μA
xLI = xHI = 0V ; EN = 0V;
HS = 0V
—
—
—
58
0.6
20
150
1.5
75
IDDO
IHB
mA
f = 20 kHz
Per Channel xHB Quiescent
Current
xLI = xHI = 0V or
xLI = 0V and xHI = 5V
μA
Per Channel xHB Operating
Current
—
IHBO
30
400
μA
f = 20 kHz
—
—
xHB to VSS Current, Quiescent
xHB to VSS Current, Operating
IHBS
0.05
30
5
μA
μA
VxHS = VxHB = 90V
f = 20 kHz
IHBSO
300
Input (TTL: xLI, xHI, xPWM, EN) (Note 3)
—
—
—
—
—
—
Low-Level Input Voltage
High-Level Input Voltage
Input Voltage Hysteresis
VIL
VIH
0.8
—
V
V
V
2.2
—
VHYS
0.1
xLI and xHI Inputs
(-1 Version)
100
50
300
130
500
250
Input Pull-Down Resistance
RI
kꢀ
xPWM Input (-2 Version)
Undervoltage Protection
VDD Falling Threshold
—
—
—
—
VDDR
VDDH
VHBR
VHBH
3.8
4.4
0.25
4.4
4.9
V
V
V
V
—
—
VDD Threshold Hysteresis
xHB Falling Threshold
4.0
4.9
—
—
xHB Threshold Hysteresis
Overcurrent Protection
Rising Overcurrent Threshold
0.25
VILIM+
175
—
200
70
225
—
mV
ns
(VILIM+ – VILIM–)
ILIM to Gate Propagation
Delay
tILIM_PROP
VILIM+ = 0.5V peak
Fault Circuit
—
—
FLT/ Output Low Voltage
Rising DLY Threshold
DLY Current Source
Fault Clear Time
VOLF
VDLY+
IDLY
0.2
1.5
0.5
—
V
V
VILIM = 1V; IFLT/ = 1 mA
—
0.3
—
0.44
670
0.6
—
μA
μs
VDLY = 0V
tFCL
CDLY = 1 nF
Bootstrap Diode
Low-Current Forward Voltage
High-Current Forward Voltage
VDL
VDH
—
—
0.4
0.8
0.70
1
V
V
IVDD-xHB = 100 μA
IVDD-xHB = 50 mA
Note 1: “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI).
2: Specification for packaged product only.
3:
VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic
low.
VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic
high.
4: Guaranteed by design. Not production tested.
2016 Microchip Technology Inc.
DS20005610A-page 5
MIC4607
DC CHARACTERISTICS (Note 1, 2) (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VHS = 0V; No load on
xLO or xHO; TA = 25°C; unless noted. Bold values indicate –40°C< TJ < +125°C.
Parameters
Sym.
Min.
Typ.
Max.
6
Units
Conditions
Dynamic Resistance
xLO Gate Driver
RD
—
4
V
—
—
—
Low-Level Output Voltage
VOLL
VOHL
IxLO = 50 mA
0.3
0.5
0.6
1
V
V
IxLO = 50 mA,
High-Level Output Voltage
VOHL = VDD – VxLO
Peak Sink Current
IOHL
IOLL
—
—
1
1
—
—
A
A
VxLO = 0V
Peak Source Current
VxLO = 12V
xHO Gate Driver
Low-Level Output Voltage
VOLH
VOHH
—
—
0.3
0.5
0.6
1
V
V
IxHO = 50 mA
IxHO = 50 mA,
High-Level Output Voltage
VOHH = VxHB – VxHO
Peak Sink Current
IOHH
IOLH
—
—
1
1
—
—
A
A
VxHO = 0V
Peak Source Current
VxHO = 12V
Switching Specifications (LI/HI mode with inputs non-overlapping, assumes HS low before LI goes high and
LO low before HI goes high).
Lower Turn-Off Propagation
Delay (LI Falling to LO Falling)
—
—
—
—
tLPHL
tHPHL
tLPLH
35
35
35
75
75
75
ns
ns
ns
—
—
—
Upper Turn-Off Propagation
Delay (HI Falling to HO Falling)
Lower Turn-On Propagation
Delay (LI Rising to LO Rising)
Upper Turn-On Propagation
Delay (HI Rising to HO Rising)
tHPLH
tR/F
35
20
75
—
—
ns
ns
μs
—
Output Rise/Fall Time
—
—
CL = 1000 pF
CL = 0.1 μF
Output Rise/Fall Time
(3V to 9V)
tR/F
0.8
Minimum Input Pulse Width
that Changes the Output
tPW
—
50
—
ns
Note 4
Switching Specifications PWM Mode (MIC4607-2) or LI/HI mode (MIC4607-1) with Overlapping LI/HI Inputs
Delay from PWM Going High /
LI Low, to LO Going Low
tLOOFF
—
35
75
ns
—
LO Output Voltage Threshold
for LO FET to be Considered
Off
VLOOFF
—
1.9
—
V
—
Delay from LO Off to HO Going
High
tHOON
—
—
35
35
75
75
ns
ns
—
—
Delay from PWM or HI Going
Low to HO Going Low
tHOOFF
Note 1: “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI).
2: Specification for packaged product only.
3:
VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic
low.
VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic
high.
4: Guaranteed by design. Not production tested.
DS20005610A-page 6
2016 Microchip Technology Inc.
MIC4607
DC CHARACTERISTICS (Note 1, 2) (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VHS = 0V; No load on
xLO or xHO; TA = 25°C; unless noted. Bold values indicate –40°C< TJ < +125°C.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Switch Node Voltage Threshold
Signaling HO is Off
VSWTH
1
2.2
4
V
—
—
Delay between HO FET Being
Considered Off to LO Turning
On
tLOON
—
35
75
ns
Forced xLO On if VSWTH is
Not Detected
tSWTO
100
250
500
ns
—
Note 1: “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI).
2: Specification for packaged product only.
3: VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic
low.
VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic
high.
4: Guaranteed by design. Not production tested.
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, TA = +25°C, VIN = VEN = 12V, VBOOST – VSW = 3.3V,
VOUT = 3.3V
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Temperature Ranges
Operating Junction Temperature Range
Operating Ambient Temperature Range
Lead Temperature
TJ
TA
—
TS
TJ
–40
–40
—
—
—
+125
+125
—
°C
°C
°C
°C
°C
—
—
260
—
Soldering, 10s
Storage Temperature Range
Maximum Junction Temperature
Package Thermal Resistances
–60
—
+150
+125
—
—
—
Thermal Resistance, 4 mm × 5 mm
QFN-28L
JA
JC
—
—
43
—
—
°C/W
°C/W
—
—
Thermal Resistance, 4 mm × 5 mm
QFN-28L
3.4
TSSOP-28L
TSSOP-28L
JA
JC
—
—
70
20
—
—
°C/W
°C/W
—
—
2016 Microchip Technology Inc.
DS20005610A-page 7
MIC4607
2.0
TYPICAL PERFORMANCE CURVES
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
100
VxHS = GND
VEN = 5V
490
VxHS = GND
EN = 5V
90
80
70
60
50
40
30
20
125°C
VHB = 16V
V
460
430
400
370
340
310
280
25°C
VHB = 12V
VHB = 5.5V
-40°C
10 11 12 13 14 15 16
-50
-25
0
25
50
75
100
125
5
6
7
8
9
TEMPERATURE (°C)
VDD (V)
FIGURE 2-1:
V
Quiescent Current vs.
FIGURE 2-4:
V
Quiescent Current (All
HB
DD
V
Voltage.
Channels) vs Temperature.
DD
500
480
460
440
420
400
380
360
340
320
300
280
8
VxHS = GND
xHI = xLI = 0V
VDD = 16V
7
6
5
4
3
2
1
0
V
xHS = FLOATING
VEN = 5V
VEN = 0V
VDD = VHB
-40°C
125°C
VDD = 5.5V
-25
VDD = 12V
50
25°C
10 11 12 13 14 15 16
5
6
7
8
9
-50
0
25
75
100
125
VDD+HB (V)
TEMPERATURE (°C)
FIGURE 2-2:
V
Quiescent Current vs.
FIGURE 2-5:
V
Shutdown Current
DD+HB
DD
Temperature.
(Floating Switch Node) vs. Voltage.
100
90
80
70
60
50
40
30
8
xHI = xLI = 0V
VxHS = GND
EN = 5V
VxHS = FLOATING
7
VEN = 0V
V
VDD= 16V
VDD = VHB
-40°C
6
5
VDD= 12V
4
3
VDD = 5.5V
2
1
0
25°C
125°C
20
5
6
7
8
9
10 11 12 13 14 15 16
-50
-25
0
25
50
75
100
125
VHB (V)
TEMPERATURE (°C)
FIGURE 2-3:
V
Quiescent Current (All
FIGURE 2-6:
V
Shutdown Current
DD+HB
HB
Channels) vs. V Voltage.
(Floating Switch Node) vs. Temperature.
HB
DS20005610A-page 8
2016 Microchip Technology Inc.
MIC4607
2
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1
120
110
100
90
xHI = xL I= 0V
xHS = GND
VDD = 16V
VxHS = 0V
CLOAD=0nF
V
VEN = 0V
VDD = VHB
-40°C
125ºC
80
25°C
25ºC
70
–40ºC
60
0.9
0.8
0.7
0.6
0.5
0.4
0.3
50
40
125°C
30
20
5
6
7
8
9
10 11 12 13 14 15 16
0
10 20 30 40 50 60 70 80 90 100
VDD+HB (V)
FREQUENCY (kHz)
FIGURE 2-7:
V
Shutdown Current
FIGURE 2-10:
V
Operating Current
DD+HB
DD+HB
(Grounded Switch Node) vs. Voltage.
vs. Switching Frequency.
25
120
IHO/LO = −50mA
xHI = xLI = 0V
125ºC
110
VxHS = GND
VxHS = GND
VDD= 16V
VEN = VHB = VDD
VEN = 0V
100
90
80
70
60
50
40
30
20
20
VDD = VHB
25ºC
15
VDD = 5.5V
10
VDD= 12V
–40ºC
5
-50
-25
0
25
50
75
100
125
5
6
7
8
9
10 11 12 13 14 15 16
TEMPERATURE (°C)
VDD (V)
FIGURE 2-8:
V
Shutdown Current
FIGURE 2-11:
HO/LO Sink On-Resistance
DD+HB
(Grounded Switch Node) vs. Temperature.
vs. V
.
DD
1.5
20
15
10
5
VDD = 12V
1.4
IHO/LO = 50mA
xHS = GND
VEN = VHB = VDD
V
xHS = 0V
V
1.3
1.2
1.1
1
CLOAD = 0nF
VDD = 12V
VDD = 5.5V
25ºC
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
–40ºC
125ºC
VDD = 16V
0
0
10 20 30 40 50 60 70 80 90 100
-50
-25
0
25
50
75
100
125
FREQUENCY (kHz)
TEMPERATURE (°C)
FIGURE 2-9:
vs. Switching Frequency.
V
Operating Current
FIGURE 2-12:
vs. Temperature.
HO/LO Sink On-Resistance
DD+HB
2016 Microchip Technology Inc.
DS20005610A-page 9
MIC4607
25
70
60
50
40
30
20
IHO/LO = −50mA
xHS = GND
VEN = VHB = VDD
VDD = 12V
VxHS = 0V
CL=1nF
125ºC
V
20
15
10
5
tLPHL
tLPLH
25ºC
tHPHL
tHPLH
–40ºC
-50
-25
0
25
50
75
100
125
5
6
7
8
9
10 11 12 13 14 15 16
VDD (V)
TEMPERATURE (°C)
FIGURE 2-13:
HO/LO Source
FIGURE 2-16:
Propagation Delay (HI/LI
On-Resistance vs. V
.
Input) vs. Temperature.
DD
25
50
45
40
35
30
25
IHO/LO = −50mA
VxHS = 0V
VxHS = GND
C
L = 1nF
VEN = VHB = VDD
VDD = 5.5V
20
15
10
5
VDD = 12V
125°C
25°C
20
15
10
VDD = 16V
–40°C
5
6
7
8
9
10 11 12 13 14 15 16
-50
-25
0
25
50
75
100
125
VDD (V)
TEMPERATURE (°C)
FIGURE 2-14:
HO/LO Source
FIGURE 2-17:
Output Rise Time vs. V
DD
On-Resistance vs. Temperature.
Voltage.
70
45
40
35
30
25
20
15
10
VxHS = 0V
TAMB = 25°C
VxHS = 0V
CL= 1nF
C
L = 1nF
tHPLH
60
50
40
30
20
25°C
tHPHL
125°C
tLPLH
tLPHL
–40°C
5
5
5
6
7
8
9
10 11 12 13 14 15 16
6
7
8
9
10 11 12 13 14 15 16
VDD (V)
VDD (V)
FIGURE 2-15:
Propagation Delay (HI/LI
FIGURE 2-18:
Output Fall Time vs. V
DD
Input) vs. V Voltage.
Voltage.
DD
DS20005610A-page 10
2016 Microchip Technology Inc.
MIC4607
4.9
4.8
4.7
4.6
4.5
4.4
4.3
4.2
4.1
4
55
50
45
40
35
30
25
20
15
10
5
RISE TIME
DD = 5.5V
VxHS = 0V
CL=1nF
VHB RISING
VxHS = 0V
V
FALL TIME
DD = 5.5V
V
VHB FALLING
VDD RISING
RISE TIME
VDD = 12V
FALL TIME
VDD = 12V
VDD FALLING
25 50
-50
-25
0
75
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 2-19:
Rise/Fall Time vs.
FIGURE 2-22:
V
/V UVLO vs.
DD HB
Temperature.
Temperature.
130
120
110
100
90
VxHS = 0V
CL=1nF
T
AMB = 25°C
125°C
25°C
–40°C
80
70
60
50
40
30
20
10
5
6
7
8
9
10 11 12 13 14 15 16
VDD (V)
FIGURE 2-20:
Dead Time vs. V Voltage.
FIGURE 2-23:
Overcurrent Threshold vs.
DD
V
Voltage.
DD
130
120
110
100
90
VDD= 12V
VxHS = 0V
CL=1nF
VDD = 5.5V
80
VDD = 16V
VDD = 12V
70
60
50
40
30
20
10
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 2-21:
Dead Time vs. Temperature.
FIGURE 2-24:
Overcurrent Threshold vs.
Temperature.
2016 Microchip Technology Inc.
DS20005610A-page 11
MIC4607
120
110
100
90
VHS = 0V
125°C
25°C
–40°C
80
70
60
50
5
6
7
8
9
10 11 12 13 14 15 16
VDD (V)
FIGURE 2-25:
Overcurrent Propagation
FIGURE 2-28:
Bootstrap Diode I-V
Delay vs. V Voltage.
Characteristics.
DD
120
VxHS = 0V
110
VDD = 16V
VDD = 5.5V
100
90
80
70
60
50
VDD = 12V
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
FIGURE 2-26:
Overcurrent Propagation
Delay vs. Temperature.
FIGURE 2-27:
Bootstrap Diode Reverse
Current.
DS20005610A-page 12
2016 Microchip Technology Inc.
MIC4607
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
QFN PIN FUNCTION TABLE
Pin Name
Pin Number
QFN
Description
MIC4607-1
MIC4607-2
1
2
3
BHI
ALI
AHI
BPWM
NC
High-side input (-1) or PWM input (-2) for Phase B.
Low-side input (-1) or no connect (-2) for Phase A.
High-side input (-1) or PWM input (-2) for Phase A.
APWM
Active high enable input. High input enables all outputs and initiates
normal operation. Low input shuts down device into a low LQ mode.
4
EN
EN
Open Drain. FLT/ pin goes low when outputs are latched off due to an
overcurrent event. Must be pulled-up to an external voltage with a
resistor.
5
FLT/
FLT/
Phase B High-Side Bootstrap Supply. An external bootstrap capacitor
6
7
8
BHB
BHO
BHS
BHB
BHO
BHS
is required. Connect the bootstrap capacitor across this pin and BHS
.
An on-board bootstrap diode is connected from VDD to BHB
.
Phase B High-Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
Phase B High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
Phase B Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
9
BLO
NC
BLO
NC
10
11
12
13
No Connect.
Differential Current-Limit Input. Connect to most negative end of the
external current-sense resistor.
ILIM-
VSS
ILIM+
ILIM-
VSS
ILIM+
Power Ground for Phase A and Phase B.
Differential Current-Limit Input. Connect to most positive end of the
external current-sense resistor.
Phase A Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
14
15
16
17
18
19
ALO
AHS
AHO
AHB
VDD
DLY
ALO
AHS
AHO
AHB
VDD
DLY
Phase A High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
Phase A High Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
Phase A High-Side Bootstrap Supply. An external bootstrap capacitor
is required. Connect the bootstrap capacitor across this pin and AHS
.
An on-board bootstrap diode is connected from VDD to AHB
.
Input Supply for Gate Drivers and Internal Logic/Control Circuitry.
Decouple this pin to VSS with a minimum 2.2 μF ceramic capacitor.
Fault Delay. Connect an external capacitor from this pin to ground to
increase the current-limit reset delay. Leave open for minimum delay.
Do not externally drive this pin.
20
21
VSS
CLO
VSS
CLO
Phase C Power and Control Circuitry Ground.
Phase C Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
Phase C High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
22
CHS
CHS
2016 Microchip Technology Inc.
DS20005610A-page 13
MIC4607
TABLE 3-1:
QFN PIN FUNCTION TABLE
Pin Name
Pin Number
QFN
Description
MIC4607-1
MIC4607-2
Phase C High-Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
23
24
CHO
CHB
CHO
Phase C High-Side Bootstrap Supply. An external bootstrap capacitor
is required. Connect the bootstrap capacitor across this pin and CHS.
An on-board bootstrap diode is connected from VDD to CHB.
CHB
25
26
27
28
NC
CLI
CHI
BLI
NC
NC
No Connect.
Low-Side Input (-1) or No Connect (-2) for Phase C.
High-Side Input (-1) or PWM Input (-2) for Phase C.
Low-Side Input (-1) or No Connect (-2) for Phase B.
CPWM
NC
Exposed Heatsink Pad: Connect to GND for best thermal perfor-
mance.
EP
ePad
ePad
TABLE 3-2:
TSSOP PIN FUNCTION TABLE
Pin Name
Pin Number
TSSOP
Description
MIC4607-1
MIC4607-2
1
2
3
4
5
6
7
NC
CLI
CHI
BLI
BHI
ALI
AHI
NC
NC
No Connect.
Low-Side Input (-1) or No Connect (-2) for Phase C.
High-Side Input (-1) or PWM Input (-2) for Phase C.
Low-Side Input (-1) or No Connect (-2) for Phase B.
High-side input (-1) or PWM input (-2) for Phase B.
Low-side input (-1) or no connect (-2) for Phase A.
High-side input (-1) or PWM input (-2) for Phase A.
CPWM
NC
BPWM
NC
APWM
Active high enable input. High input enables all outputs and initiates
normal operation. Low input shuts down device into a low LQ mode.
8
EN
EN
Open Drain. FLT/ pin goes low when outputs are latched off due to an
overcurrent event. Must be pulled-up to an external voltage with a
resistor.
9
FLT/
FLT/
Phase B High-Side Bootstrap Supply. An external bootstrap capacitor
10
11
12
13
BHB
BHO
BHS
BLO
BHB
BHO
BHS
BLO
is required. Connect the bootstrap capacitor across this pin and BHS
.
An on-board bootstrap diode is connected from VDD to BHB
.
Phase B High-Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
Phase B High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
Phase B Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
Differential Current-Limit Input. Connect to most negative end of the
external current-sense resistor.
14
15
16
ILIM-
VSS
ILIM-
VSS
Power Ground for Phase A and Phase B.
Differential Current-Limit Input. Connect to most positive end of the
external current-sense resistor.
ILIM+
ILIM+
Phase A Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
17
ALO
ALO
DS20005610A-page 14
2016 Microchip Technology Inc.
MIC4607
TABLE 3-2:
TSSOP PIN FUNCTION TABLE
Pin Name
Pin Number
TSSOP
Description
MIC4607-1
MIC4607-2
Phase A High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
18
19
20
21
22
AHS
AHS
Phase A High Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
AHO
AHB
VDD
DLY
AHO
AHB
VDD
DLY
Phase A High-Side Bootstrap Supply. An external bootstrap capacitor
is required. Connect the bootstrap capacitor across this pin and AHS
.
An on-board bootstrap diode is connected from VDD to AHB
.
Input Supply for Gate Drivers and Internal Logic/Control Circuitry.
Decouple this pin to VSS with a minimum 2.2 μF ceramic capacitor.
Fault Delay. Connect an external capacitor from this pin to ground to
increase the current-limit reset delay. Leave open for minimum delay.
Do not externally drive this pin.
23
24
VSS
CLO
VSS
CLO
Phase C Power and Control Circuitry Ground.
Phase C Low-Side Drive Output. Connect to the gate of the low-side
power MOSFET gate.
Phase C High-Side Driver Return. Connect to the bootstrap capacitor
and to a resistor that connect to the source of the external MOSFET.
See the Applications section for additional information on the resistor.
25
26
CHS
CHO
CHS
CHO
Phase C High-Side Drive Output. Connect to the gate of the external
high-side power MOSFET.
Phase C High-Side Bootstrap Supply. An external bootstrap capacitor
27
28
CHB
NC
CHB
NC
is required. Connect the bootstrap capacitor across this pin and CHS.
An on-board bootstrap diode is connected from VDD to CHB
.
No Connect.
2016 Microchip Technology Inc.
DS20005610A-page 15
MIC4607
xHO goes high with a high signal on xHI after a typical
delay of 35 ns (tHPLH). xHI going low drives xHO low
also with typical delay of 35 ns (tHPHL).
4.0
4.1
TIMING DIAGRAMS
Non-Overlapping LI/HI Input Mode
(MIC4607-1)
Likewise, xLI going high forces xLO high after typical
delay of 35 ns (tLPLH) and xLO follows low transition of
xLI after typical delay of 35 ns (tLPHL).
In non-overlapping LI/HI input mode, enough delay is
added between the xLI and xHI inputs to allow xHS to
be low before xLI is pulled high and similarly xLO is low
before xHI goes high.
xHO and xLO output rise and fall times (tR/tF) are typi-
cally 20 ns driving 1000 pF capacitive loads.
xHS
0V
tF
tR
xHO
xLO
xHI
tR
tF
tHPHL
tHPLH
tLPLH
tLPHL
xLI
FIGURE 4-1:
Separate Non-Overlapping LI/HI Input Mode (MIC4607-1).
Note 1: All propagation delays are measured from the 50% voltage level and rise/fall times are measured 10% to
90%.
2: “x” in front of a pin name refers to either A, B or C phase. (e.g. xHI can be either AHI, BHI or CHI).
DS20005610A-page 16
2016 Microchip Technology Inc.
MIC4607
“HS latch” allowing xLO to go high.
4.2
Overlapping LI/HI Input Mode
(MIC4607-1)
If xHS falls very fast, xLO will be held low by a 35 ns
delay gated by HI going low. Conversely, xHI going
high (ON) when xLO is high has no effect on outputs
until xLI is pulled low (off) and xLO falls to < 1.9V. Delay
from xLI going low to xLO falling is tLOOFF and delay
When xLI/xHI input high signals overlap, xLO/xHO out-
put states are determined by the first output to be
turned on. That is, if xLI goes high (ON), while xHO is
high, xHO stays high until xHI goes low at which point,
after a delay of tHOOFF and when xHS < 2.2V, xLO goes
high with a delay of tLOON. Should xHS never trip the
aforementioned internal comparator reference (2.2V),
a falling xHI edge delayed by a typical 250 ns will set
from xLO < 1.9V to xHO being on is tHOON
.
2.2V
(typ)
xHS
0V
tLOON
xHO
xLO
tHOON
tHOOFF
1.9V
(typ)
tLOOFF
xHI
xLI
FIGURE 4-2:
Separate Overlapping LI/HI Input Mode (MIC4607-1).
2016 Microchip Technology Inc.
DS20005610A-page 17
MIC4607
A 35 ns delay gated by xPWM going low can determine
the time to xLO going high for fast falling HS designs.
xPWM going high forces xLO low in typically 35ns
(tLOOFF) (5 – 6).
4.3
PWM Input Mode (MIC4607-2)
A low going xPWM signal applied to the MIC4607-2
causes xHO to go low, typically 35ns (tHOOFF) after the
xPWM input goes low, at which point the switch node,
xHS, falls (1 – 2).
When xLO reaches 1.9V (VLOOFF), the low-side MOS-
FET is deemed off and xHO is allowed to go high. The
delay between these two points is typically 35 ns
(tHOON) (7 – 8).
When xHS reaches 2.2V (VSWTH), the external
high-side MOSFET is deemed off and xLO goes high,
typically within 35 ns (tLOON) (3-4). xHS falling below
2.2V sets a latch that can only be reset by xPWM going
high. This design prevents ringing on xHS from causing
an indeterminate xLO state. Should xHS never trip the
aforementioned internal comparator reference (2.2V),
a falling xPWM edge delayed by 250 ns will set “HS
latch” allowing xLO to go high.
xHO and xLO output rise and fall times (tR/tF) are typi-
cally 20 ns driving 1000 pF capacitive loads.
tF
tR
2
xHO
tHOON
tR
4
6
(VLOOFF
)
xLO
7
tF
tLOOFF
tLOON
3
(VSWTH
)
xHS
0V
1
5
xPWM
tHOOFF
FIGURE 4-3:
PWM Mode (MIC4607-2).
DS20005610A-page 18
2016 Microchip Technology Inc.
MIC4607
above the VDLY+ threshold (typically 1.5V), which
resets the latch on the first rising edge of any LI input of
the MIC4607-1 (or falling edge on any PWM input for
the MIC4607-2).
4.4
Overcurrent Timing Diagram
The motor current is sensed in an external resistor that
is connected between the low-side MOSFET’s source
pins and ground. If the sense resistor voltage exceeds
the rising overcurrent threshold (typically 0.2V), all LO
and HO outputs are latched off and the FLT/ pin is
pulled low. Once the outputs are latched off, an internal
current source (typically 0.44 μA) begins to charge up
the external CDLY capacitor. The outputs remain
latched off and all xLI/xHI (or xPWM) input signals are
ignored until the voltage on the CDLY capacitor rises
Once this occurs, the CDLY capacitor is discharged, the
FLT/ pin returns to a high impedance state and all out-
puts will respond to their respective input signals.
On startup, the current limit latch is reset during a rising
VDD or a rising EN pin voltage to assure normal opera-
tion.
FIGURE 4-4:
Overcurrent Timing Diagram.
2016 Microchip Technology Inc.
DS20005610A-page 19
MIC4607
A high level applied to the xLI pin causes VDD to be
applied to the gate of the external MOSFET. A low level
on the xLI pin grounds the gate of the external
MOSFET.
5.0
FUNCTIONAL DESCRIPTION
The MIC4607 is a non-inverting, 85V three-phase
MOSFET driver designed to independently drive all six
N-Channel MOSFETs in a three-phase bridge. The
MIC4607 offers a wide 5.5V to 16V VDD operating
supply range with either six independent TTL inputs
(MIC4607-1) or three PWM inputs, one for each phase
(MIC4607-2). Refer to the Functional Diagram section.
VDD
SWITCH
NODE
The drivers contain input buffers with hysteresis, four
independent UVLO circuits (three high-side and one
low-side), and six output drivers. The high-side output
drivers utilize a high-speed level-shifting circuit that is
referenced to its HS pin. Each phase has an internal
diode that is used by the bootstrap circuits to provide
the drive voltages for each of the three high-side
outputs. A programmable overcurrent protection circuit
turns off all outputs during an overcurrent fault.
EXTERNAL
FET
LO
MIC4607
VSS
FIGURE 5-1:
Diagram.
Low-Side Driver Block
5.1
Startup and UVLO
The UVLO circuits force the driver’s outputs low until
the supply voltage exceeds the UVLO threshold. The
low-side UVLO circuit monitors the voltage between
the VDD and VSS pins. The high-side UVLO circuits
monitor the voltage between the xHB and xHS pins.
Hysteresis in the UVLO circuits prevent system noise
and finite circuit impedance from causing chatter during
turn-on.
5.5
High-Side Driver and Bootstrap
Circuit
Figure 5-2 illustrates a block diagram of the high-side
driver and bootstrap circuit. This driver is designed to
drive a floating N-channel MOSFET, whose source ter-
minal is referenced to the HS pin.
5.2
Enable Inputs
VDD
There is one external enable pin that controls all three
phases. A logic high on the enable pin (EN) allows for
startup of all phases and normal operation. Conversely,
when a logic low is applied on the enable pin, all
phases turn-off and the device enters a low current
shutdown mode. All outputs (xHO and xLO) are pulled
low when EN is low. Do not leave the EN pin floating.
HB
VIN
CB
EXTERNAL
FET
HO
LEVEL
SHIFT
5.3
Input Stage
MIC4607
RHS
All input pins (xLI and xHI) are referenced to the VSS
pin. The MIC4607 has a TTL-compatible input range
and can be used with input signals with amplitude less
than the supply voltage. The threshold level is indepen-
dent of the VDD supply voltage and there is no depen-
dence between IVDD and the input signal amplitude.
This feature makes the MIC4607 an excellent level
translator that will drive high level gate threshold MOS-
FETs from a low-voltage PWM IC.
HS
SWITCH
NODE
FIGURE 5-2:
High-Side Driver and
Bootstrap-Circuit Block Diagram.
A low-power, high-speed, level-shifting circuit isolates
the low side (VSS pin) referenced circuitry from the
high-side (xHS pin) referenced driver. Power to the
high-side driver and UVLO circuit is supplied by the
bootstrap capacitor (CB) while the voltage level of the
xHS pin is shifted high.
5.4
Low-Side Driver
The low-side driver is designed to drive a ground (VSS
pin) referenced N-channel MOSFET. Low driver
impedances allow the external MOSFET to be turned
on and off quickly. The rail-to-rail drive capability of the
output ensures a low RDSON from the external power
device. Refer to Figure 5-1.
The bootstrap circuit consists of an internal diode and
external capacitor, CB. In a typical application, such as
the motor driver shown in Figure 5-3 (only Phase A
illustrated), the AHS pin is at ground potential while the
low-side MOSFET is on. The internal diode charges
capacitor CB to VDD-VF during this time (where VF is
DS20005610A-page 20
2016 Microchip Technology Inc.
MIC4607
the forward voltage drop of the internal diode). After the
low-side MOSFET is turned off and the AHO pin turns
on, the voltage across capacitor CB is applied to the
gate of the high-side external MOSFET. As the
high-side MOSFET turns on, voltage on the AHS pin
rises with the source of the high-side MOSFET until it
reaches VIN. As the AHS and AHB pins rise, the inter-
nal diode is reverse biased, preventing capacitor CB
from discharging. During this time, the high-side MOS-
FET is kept ON by the voltage across capacitor CB.
5.7
Overcurrent Protection Circuitry
The MIC4607 provides overcurrent protection for the
motor driver circuitry. It consists of:
• A comparator that senses the voltage across a
current-sense resistor
• A latch and timer that keep all gate drivers off
during a fault
• An open-drain pin that pulls low during the fault.
If an overcurrent condition is detected, the FLT/ pin is
pulled low and the gate drive outputs are latched off for
a time that is determined by the DLY pin circuitry. After
the delay circuitry times out, a high-going edge on any
of the LI pins (for the MIC4607-1 version) or a low-going
edge on any of the PWM pins (for the MIC4607-2
version) is required to reset the latch, de-assert the FLT/
pin and allow the gate drive outputs to switch.
For additional information, refer to the Timing Diagrams
section as well as the Functional Diagram section.
5.7.1
ILIM
The ILIM+ and ILIM- pins provide a Kelvin-sensed cir-
cuit that monitors the voltage across an external cur-
rent sense resistor. This resistor is typically connected
between the source pins of all three low-side MOSFETs
and power ground. If the peak voltage across this resis-
tor exceeds the VILIM+ threshold, it will cause all six out-
puts to latch off. Both pins should be shorted to VSS
ground if the overcurrent features is not used.
FIGURE 5-3:
Example.
MIC4607 Motor Driver
5.6
Programmable Gate Drive
The MIC4607 offers programmable gate drive,
meaning the MOSFET gate drive (gate-to-source
voltage) equals the VDD voltage. This feature offers
designers flexibility in selecting the proper MOSFETs
for a given application. Different MOSFETs require
different VGS characteristics for optimum RDSON
performance. Typically, the higher the gate voltage (up
to 16V), the lower the RDSON achieved. For example,
as shown in Figure 5-4, a NTMSF4899NF MOSFET
can be driven to the ON state with a gate voltage of
5.5V but RDSON is 5.2 mꢀ. If driven to 10V, RDSON is
4.1 mꢀ – a decrease of 20%.
5.7.2
DLY
A capacitor connected to the DLY pin determines the
amount of time the gate drive outputs are latched off
before they can be restarted.
During normal operation, the DLY pin is held low by an
internal MOSFET. After an over-current condition is
detected, the MOSFET turns off and the external
capacitor is charged up by an internal current source.
The outputs remain latched off until the DLY pin voltage
reaches the VDLY+ threshold (typically 1.5V).
In low-current applications, the losses due to RDSON
are minimal, but in high-current motor drive applica-
tions such as power tools, the difference in RDSON can
lower the efficiency, reducing run time.
The delay time can be approximately calculated using
Equation 5-1.
EQUATION 5-1:
CDLY V DLY -
tDLY = ------------------------------------
IDLY
FIGURE 5-4:
MOSFET R
vs. V
.
GS
DSON
2016 Microchip Technology Inc.
DS20005610A-page 21
MIC4607
5.7.3
FLT/
This open-drain output is pulled low while the gate drive
outputs are latched off after an over-current condition.
It will de-assert once the DLY pin has reached the
VDLY+ threshold and a rising edge occurs on any LI pin
(for the MIC4607-1) or a falling edge on any PWM pin
(MIC4607-2).
During normal operation, the internal pull-down MOS-
FET is of the pin is high impedance. A pull-up resistor
must be connected to this pin.
DS20005610A-page 22
2016 Microchip Technology Inc.
MIC4607
The MIC4607 uses a combination of active sensing
and passive delay to ensure that both MOSFETs are
not on at the same time. Figure 6-2 illustrates how the
adaptive dead-time circuitry works.
6.0
6.1
APPLICATION INFORMATION
Adaptive Dead Time
For each phase, it is important that both MOSFETs of
the same phase branch are not conducting at the same
time or VIN will be shorted to ground and current will
“shoot
through”
the
MOSFETs.
Excessive
shoot-through causes higher power dissipation in the
MOSFETs, voltage spikes and ringing. The high switch-
ing current and voltage ringing generate conducted and
radiated EMI.
Minimizing shoot-through can be done passively,
actively or through a combination of both. Passive
shoot-through protection can be achieved by imple-
menting delays between the high and low gate drivers
to prevent both MOSFETs from being on at the same
time. These delays can be adjusted for different appli-
cations. Although simple, the disadvantage of this
approach is that it requires long delays to account for
process and temperature variations in the MOSFET
and MOSFET driver.
FIGURE 6-2:
Diagram.
Adaptive Dead-Time Logic
For the MIC4607-2, a high level on the xPWM pin
causes HI to go low and LI to go high. This causes the
xLO pin to go low. The MIC4607 monitors the xLO pin
voltage and prevents the xHO pin from turning on until
the voltage on the xLO pin reaches the VLOOFF thresh-
old. After a short delay, the MIC4607 drives the xHO pin
high. Monitoring the xLO voltage eliminates any exces-
sive delay due to the MOSFET driver’s turn-off time
and the short delay accounts for the MOSFET turn-off
delay as well as letting the xLO pin voltage settle out. If
an external resistor is used between the xLO output
and the MOSFET gate, it must be made small enough
to prevent excessive voltage drop across the resistor
during turn-off. Figure 6-3 illustrates using a diode
(DLS) and resistor (RLS2) in parallel with the gate resis-
tor to prevent a large voltage drop between the xLO pin
and MOSFET gate voltages during turn-off.
Adaptive Dead Time monitors voltages on the gate
drive outputs and switch node to determine when to
switch the MOSFETs on and off. This active approach
adjusts the delays to account for some of the varia-
tions, but it too has its disadvantages. High currents
and fast switching voltages in the gate drive and return
paths can cause parasitic ringing to turn the MOSFETs
back on even while the gate driver output is low.
Another disadvantage is that the driver cannot monitor
the gate voltage inside the MOSFET. Figure 6-1 shows
an equivalent circuit of the high-side gate drive.
FIGURE 6-1:
MIC4607 Driving an
External MOSFET.
FIGURE 6-3:
Low-Side Drive Gate
Resistor Configuration.
The internal gate resistance (RG_FET) and any external
damping resistor (RG) and HS pin resistor (RHS), iso-
late the MOSFET’s gate from the driver output. There
is a delay between when the driver output goes low and
the MOSFET turns off. This turn-off delay is usually
specified in the MOSFET data sheet. This delay
increases when an external damping resistor is used.
A low on the xPWM pin causes HI to go high and LO to
go low. This causes the xHO pin to go low after a short
delay (tHOOFF). Before the xLO pin can go high, the
voltage on the switching node (xHS pin) must have
dropped to 2.2V. Monitoring the switch voltage instead
of the xHO pin voltage eliminates timing variations and
excessive delays due to the high side MOSFET
2016 Microchip Technology Inc.
DS20005610A-page 23
MIC4607
turn-off. The xLO driver turns on after a short delay
(tLOON). Once the xLO driver is turned on, it is latched
on until the xPWM signal goes high. This prevents any
ringing or oscillations on the switch node or xHS pin
from turning off the xLO driver. If the xPWM pin goes
low and the voltage on the xHS pin does not cross the
Table 6-1 contains truth tables for the MIC4607-1 (inde-
pendent TTL inputs) and Table 6-2 is for the
MIC4607-2 (PWM inputs) that details the “first on” pri-
ority as well as the failsafe delay (tSWTO).
TABLE 6-1:
MIC4607-1 TRUTH TABLE
V
SWTH threshold, the xLO pin will be forced high after
xLI
xHI
xLO
xHO
Comments
a short delay (tSWTO), ensuring proper operation.
0
0
0
0
Both outputs off.
The internal logic circuits also ensure a “first on” priority
at the inputs. If the xHO output is high, the xLI pin is
inhibited. A high signal or noise glitch on the xLI pin has
no effect on the xHO or xLO outputs until the xHI pin
goes low. Similarly, xLO being high holds xHO low until
xLI and xLO are low.
xHO will not go HIGH
until xLO falls below
1.9V.
0
1
1
1
0
1
0
1
X
1
0
X
xLO will be delayed an
extra 250 ns if xHS
never falls below 2.2V.
Fast propagation delay between the input and output
drive waveform is desirable. It improves overcurrent
protection by decreasing the response time between
the control signal and the MOSFET gate drive. Minimiz-
ing propagation delay also minimizes phase shift errors
in power supplies with wide bandwidth control loops.
First ON stays on until
input of same goes
LOW.
TABLE 6-2:
xPWM
MIC4607-2 TRUTH TABLE
Care must be taken to ensure that the input signal
pulse width is greater than the minimum specified pulse
width. An input signal that is less than the minimum
pulse width can result in no output pulse or an output
pulse whose width is significantly less than the input.
xLO
xHO
Comments
xLO will be delayed an
extra 250 ns if xHS
never falls below 2.2V.
0
1
1
0
The maximum duty cycle (ratio of high-side on-time to
switching period) is determined by the time required for
the CB capacitor to charge during the off-time. Ade-
quate time must be allowed for the CB capacitor to
charge up before the high-side driver is turned back on.
xHO will not go HIGH
until xLO falls below
1.9V.
0
1
Although the adaptive dead-time circuit in the MIC4607
prevents the driver from turning both MOSFETs on at
the same time, other factors outside of the
anti-shoot-through circuit’s control can cause
shoot-through. Other factors include ringing on the gate
drive node and capacitive coupling of the switching
node voltage on the gate of the low-side MOSFET.
6.2
HS Node Clamp
A resistor/diode clamp between the switching node and
the HS pin is necessary to clamp large negative
glitches or pulses on the HS pin.
Figure 6-5 shows the Phase A section high-side and
low-side MOSFETs connected to one phase of the
three phase motor. There is a brief period of time (dead
time) between switching to prevent both MOSFETs
from being on at the same time. When the high-side
MOSFET is conducting during the on-time state, cur-
rent flows into the motor. After the high-side MOSFET
turns off, but before the low-side MOSFET turns on,
current from the motor flows through the body diode in
parallel with the low-side MOSFET. Depending upon
the turn-on time of the body diode, the motor current,
and circuit parasitics, the initial negative voltage on the
switch node can be several volts or more. The forward
voltage drop of the body diode can be several volts,
depending on the body diode characteristics and motor
current.
The scope photo in Figure 6-4 shows the dead time
(<20 ns) between the high- and low-side MOSFET
transitions as the low-side driver switches off while the
high-side driver transitions from off to on.
Even though the HS pin is rated for negative voltage, it
is good practice to clamp the negative voltage on the
HS pin with a resistor and possibly a diode to prevent
excessive negative voltage from damaging the driver.
Depending upon the application and amount of nega-
tive voltage on the switch node, a 3Ω resistor is recom-
FIGURE 6-4:
(LOW) to HO (HIGH).
Adaptive Dead-Time LO
DS20005610A-page 24
2016 Microchip Technology Inc.
MIC4607
mended. If the HS pin voltage exceeds 0.7V, a diode
between the xHS pin and ground is recommended. The
diode reverse voltage rating must be greater than the
high-voltage input supply (VIN). Larger values of resis-
tance can be used if necessary.
The average power dissipated by the forward voltage
drop of the diode equals:
EQUATION 6-2:
PdiodeFWD = IFAVE V F
Where:
Adding a series resistor in the switch node limits the
peak high-side driver current during turn-off, which
affects the switching speed of the high-side driver. The
resistor in series with the HO pin may be reduced to
help compensate for the extra HS pin resistance.
VF
Diode forward voltage drop.
There are three phases in the MIC4607. The power dis-
sipation for each of the bootstrap diodes must be calcu-
lated and summed to obtain the total bootstrap diode
power dissipation for the package.
DBST
VIN
CB
AHB
VDD
CVDD
The value of VF should be taken at the peak current
through the diode; however, this current is difficult to
calculate because of differences in source imped-
ances. The peak current can either be measured or the
value of VF at the average current can be used, which
will yield a good approximation of diode power dissipa-
tion.
RG
AHI Level
AHO
shift
RHS
VNEG
AHS
Phase
A
3Ω
DCLAMP
ALI
ALO
M
RG
MIC4607
Phases
B&C
VSS
The reverse leakage current of the internal bootstrap
diode is typically 3 μA at a reverse voltage of 85V at
125°C. Power dissipation due to reverse leakage is typ-
ically much less than 1 mW and can be ignored.
FIGURE 6-5:
Negative HS Pin Voltage.
An optional external bootstrap diode may be used
instead of the internal diode (Figure 6-6). An external
diode may be useful if high gate charge MOSFETs are
being driven and the power dissipation of the internal
diode is contributing to excessive die temperatures.
The voltage drop of the external diode must be less
than the internal diode for this option to work. The
reverse voltage across the diode will be equal to the
input voltage minus the VDD supply voltage. The above
equations can be used to calculate power dissipation in
the external diode; however, if the external diode has
significant reverse leakage current, the power dissi-
pated in that diode due to reverse leakage can be cal-
culated with the formula in Equation 6-3:
6.3
Power Dissipation Considerations
Power dissipation in the driver can be separated into
three areas:
• Internal diode dissipation in the bootstrap circuit
• Internal driver dissipation
• Quiescent current dissipation used to supply the
internal logic and control functions.
6.4
Bootstrap Circuit Power
Dissipation
Power dissipation of the internal bootstrap diode pri-
marily comes from the average charging current of the
bootstrap capacitor (CB) multiplied by the forward volt-
age drop of the diode. Secondary sources of diode
power dissipation are the reverse leakage current and
reverse recovery effects of the diode.
EQUATION 6-3:
PdiodeREV = IR V REV 1 – D
Where:
The average current drawn by repeated charging of the
high-side MOSFET is calculated by Equation 6-1.
IR
VREV Diode reverse voltage.
Duty cycle = tON × fS.
Reverse current flow at VREV and TJ.
D
EQUATION 6-1:
IFAVE = QGATE f S
Where:
The on-time is the time the high-side switch is conduct-
ing. In most topologies, the diode is reverse biased
during the switching cycle off-time.
QGATE
fS
Total gate charge at VHB – VHS
.
Gate drive switching frequency.
2016 Microchip Technology Inc.
DS20005610A-page 25
MIC4607
MOSFET’s specifications. The ESR of capacitor CB
and the resistance of the connecting etch can be
ignored since they are much less than RON and
RG_FET
.
The effective capacitances of CGD and CGS are difficult
to calculate because they vary non-linearly with ID,
VGS, and VDS. Fortunately, most power MOSFET spec-
ifications include a typical graph of total gate charge
versus VGS. Figure 6-8 shows a typical gate charge
curve for an arbitrary power MOSFET. This chart
shows that for a gate voltage of 10V, the MOSFET
requires about 23.5 nC of charge. The energy dissi-
pated by the resistive components of the gate drive cir-
cuit during turn-on is calculated as:
EQUATION 6-4:
2
1
2
E = -- CISS V GS
Where:
FIGURE 6-6:
Optional External Bootstrap
CISS Total gate capacitance of the MOSFET.
Diode.
but
6.5
Gate Driver Power Dissipation
EQUATION 6-5:
Power dissipation in the output driver stage is mainly
caused by charging and discharging the gate to source
and gate to drain capacitance of the external MOSFET.
Figure 6-7 shows a simplified equivalent circuit of the
MIC4607 driving an external high-side MOSFET.
Q = C V
so,
EQUATION 6-6:
1
E = -- QG V GS
2
FIGURE 6-7:
MIC4607 Driving an
External High-Side MOSFET.
6.5.1 DISSIPATION DURING THE
EXTERNAL MOSFET TURN-ON
Energy from capacitor CB is used to charge up the input
capacitance of the MOSFET (CGD and CGS). The
energy delivered to the MOSFET is dissipated in the
three resistive components, RON, RG and RG_FET. RON
is the on resistance of the upper driver MOSFET in the
MIC4607. RG is the series resistor (if any) between the
driver and the MOSFET. RG_FET is the gate resistance
of the MOSFET and is typically listed in the power
FIGURE 6-8:
Typical Gate Charge vs.
V
.
GS
DS20005610A-page 26
2016 Microchip Technology Inc.
MIC4607
The same energy is dissipated by ROFF, RG, and
RG_FET when the driver IC turns the MOSFET off.
Assuming RON is approximately equal to ROFF, the total
energy and power dissipated by the resistive drive ele-
ments is:
The power dissipated in the driver equals the ratio of
RON and ROFF to the external resistive losses in RG
and RG_FET. Letting RON = ROFF, the power dissipated
in the driver due to driving the external MOSFET is:
EQUATION 6-11:
EQUATION 6-7:
RON
PdissDRIVER = PDRIVER -------------------------------------------------
RON + RG + RG_FET
EDRIVER = QG V GS
and
There are six MOSFETs driven by the MIC4607. The
power dissipation for each of the drivers must be calcu-
lated and summed to obtain the total driver diode power
dissipation for the package.
EQUATION 6-8:
PDRIVER = QG V GS f S
In some cases, the high-side FET of one phase may be
pulsed at a frequency, fS, while the low-side FET of the
other phase is kept continuously on. Since the MOS-
FET gate is capacitive, there is no driver power if the
FET is not switched. The operation of all driver outputs
must be considered to accurately calculate power dis-
sipation.
6.6
Supply Current Power Dissipation
Power is dissipated in the input and control sections of
the MIC4607, even if there is no external load. Current
is still drawn from the VDD and HB pins for the internal
circuitry, the level shifting circuitry, and shoot-through
current in the output drivers. The VDD and VHB currents
are proportional to operating frequency and the VDD
and VHB voltages. The Typical Performance Curves
show how supply current varies with switching fre-
quency and supply voltage.
The die temperature can be calculated after the total
power dissipation is known.
EQUATION 6-12:
T J = T A + PdissTOTAL JA
The power dissipated by the MIC4607 due to supply
current is:
Where:
EQUATION 6-9:
TA = Maximum ambient temperature.
TJ = Junction temperature (°C).
PdissSUPPLY = V DD IDD + V HB IHB
PdissTOTAL = Total power dissipation of the MIC4607.
ΘJA = Thermal resistance from junction to ambient air.
Values for IDD and IHB are found in the EC table and the
typical characteristics graphs.
6.8
Other Timing Considerations
6.7
Total Power Dissipation and
Thermal Considerations
Make sure the input signal pulse width is greater than
the minimum specified pulse width. An input signal that
is less than the minimum pulse width may result in no
output pulse or an output pulse whose width is signifi-
cantly less than the input.
Total power dissipation in the MIC4607 is equal to the
power dissipation caused by driving the external MOS-
FETs, the supply currents and the internal bootstrap
diodes.
The maximum duty cycle (ratio of high-side on-time to
switching period) is controlled by the minimum pulse
width of the low side and by the time required for the CB
capacitor to charge during the off-time. Adequate time
must be allowed for the CB capacitor to charge up
before the high-side driver is turned on.
EQUATION 6-10:
PdissTOTAL = PdissSUPPLY + PdissDRIVE + PDIODE
Where:
EDRIVER = Energy dissipated per switching cycle.
PDRIVER = Power dissipated per switching cycle.
6.9
Decoupling and Bootstrap
Capacitor Selection
QG = Total gate charge at VGS
.
Decoupling capacitors are required for both the
low-side (VDD) and high-side (xHB) supply pins. These
capacitors supply the charge necessary to drive the
external MOSFETs and also minimize the voltage rip-
ple on these pins. The capacitor from xHB to xHS has
VGS = Gate-to-source voltage on the MOSFET.
fS = Switching frequency of the gate drive circuit.
2016 Microchip Technology Inc.
DS20005610A-page 27
MIC4607
two functions: it provides decoupling for the high-side
circuitry and also provides current to the high-side cir-
cuit while the high-side external MOSFET is on.
Ceramic capacitors are recommended because of their
low impedance and small size. Z5U type ceramic
capacitor dielectrics are not recommended because of
the large change in capacitance over temperature and
voltage. A minimum value of 0.1 μF is required for CB
(xHB to xHS capacitors) and 1 μF for the VDD capacitor,
regardless of the MOSFETs being driven. Larger MOS-
FETs may require larger capacitance values for proper
operation. The voltage rating of the capacitors depends
on the supply voltage, ambient temperature and the
voltage derating used for reliability. 25V rated X5R or
X7R ceramic capacitors are recommended for most
applications. The minimum capacitance value should
be increased if low voltage capacitors are used
because even good quality dielectric capacitors, such
as X5R, will lose 40% to 70% of their capacitance value
at the rated voltage.
Where:
IHBS = Maximum xHB pin leakage current.
tON = maximum high-side FET on-time.
The larger value of CB from Equation 6-13 or
Equation 6-14 should be used.
6.10 Grounding, Component
Placement and Circuit Layout
Nanosecond switching speeds and ampere peak cur-
rents in and around the MIC4607 driver require proper
placement and trace routing of all components.
Improper placement may cause degraded noise immu-
nity, false switching, excessive ringing, or circuit
latch-up.
Figure 6-9 shows the critical current paths of the high-
and low-side driver when their outputs go high and turn
on the external MOSFETs. It also helps demonstrate
the need for a low impedance ground plane. Charge
needed to turn-on the MOSFET gates comes from the
decoupling capacitors CVDD and CB. Current in the
low-side gate driver flows from CVDD through the inter-
nal driver, into the MOSFET gate, and out the source.
The return connection back to the decoupling capacitor
is made through the ground plane. Any inductance or
resistance in the ground return path causes a voltage
spike or ringing to appear on the source of the MOS-
FET. This voltage works against the gate drive voltage
and can either slow down or turn off the MOSFET
during the period when it should be turned on.
Placement of the decoupling capacitors is critical. The
bypass capacitor for VDD should be placed as close as
possible between the VDD and VSS pins. The bypass
capacitor (CB) for the xHB supply pin must be located
as close as possible between the xHB and xHS pins.
The etch connections must be short, wide, and direct.
The use of a ground plane to minimize connection
impedance is recommended. Refer to the “Grounding,
Component Placement and Circuit Layout” sub-section
for more information.
The voltage on the bootstrap capacitor drops each time
it delivers charge to turn on the MOSFET. The voltage
drop depends on the gate charge required by the MOS-
FET. Most MOSFET specifications specify gate charge
versus VGS voltage. Based on this information and a
recommended ΔVHB of less than 0.1V, the minimum
value of bootstrap capacitance is calculated as:
Current in the high-side driver is sourced from capaci-
tor CB and flows into the xHB pin and out the xHO pin,
into the gate of the high side MOSFET. The return path
for the current is from the source of the MOSFET and
back to capacitor CB. The high-side circuit return path
usually does not have a low-impedance ground plane
so the etch connections in this critical path should be
short and wide to minimize parasitic inductance. As
with the low-side circuit, impedance between the MOS-
FET source and the decoupling capacitor causes neg-
ative voltage feedback that fights the turn-on of the
MOSFET.
EQUATION 6-13:
QGATE
CB ----------------
V HB
Where:
QGATE = Total gate charge at VHB
.
It is important to note that capacitor CB must be placed
close to the xHB and xHS pins. This capacitor not only
provides all the energy for turn-on but it must also keep
xHB pin noise and ripple low for proper operation of the
high-side drive circuitry.
ΔVHB = Voltage drop at the HB pin.
If the high-side MOSFET is not switched but held in an
on state, the voltage in the bootstrap capacitor will drop
due to leakage current that flows from the HB pin to
ground. This current is specified in the Electrical Char-
acteristics table. In this case, the value of CB is calcu-
lated as:
EQUATION 6-14:
I
tON
CB ----H---B---S-----------------
V HB
DS20005610A-page 28
2016 Microchip Technology Inc.
MIC4607
FIGURE 6-9:
Turn-On Current Paths.
Figure 6-10 shows the critical current paths when the
driver outputs go low and turn off the external MOS-
FETs. Short, low-impedance connections are important
during turn-off for the same reasons given in the
turn-on explanation. Current flowing through the inter-
nal diode replenishes charge in the bootstrap capacitor,
CB.
FIGURE 6-10:
Turn-Off Current Paths.
2016 Microchip Technology Inc.
DS20005610A-page 29
MIC4607
Figure 7-2 is a block diagram for a 24V motor drive
application. The regulated 24V bus allows the use of
lower input voltage LDOs, such as the MIC5239-3.3
and MIC5234. This circuit configuration can be used in
industrial applications.
7.0
MOTOR APPLICATIONS
Figure 7-1 illustrates an automotive motor application.
The 12V battery input voltage can see peaks as high as
60V during a load dump event. The 85V-rated MIC4607
drives six MOSFETs that provide power to the BLDC
motor.
Figure 7-3 illustrates an off-line motor application. Add-
ing an off-line power supply to the front end allow the
MIC4607 to be used in applications such as blenders
and other small white goods as well as ceiling fan appli-
cations. The circuit consists of an MIC38C44 based
AC/DC power supply, that is used to generate 24 VDC
to power a BLDC motor. The MIC4607 drives the six
MOSFETs that provide power to the motor.
A current-sense resistor senses the peak motor cur-
rent. The voltage across this resistor is monitored by
the OC circuit in the MIC4607, which provides overcur-
rent protection for the application. The 120V rating of
the MIC5281 series of LDOs provide input surge volt-
age protection, while regulating the battery voltage
down to 3.3V and 10V – 12V for the microcontroller and
gate driver respectively. This circuit can also be used
for power tool applications, where the battery voltage
carries high-voltage peaks and surges.
The MIC4607 can also be used in low and mid-voltage
inverter applications. Figure 7-4 shows how power
generated by a spinning (or breaking) motor can be
used to generate DC power to a load or provide power
for battery-charging applications.
FIGURE 7-1:
Automotive or Power Tool Application.
DS20005610A-page 30
2016 Microchip Technology Inc.
MIC4607
FIGURE 7-2:
Industrial Motor Driver.
FIGURE 7-3:
Blender Motor Drive Application Diagram.
2016 Microchip Technology Inc.
DS20005610A-page 31
MIC4607
FIGURE 7-4:
Three-Phase Synchronous Rectification.
DS20005610A-page 32
2016 Microchip Technology Inc.
MIC4607
8.0
8.1
PACKAGING INFORMATION
Package Marking Information
24-lead VQFN*
Example
XXXX-X
YYWW
4607-1
1612
28-lead TSSOP*
Example
XXXX
-XXXX
4607
-2YTS
1612
Legend: XX...X Product code or customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
*
e
3
)
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) symbol may not be to scale.
2016 Microchip Technology Inc.
DS20005610A-page 33
MIC4607
28-Lead QFN 4 mm x 5 mm Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
28-Lead TSSOP 5.0 mm x 4.4 mm Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20005610A-page 34
2016 Microchip Technology Inc.
MIC4607
2016 Microchip Technology Inc.
DS20005610A-page 35
MIC4607
DS20005610A-page 36
2016 Microchip Technology Inc.
MIC4607
APPENDIX A: REVISION HISTORY
Revision A (August 2016)
• Converted Micrel document DSC2875 to Micro-
chip data sheet template DS20005610A.
• Minor text changes throughout.
2016 Microchip Technology Inc.
DS20005610A-page 37
MIC4607
NOTES:
DS20005610A-page 38
2016 Microchip Technology Inc.
MIC4607
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
MIC4607-1YML-T5:
X
PART NO.
Device
X
XX
–
XX
a)
b)
c)
d)
e)
f)
85V,
Three-Phase
Input
Option
Junction
Temperature
Range
Package
Media
Type
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs,
Device:
MIC4607:
85V, Three-Phase MOSFET Driver with
Adaptive Dead-Time, Anti-Shoot-Through
and Overcurrent Protection
–40°C to +125°C Tem-
perature Range, RoHS
Compliant,
VQFN, 500/Reel.
28-Pin
MIC4607-1YML-TR: 85V,
Three-Phase
Input Option:
1
2
= Dual Inputs
= Single PWM Input
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs, –
40°C to +125°C Temp.
Range, RoHS Compli-
ant, 28-Pin VQFN,
5000/Reel.
Temperature Range:
Package:
Y
= -40C to +125C (RoHS Compliant)
ML = 28-lead 4x5 QFN
TS 28-lead 5.0x4.4 TSSOP
=
MIC4607-1YTS:
85V,
Three-Phase
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs, –
40°C to +125°C Temp.
Range, RoHS Compli-
ant, 28-Pin TSSOP, 50/
Tube
Media Type:
T5 = 500/Reel
TR = 5000/Reel VQFN (ML) Package
= 2500/Reel TSSOP (TS) Package
Blank= 50/Tube TSSOP (TS) Package
MIC4607-1YTS-T5:
85V,
Three-Phase
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs, –
40°C to +125°C Temp.
Range, RoHS Compli-
ant, 28-Pin TSSOP,
500/Reel
MIC4607-1YTS-TR: 85V,
Three-Phase
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs, –
40°C to +125°C Temp.
Range, RoHS Compli-
ant, 28-Pin TSSOP,
2500/Reel.
MIC4607-2YML-T5:
85V,
Three-Phase
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Single PWM
Input, –40°C to +125°C
Temp. Range, RoHS
Compliant,
TSSOP, 500/Reel.
MIC4607-2YML-TR: 85V, Three-Phase
28-Pin
g)
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Single PWM
Input, –40°C to +125°C
Temp. Range, RoHS
Compliant,
28-Pin
TSSOP, 2500/Reel.
h)
MIC4607-2YTS:
85V,
Three-Phase
MOSFET Driver with
Adaptive Dead-Time,
Anti-Shoot-Through
and Overcurrent Pro-
tection, Dual Inputs, –
40°C to +125°C Temp.
Range, RoHS Compli-
ant, 28-Pin TSSOP, 50/
2016 Microchip Technology Inc.
DS20005610A-page 39
MIC4607
NOTES:
DS20005610A-page 40
2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate,
dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq,
KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST,
MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo,
RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company,
ETHERSYNCH, Hyper Speed Control, HyperLight Load,
IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut,
BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, Dynamic Average Matching, DAM, ECAN,
EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip
Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker,
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SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2016, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0899-4
2016 Microchip Technology Inc.
DS00005610A-page 41
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Asia Pacific Office
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
Hong Kong
Tel: 852-2943-5100
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Web Address:
www.microchip.com
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Germany - Dusseldorf
Tel: 49-2129-3766400
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
Germany - Karlsruhe
Tel: 49-721-625370
India - Pune
Tel: 91-20-3019-1500
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Austin, TX
Tel: 512-257-3370
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Boston
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
China - Dongguan
Tel: 86-769-8702-9880
Italy - Venice
Tel: 39-049-7625286
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Guangzhou
Tel: 86-20-8755-8029
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
China - Hangzhou
Tel: 86-571-8792-8115
Fax: 86-571-8792-8116
Korea - Seoul
Cleveland
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Poland - Warsaw
Tel: 48-22-3325737
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Sweden - Stockholm
Tel: 46-8-5090-4654
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Detroit
Novi, MI
Tel: 248-848-4000
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Houston, TX
Tel: 281-894-5983
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Los Angeles
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Taiwan - Kaohsiung
Tel: 886-7-213-7828
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
06/23/16
DS00005610A-page 42
2016 Microchip Technology Inc.
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