PIC32MX795F512LT-80I/BG

更新时间:2025-07-12 20:26:50
品牌:MICROCHIP
描述:IC MCU 32BIT 512KB FLASH 121BGA

PIC32MX795F512LT-80I/BG 概述

IC MCU 32BIT 512KB FLASH 121BGA 微控制器 微控制器

PIC32MX795F512LT-80I/BG 规格参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:BGA包装说明:10 X 10 MM, 1.10 MM HEIGHT, LEAD FREE, PLASTIC, XBGA-121
针数:121Reach Compliance Code:compliant
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
Factory Lead Time:23 weeks风险等级:5.2
具有ADC:YES地址总线宽度:
位大小:32CPU系列:PIC
最大时钟频率:50 MHzDAC 通道:NO
DMA 通道:YES外部数据总线宽度:
JESD-30 代码:S-PBGA-B121长度:10 mm
湿度敏感等级:3I/O 线路数量:83
端子数量:121最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA121,11X11,32封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:2.5/3.3 V认证状态:Not Qualified
RAM(字节):131072ROM(单词):524288
ROM可编程性:FLASH座面最大高度:1.2 mm
速度:80 MHz子类别:Microcontrollers
最大压摆率:98 mA最大供电电压:3.6 V
最小供电电压:2.3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Copper/Silver (Sn/Cu/Ag)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:10 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER, RISC
Base Number Matches:1

PIC32MX795F512LT-80I/BG 数据手册

通过下载PIC32MX795F512LT-80I/BG数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。

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PIC32MX6/7 family with embedded Ethernet  
controller – PHY support  
This document briefly explains how to add a new PHY to the MCHP TCPIP-BSD stack.  
Note: The same approach applies to the MCHP TCPIP stack.  
Table of Contents  
Supported PHYs  
How to add a new PHY  
Supported PHY’s  
The PIC32MX6-7 families with embedded Ethernet controller have support for external  
MII/RMII connected PHY’s. Currently we support:  
o
o
National DP83848 PHY.  
SMSC LAN 8700 PHY.  
Support for other PHY's will be added in the future.  
How to add a new PHY  
Microchip provides a PHY interface library that is being used as part of the MAC driver for the  
TCPIP stack.  
The basic concepts behind this PHY library are:  
1. Communication to the PHY is done using MIIM interface. For access to the external PHY  
registers over the MIIM interface the communication functions provided by the Ethernet  
Controller Peripheral Library are used (“..path\Microchip\MPLAB  
C32\pic32mx\include\peripheral\eth.h”).  
2. All PHYs support a standard set of registers with well known functionality. (As part of the  
IEEE 802.3 Clause 22).  
3. Few functions that are vendor specific have to be added for particular PHY’s.  
The functions that the current TCPIP stack MAC driver uses for communicating and configuring  
the external PHY are prototyped in  
“..install path\Microchip\Include\TCPIP-BSD\eth_phy.h”  
and implemented in the  
“..install path\Microchip\TCPIP-BSD\eth_phy\eth_phy.c”.  
To add support for a new PHY you have to add the implementation for the  
following  
4
functions (the prototypes of the functions are in  
“..install path\Microchip\Include\TCPIP-BSD\eth_phy.h”):  
1. extern unsigned int EthPhyMIIMAddress(void):  
a. does not take parameters;  
b. Should return the address the PHY responds to. Depends on  
the hardware design.  
Note: all PHY’s respond to address 0.  
c. Can be inlined/#defined  
2. extern unsigned int EthPhyMIIMClock(void):  
a. does not take parameters;  
b. Should return the maximum clock frequency that the PHY can  
use for the MIIM transactions.  
i. Most PHY’s should support 2 MHz.  
ii. National DP83848C supports 25 MHz, for example.  
c. Can be inlined/#defined  
3. extern eEthRes EthPhyConfigureMII(eEthPhyCfgFlags cFlags):  
a. This function should configure the PHY in one of MII/RMII  
operation modes.  
b. The relevant input flags are:  
i. ETH_PHY_CFG_RMII if RMII configuration is requested  
ii. ETH_PHY_CFG_MII if MII configuration is requested  
c. It should return:  
i. ETH_RES_OK for success  
ii. An error code if the requested configuration is not  
supported.  
4. extern eEthRes EthPhyConfigureMdix(eEthOpenFlags oFlags):  
a. The function should configure the MDIX mode for the PHY.  
b. The relevant input flags are:  
i. ETH_OPEN_MDIX_AUTO if auto MDIX is requested  
ii. else ETH_OPEN_MDIX_NORM/ETH_OPEN_MDIX_SWAP for  
normal/swap mode.  
c. It should return:  
i. ETH_RES_OK for success  
ii. An error code if the requested mode is not supported.  
Additional Notes:  
1. All functions in the PHY library are defined as weak. You can  
replace any of the functions with your own implementation if need  
arises. The function header in the “..install  
path\Microchip\Include\TCPIP-BSD\eth_phy.h” explains what  
input/output and behavior the respective function should have.  
2. Take a look in the “..install path\Microchip  
Solutions\Microchip\TCPIP-BSD\eth_phy\nat_dp83848c.c” or  
“..install path\Microchip Solutions\Microchip\TCPIP-  
BSD\eth_phy\smsc_8700.c” for an implementation example. Follow  
the same approach.  
3. All functions needed to access the PHY MIIM registers are part of  
the provided Ethernet library.  

PIC32MX795F512LT-80I/BG CAD模型

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PCB 封装图

3D模型

PIC32MX795F512LT-80I/BG 替代型号

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