PICHV540-20/SO [MICROCHIP]

8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, SOIC-18;


型号：	PICHV540-20/SO
厂家：	MICROCHIP
描述：	8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, SOIC-18 可编程只读存储器光电二极管
文件：	总36页 (文件大小：580K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PIC16HV540

Enhanced PIC16C54 EPROM-Based 8-Bit CMOS Microcontroller

With On-Chip Voltage Regulator

High-Performance RISC CPU:

Pin Conﬁgurations

Device

Pins I/O

18 12

EPROM RAM

512 25

PDIP, SOIC, Windowed CERDIP

PIC16HV540

RA1

• 1

RA2

RA3

• Only 33 single word instructions to learn

RA0

OSC1/CLKIN

OSC2/CLKOUT

VDD

T0CKI

MCLR/VPP

VSS

• All instructions are single cycle (200 ns) except for

program branches which are two-cycle

RB7

• Operating speed: DC - 20 MHz clock input

DC - 200 ns instruction cycle

RB0

RB6

RB1

RB5

RB2

• 12-bit wide instructions

RB4

RB3

• 8-bit wide data path

• Seven special function hardware registers

• Four-level deep hardware stack

SSOP

✯

• Direct, indirect and relative addressing modes for

data and instructions

RA2

•1

RA1

RA0

OSC1/CLKIN

OSC2/CLKOUT

RA3

T0CKI

MCLR/VPP

VSS

Peripheral Features:

• 8-bit real time clock/counter (TMR0) with 8-bit

programmable prescaler

VDD

RB7

RB6

RB5

RB4

VSS

RB0

RB1

• Power-On Reset (POR)

• Brown-Out Protection

RB2

RB3

✯

• Device Reset Timer (DRT) with short

RC-oscillator start up time

• Programmable Watchdog Timer (WDT) with its

own on-chip RC oscillator for reliable operation

CMOS Technology:

✯ • Selectable on-chip 3V/5V Regulator

• Low-power, high-speed CMOS EPROM

technology

• Sleep Timer

• 8 High Voltage I/O

✯ • 4 Regulated I/O

✯

• Fully static design

• Wake up from SLEEP on pin change

• Programmable code-protection

• Power saving SLEEP mode

• Wide-operating voltage range:

- 3.5V to 15V

• Temperature range:

• Selectable oscillator options:

- Commercial: 0°C to 70°C

- Industrial: -40°C to 85°C

• Low-power consumption

- < 2 mA typical @ 5V, 4 MHz

- 15 µA typical @ 3V, 32 kHz

- RC:

- XT:

- HS:

- LP:

Low-cost RC oscillator

Standard crystal/resonator

High speed crystal/resonator

Power saving, low frequency crystal

✯

• Glitch ﬁltering on MCLR and pin change inputs

- < 4.5 µA typical standby current @ 15V (with

WDT disabled), 0°C to 70°C

✯

= Enhanced Features

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 1

PIC16HV540

1.2

Enhanced Features

1.0

GENERAL DESCRIPTION

The PIC16HV540 from Microchip Technology is

1.2.1

REGULATED I/O PORTA INDEPENDENT

OF CORE REGULATOR

low-cost,

high-performance,

8-bit,

fully-static,

EPROM-based CMOS microcontroller. It is pin and soft-

ware compatible with the PIC16C5X family of devices. It

employs a RISC architecture with only 33 single word/sin-

gle cycle instructions. All instructions are single cycle

except for program branches which take two cycles. The

PIC16HV540 delivers performance an order of magnitude

higher than its competitors in the same price category.The

12-bit wide instructions are highly orthogonal resulting in

2:1 code compression over other 8-bit microcontrollers in

its class. The easy-to-use and easy-to-remember instruc-

tion set reduces development time signiﬁcantly.

PORTA I/O pads and OSC2 output are powered by the

regulated internal voltage VIO. A maximum of 10mA per

output is allowed, or a total of 40mA. The core itself is

powered from the independently regulated supply

VREG.

1.2.2

HIGH VOLTAGE I/O PORTB

All eight PORTB I/Os are high voltage I/O. The inputs

will tolerate input voltages as high as the VDD and out-

puts will swing from VSS to the VDD.The input threshold

voltages vary with supply voltage. (See DC character-

istics.)

The PIC16HV540 is the ﬁrst One-Time-Programmable

(OTP) microcontroller with an on-chip 3 Volt and 5 Volt reg-

ulator. This eliminates the need for an external regulator in

many applications powered from 9 Volt or 12 Volt batteries

or unregulated 6 Volt, 9 Volt or 12 Volt mains adapters.The

PIC16HV540 is ideally suited for applications that require

very low standby current at high voltages. These typically

require expensive low current regulators.

1.2.3

WAKE UP ON PIN CHANGE ON PORTB [0:3]

Four of the PORTB inputs latch the status of the pin at

the onset of sleep mode. A level change on the inputs

resets the device, implementing wake up on pin change

(via warm reset). The PC bit in the status register is

reset to indicate that a pin change caused the reset

condition. Any pin change (glitch insensitive) of the

opposite level of the initial value wakes up the device.

This option can be enabled/disabled in OPTION2 reg-

ister. (See OPTION2 register, Figure 4-3.)

The PIC16HV540 is equipped with special features that

reduce system cost and power requirements. The

Power-On Reset (POR) and Device Reset Timer (DRT)

eliminate the need for external reset circuitry.There are four

oscillator conﬁgurations to choose from, including the

power-saving LP (Low Power) oscillator, cost saving RC

oscillator, and XT and HS for crystal oscillators. Power sav-

ing SLEEP mode, Watchdog Timer and code protection

features improve system cost, power and reliability.

1.2.4

WAKE UP ON PIN CHANGE WITH A

SLOWLY-RISING VOLTAGE ON PORTB [7]

PORTB [7] also implements wake up from sleep, how-

ever this input is speciﬁcally adapted so that a slowly

rising voltage does not cause excessive power con-

sumption. This input can be used with external RC cir-

cuits for long sleep periods without using the internal

timer and prescaler. This option is also enabled/dis-

abled in OPTION2 register. (The enable/disable bit is

shared with the other 4 wake up inputs.) The new wake

up status bit in the status register is also shared with

the other four wake up inputs.

The UV erasable CERDIP packaged versions are ideal for

code development, while the cost-effective OTP versions are

suitable for production in any volume.The customer can take

full advantage of Microchip’s price leadership in OTP micro-

controllers while beneﬁting from the OTP’s ﬂexibility.

The PIC16HV540 will in future be supported by a

full-featured macro assembler, a software simulator, an

in-circuit emulator, a ‘C’ compiler, fuzzy logic support

tools, a low-cost development programmer, and a full fea-

tured programmer. All the tools are supported on IBM

PC and compatible machines. Functions that correspond

to the PIC16C54 (such as assembly and programming)

can utilize existing tools.

1.2.5

LOW-VOLTAGE (BROWN-OUT)

DETECTION

A low voltage (Brown-out) detect circuit optionally

resets the device at a voltage level higher than that at

which Brown-out events occur. The nominal trip volt-

ages are 3.1 Volt (for 5 Volt operation) and 2.2 Volt (for

3 Volt operation), respectively. The core remains in the

reset state as long as this condition holds (as if a MCLR

external reset was given). The Brown-out trip level is

user selectable, with built-in interlocks. The Brown-out

detector is disabled at power-up and is activated by

clearing the appropriate bit (BE) in OPTION2 register.

1.1

Applications

The PIC16HV540 ﬁts perfectly in low-power battery appli-

cations such as CO and smoke detection, toys, games,

security systems and automobile modules. The EPROM

technology makes customizing of application programs

(transmitter codes, receiver frequencies, etc.) extremely

fast and convenient. The small footprint package, for

through hole or surface mounting, make this microcontrol-

ler perfect for applications with space limitations.

Low-cost, low-power, high-performance, ease of use and

I/O ﬂexibility make the PIC16HV540 very versatile even in

areas where no microcontroller use has been considered

before (e.g., timer functions, replacement of “glue” logic in

larger systems, coprocessor applications).

1.2.6

INCREASED STACK DEPTH

The stack depth is 4 levels to allow modular program

implementation by using functions and subroutines.

DS40197A-page 2

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

1.2.7

ENHANCED WATCHDOG TIMER (WDT)

OPERATION

2.0

PIC16HV540 DEVICE

VARIETIES

The WDT is enabled by setting FUSE 2 in the conﬁguration

word. The WDT setting is latched and the fuse disabled

during SLEEP mode to reduce current consumption.

A variety of frequency ranges and packaging options

are available. When placing orders, please use the

PIC16HV540 Product Identiﬁcation System at the back

of this data sheet to specify the correct part number.

If the WDT is disabled by FUSE 2, it can be enabled/dis-

abled under program control using bit 4 in OPTION2

(SWE).The software WDT control is disabled at power-up.

2.1

UV Erasable Devices

The current consumption of the on-chip oscillator (used

for the watchdog, oscillator startup timer and sleep

timer) is less than 1µA (typical) at 3 Volt operation.

The UV erasable versions, offered in CERDIP pack-

ages, are optimal for prototype development and pilot

programs.

1.2.8

REDUCED EXTERNAL RC OSCILLATOR

STARTUP TIME

UV erasable devices can be programmed for any of the

four oscillator conﬁgurations. Microchip's PICSTART

and PRO MATE programmers both support program-

ming of the PIC16HV540. Third party programmers

also are available; refer to Literature Number DS00104

for a list of sources.

If the RC oscillator option is selected in the Conﬁgura-

tion word (FOSC1=1 and FOSCO=1) the oscillator

startup time is 1.0 ms nominal instead of 18 ms nomi-

nal. This is applicable after power-up (POR), either

WDT interrupt or wake-up, external reset on MCLR,

WPC (wake on pin change) and Brown-out.

2.2

One-Time-Programmable (OTP)

Devices

1.2.9

LOW-VOLTAGE OPERATION OF THE

ENTIRE CPU DURING SLEEP

The availability of OTP devices is especially useful for

customers expecting frequent code changes and

updates.

The voltage regulator can automatically lower the volt-

age to the core from 5 Volt to 3 Volt during sleep, result-

ing in reduced current consumption. This is an option

bit in OPTION2 register.

The OTP devices, packaged in plastic packages, per-

mit the user to program them once. In addition to the

program memory, the conﬁguration bits must be pro-

grammed.

1.2.10 GLITCH FILTERS ON WAKEUP PINS AND

MCLR

2.3

Quick-Turnaround-Production (QTP)

Devices

Glitch sensitive inputs for wakeup on pin change are ﬁl-

tered to reduce susceptibility to interference. A similar

ﬁlter reduces false reset on MCLR.

Microchip offers a QTP Programming Service for fac-

tory production orders. This service is made available

for users who choose not to program a medium to high

quantity of units and whose code patterns have stabi-

lized. The devices are identical to the OTP devices but

with all EPROM locations and conﬁguration bit options

already programmed by the factory. Certain code and

prototype veriﬁcation procedures apply before produc-

tion shipments are available. Please contact your

Microchip Technology sales ofﬁce for more details.

1.2.11 PROGRAMMABLE CLOCK GENERATOR

When used in RC mode the CLKOUT pin can be used

as a programmable clock output. The output is con-

nected to TMR0, bit 0 and by setting the prescaler,

clock out frequencies of CLKIN/8 to CLKIN/1024 can

be generated. The CLKOUT pin can also be used as a

general purpose output by modifying to TMR0, bit 0.

TABLE 1-1:

PIC16HV540 DEVICE

2.4

Serialized

Quick-Turnaround-Production

(SQTP) Devices

PIC16HV540

Clock

Maximum Frequency (MHz)

EPROM Program Memory

RAM Data Memory (bytes)

512

Memory

Microchip offers the unique programming service where

a few user-deﬁned locations in each device are pro-

grammed with different serial numbers. The serial num-

bers may be random, pseudo-random or sequential.

Peripherals Timer Module(s)

TMR0

Packages

I/O Pins

Voltage Range (Volts)

Number of Instructions

Packages

3.5V-15V

Serial programming allows each device to have a

unique number which can serve as an entry code,

password or ID number.

18-pin DIP

SOIC

20-pin SSOP

All PICmicro devices have Power-on Reset, selectable

WDT, selectable code protect and high I/O current capability.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 3

PIC16HV540

3.0

ARCHITECTURAL OVERVIEW

This section provides information on the architecture of the PIC16HV540. For information on operation of the periph-

erals, electrical speciﬁcations, etc., please refer to the PIC16C5X data sheet (DS30453).

FIGURE 3-1: PIC16HV540 BLOCK DIAGRAM

VDD

3V/5V

Regulator

VREG

RB7

RB3 : RB0

FILTER

BOD

RL/SL

(PIN CHANGE)

BL/BE

SWE (OPTION2 REGISTER)

T0CKI

WPC

9-11

OSC1 OSC2 MCLR

“OSC

CONFIGURATION WORD

9-11

STACK1

STACK 2

STACK3

STACK4

EPROM

“DISABLE”

512 X 12

SELECT”

WATCH-

DOG

“CODE

OSCILLATOR/

TIMING &

CONTROL

PROTECT”

INSTRUCTION

WDT

TIME

OUT

CLKOUT

WDT/TMR0

PRESCALER

“SLEEP”

INSTRUCTION

DECODER

“OPTION”

OPTION2

OPTION

DIRECT ADDRESS

“TRIS 7”

FROM W

GENERAL

PURPOSE

FILE

DIRECT RAM

ADDRESS

5-7

(SRAM)

25 Bytes

STATUS

TMR0

FSR

DATA BUS

ALU

FROM W

“TRIS 5”

“TRIS 6”

TRISB PORT

TRISA PORTA

VIO

RA3:RA0

3V/5V

Regulator

HIGH VOLTAGE

TRANSLATION

RB7:RB0

DS40197A-page 4

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

TABLE 3-1:

Name

PINOUT DESCRIPTION - PIC16HV540

DIP, SOIC SSOP I/O/P Input

Description

No.

No. Type Levels

RA0

RA1

RA2

RA3

I/O

TTL

Independently regulated Bi-directional I/O port — VIO

Wake up on

pin change.

RB0

RB1

RB2

RB3

RB4

RB5

RB6

RB7

I/O

TTL

High-voltage Bi-directional I/O port.

Sourced from VDD.

Wake up on SLOW

rising pin change.

T0CKI

Clock input to Timer 0. Must be tied to VSS or VDD, if not in

use, to reduce current consumption.

MCLR/VPP

Master clear (reset) input/programming voltage input. This

pin is an active low reset to the device. Voltage on the

MCLR/VPP pin must not exceed VDD to avoid unintended

entering of programming mode.

OSC1/CLKIN

—

Oscillator crystal input/external clock source input.

OSC2/CLKOUT

Oscillator crystal output. Connects to crystal or resonator in

crystal oscillator mode. In RC mode, OSC2 pin outputs

CLKOUT which has 1/4 the frequency of OSC1, and denotes

the instruction cycle rate.

VDD

VSS

15,16

5,6

—

Positive supply.

Ground reference.

Legend: I = input, O = output, I/O = input/output,

P = power, — = Not Used, TTL = TTL input,

ST = Schmitt Trigger input

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 5

PIC16HV540

FIGURE 4-2: PIC16HV540 REGISTER FILE

MAP

4.0

MEMORY ORGANIZATION

FIGURE 4-1: PIC16HV540 PROGRAM

MEMORY MAP AND STACK

File Address

INDF⁽¹⁾

00h

PC<8:0>

TMR0

PCL

01h

02h

03h

04h

05h

06h

07h

08h

CALL, RETLW

Stack Level 1

Stack Level 2

Stack Level 3

Stack Level 4

STATUS

FSR

PORTA

PORTB

TRISA

TRISB

000h

OPTION2

On-chip

Program

Memory

0FFh

100h

General

Purpose

Registers

0Fh

10h

Reset Vector

1FFh

1Fh

Note 1: Not a physical register.

TABLE 4-1:

SPECIAL FUNCTION REGISTER SUMMARY

Value on

Power-On

Reset

Value on

MCLR and

WDT Reset

Address

Name

TRIS

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

N/A

I/O control registers (TRISA, TRISB)

1111 1111 1111 1111

OPTION

Contains control bits to conﬁgure Timer0 and Timer0/WDT prescaler

--11 1111 --11 1111

xx11 1111 xx11 1111

OPTION2

Contains control bits to conﬁgure pin changes, software enabled WDT,

regulation and brown-out

00h

01h

INDF

Uses contents of FSR to address data memory (not a physical register)

8-bit real-time clock/counter

xxxx xxxx uuuu uuuu

TMR0

(1)

02h

PCL

Low order 8 bits of PC

1111 1111 1111 1111

1001 1xxx 100q quuu

1xxx xxxx 1uuu uuuu

---- xxxx ---- uuuu

xxxx xxxx uuuu uuuu

03h

04h

05h

06h

STATUS

FSR

PCF

PA1

PA0

Indirect data memory address pointer

PORTA

PORTB

—

RA3

RB3

RA2

RB2

RA1

RB1

RA0

RB0

RB7

RB6

RB5

RB4

Legend: Shaded boxes = unimplemented or unused, –= unimplemented, read as '0' (if applicable)

x= unknown, u= unchanged, q= value depends on condition.

Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.5 of the PIC16C5X data sheet (DS30453)

for an explanation of how to access these bits.

2: File address 07h is a general purpose register on the PIC16HV540.

3: PCF This bit is set to 1 after power up-reset (POR) or sleep command.

4: PCF This bit is set to 0 after a wake up on pin change event.

DS40197A-page 6

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

Figure 4-3:

OPTION2 REGISTER (TRIS 07h)

U-0

W-1

WPC

W-1

SWE

W-1

W = Writable bit

U = Unimplemented bit

-n = Value at POR reset

bit7

bit 7-6: Unimplemented.

bit 5:

bit 4:

bit 3:

bit 2:

bit 1:

bit 0:

WPC: Wake up on pin change

1 = Disabled

0 = Enabled

SWE: Software WDT enable

1 = Disabled

0 = Enabled

RL: Regulated voltage level select bit

1 = 5 Volt

0 = 3 Volt

SL: Sleep voltage level select bit

1 = RL bit setting

0 = 3 Volt

BL: Brown-out voltage level select bit

1 = RL bit setting, but SL during sleep

0 = 3 Volt

BE: Brown-out enabled

1 = Disabled

0 = Enabled

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 7

PIC16HV540

All instructions are executed within one single

instruction cycle, unless a conditional test is true or the

5.0

INSTRUCTION SET SUMMARY

Each PIC16HV540 instruction is a 12-bit word divided into

an OPCODE, which speciﬁes the instruction type, and one

or more operands which further specify the operation of

the instruction. The PIC16HV540 instruction set summary

in Table 5-2 groups the instructions into byte-oriented,

bit-oriented, and literal and control operations. Table 5-1

shows the opcode ﬁeld descriptions.

program counter is changed as

a result of an

instruction. In this case, the execution takes two

instruction cycles. One instruction cycle consists of

four oscillator periods. Thus, for an oscillator frequency

of 4 MHz, the normal instruction execution time is 1 µs.

If a conditional test is true or the program counter is

changed as a result of an instruction, the instruction

execution time is 2 µs.

For byte-oriented instructions, 'f' represents a ﬁle register

designator and 'd' represents a destination designator.The

ﬁle register designator is used to specify which one of the

32 ﬁle registers is to be used by the instruction.

Figure 5-1 shows the three general formats that the

instructions can have. All examples in the ﬁgure use the

following format to represent a hexadecimal number:

The destination designator speciﬁes where the result

of the operation is to be placed. If 'd' is '0', the result is

placed in the W register. If 'd' is '1', the result is placed

in the ﬁle register speciﬁed in the instruction.

0xhhh

where 'h' signiﬁes a hexadecimal digit.

FIGURE 5-1: GENERAL FORMAT FOR

INSTRUCTIONS

For bit-oriented instructions, 'b' represents a bit ﬁeld

designator which selects the number of the bit affected

by the operation, while 'f' represents the number of the

ﬁle in which the bit is located.

Byte-oriented file register operations

OPCODE

f (FILE #)

For literal and control operations, 'k' represents an

8 or 9-bit constant or literal value.

d = 0 for destination W

d = 1 for destination f

f = 5-bit file register address

Bit-oriented file register operations

11 8 7

b (BIT #)

TABLE 5-1:

OPCODE FIELD

DESCRIPTIONS

Field

Description

OPCODE

f (FILE #)

Working register (accumulator)

b = 3-bit bit address

f = 5-bit file register address

Bit address within an 8-bit ﬁle register

Literal ﬁeld, constant data or label

Literal and control operations (except GOTO)

Don't care location (= 0 or 1)

The assembler will generate code with x = 0. It is

the recommended form of use for compatibility

with all Microchip software tools.

OPCODE

k (literal)

k = 8-bit immediate value

Literal and control operations - GOTOinstruction

11 0

Destination select;

d = 0 (store result in W)

d = 1 (store result in ﬁle register 'f')

Default is d = 1

OPCODE

k (literal)

label Label name

TOS

Top of Stack

k = 9-bit immediate value

Program Counter

Watchdog Timer Counter

Time-Out bit

WDT

Power-Down bit

Destination, either the W register or the speciﬁed

dest

[ ]

( )

→

Options

Contents

Assigned to

< >

In the set of

italics

User deﬁned term (font is courier)

DS40197A-page 8

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

TABLE 5-2:

INSTRUCTION SET SUMMARY

Description

12-Bit Opcode

Mnemonic,

Operands

Status

Cycles MSb

LSb Affected Notes

0001 11df ffff

0001 01df ffff

0000 011f ffff

0000 0100 0000

0010 01df ffff

0000 11df ffff

C,DC,Z 1,2,4

Add W and f

AND W with f

Clear f

Clear W

Complement f

Decrement f

Decrement f, Skip if 0

Increment f

Increment f, Skip if 0

Inclusive OR W with f

Move f

Move W to f

No Operation

Rotate left f through Carry

Rotate right f through Carry

Subtract W from f

Swap f

ADDWF

ANDWF

CLRF

CLRW

COMF

DECF

DECFSZ

INCF

INCFSZ

IORWF

MOVF

MOVWF

NOP

f,d

2,4

–

f, d

None

2,4

1,4

1(2) 0010 11df ffff

0010 10df ffff

1(2) 0011 11df ffff

0001 00df ffff

0010 00df ffff

0000 001f ffff

0000 0000 0000

0011 01df ffff

0011 00df ffff

0000 10df ffff

0011 10df ffff

0001 10df ffff

–

2,4

RLF

RRF

SUBWF

SWAPF

XORWF

f, d

C,DC,Z 1,2,4

None

2,4

Exclusive OR W with f

BIT-ORIENTED FILE REGISTER OPERATIONS

0100 bbbf ffff

0101 bbbf ffff

None

2,4

Bit Clear f

Bit Set f

Bit Test f, Skip if Clear

Bit Test f, Skip if Set

BCF

BSF

BTFSC

BTFSS

f, b

1 (2) 0110 bbbf ffff

1 (2) 0111 bbbf ffff

LITERAL AND CONTROL OPERATIONS

1110 kkkk kkkk

1001 kkkk kkkk

0000 0000 0100

101k kkkk kkkk

1101 kkkk kkkk

1100 kkkk kkkk

0000 0000 0010

1000 kkkk kkkk

0000 0000 0011

0000 0000 0fff

1111 kkkk kkkk

AND literal with W

Call subroutine

ANDLW

CALL

CLRWDT

GOTO

IORLW

MOVLW

OPTION

RETLW

SLEEP

TRIS

–

None

TO, PD

None

TO, PD

None

Clear Watchdog Timer

Unconditional branch

Inclusive OR Literal with W

Move Literal to W

Load OPTION register

Return, place Literal in W

Go into standby mode

Load TRIS register

Exclusive OR Literal to W

XORLW

Note 1: The 9th bit of the program counter will be forced to a '0' by any instruction that writes to the PC except for GOTO.

(See individual device data sheets, Memory Section/Indirect Data Addressing, INDF and FSR Registers)

2: When an I/O register is modiﬁed as a function of itself (e.g. MOVF PORTB, 1), the value used will be that value

present on the pins themselves. For example, if the data latch is '1' for a pin conﬁgured as input and is driven

low by an external device, the data will be written back with a '0'.

3: The instruction TRIS f, where f = 5 or 6 causes the contents of the W register to be written to the tristate

latches of PORTA or B respectively. A '1' forces the pin to a hi-impedance state and disables the output buffers.

4: If this instruction is executed on the TMR0 register (and, where applicable, d = 1), the prescaler will be cleared

(if assigned to TMR0).

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 9

PIC16HV540

ADDWF

Syntax:

Add W and f

[ label ] ADDWF f,d

0 ≤ f ≤ 31

ANDWF

Syntax:

AND W with f

[ label ] ANDWF f,d

0 ≤ f ≤ 31

Operands:

[0,1]

Operation:

(W) + (f) → (dest)

Operation:

(W) .AND. (f) → (dest)

Status Affected: C, DC, Z

Status Affected:

Encoding:

0001

11df

ffff

0001

01df

ffff

Encoding:

Add the contents of the W register and

in the W register. If 'd' is '1' the result is

stored back in register 'f'.

The contents of the W register are

AND’ed with register 'f'. If 'd' is 0 the

result is stored in the W register. If 'd' is

'1' the result is stored back in register 'f'.

Description:

Words:

Cycles:

Example:

Cycles:

Example:

ADDWF FSR, 0

ANDWF FSR,

Before Instruction

0x17

FSR = 0xC2

After Instruction

0xD9

0x17

FSR = 0xC2

FSR = 0x02

ANDLW

And literal with W

BCF

Bit Clear f

Syntax:

[ label ] ANDLW

Syntax:

Operands:

[ label ] BCF f,b

Operands:

Operation:

Status Affected:

Encoding:

Description:

0 ≤ k ≤ 255

0 ≤ f ≤ 31

0 ≤ b ≤ 7

(W).AND. (k) → (W)

Operation:

0 → (f<b>)

Status Affected: None

1110

kkkk

0100

bbbf

ffff

Encoding:

Description:

Words:

The contents of the W register are

AND’ed with the eight-bit literal 'k'. The

result is placed in the W register.

Bit 'b' in register 'f' is cleared.

Words:

Cycles:

Example:

BCF

FLAG_REG,

Example:

ANDLW 0x5F

Before Instruction

FLAG_REG = 0xC7

Before Instruction

0xA3

After Instruction

FLAG_REG = 0x47

After Instruction

0x03

DS40197A-page 10

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

BSF

Bit Set f

BTFSS

Bit Test f, Skip if Set

Syntax:

Operands:

[ label ] BSF f,b

Syntax:

[ label ] BTFSS f,b

0 ≤ f ≤ 31

0 ≤ b ≤ 7

Operands:

0 ≤ f ≤ 31

0 ≤ b < 7

Operation:

1 → (f<b>)

Operation:

skip if (f<b>) = 1

Status Affected: None

0101

bbbf

ffff

0111

bbbf

ffff

Encoding:

Description:

Words:

Encoding:

Bit 'b' in register 'f' is set.

If bit 'b' in register 'f' is '1' then the next

instruction is skipped.

Description:

If bit 'b' is '1', then the next instruction

fetched during the current instruction

execution, is discarded and an NOP is

executed instead, making this a 2 cycle

instruction.

Cycles:

BSF

FLAG_REG,

Example:

Before Instruction

FLAG_REG = 0x0A

Words:

After Instruction

FLAG_REG = 0x8A

Cycles:

Example:

1(2)

HERE

FALSE GOTO

TRUE

BTFSS FLAG,1

PROCESS_CODE

•

BTFSC

Bit Test f, Skip if Clear

•

Syntax:

[ label ] BTFSC f,b

Operands:

0 ≤ f ≤ 31

0 ≤ b ≤ 7

Before Instruction

address (HERE)

After Instruction

If FLAG<1>

Operation:

skip if (f<b>) = 0

Status Affected: None

address (FALSE);

address (TRUE)

bbbf

ffff

if FLAG<1>

Encoding:

0110

If bit 'b' in register 'f' is 0 then the next

instruction is skipped.

Description:

If bit 'b' is 0 then the next instruction

fetched during the current instruction

execution is discarded, and an NOP is

executed instead, making this a 2 cycle

instruction.

Words:

Cycles:

Example:

1(2)

HERE

FALSE GOTO

TRUE

BTFSC

FLAG,1

PROCESS_CODE

•

Before Instruction

address (HERE)

After Instruction

if FLAG<1>

address (TRUE);

address(FALSE)

if FLAG<1>

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 11

PIC16HV540

CALL

Subroutine Call

[ label ] CALL

0 ≤ k ≤ 255

CLRW

Clear W

Syntax:

[ label ] CLRW

None

Operands:

Operation:

Operands:

Operation:

(PC) + 1→ Top of Stack;

k → PC<7:0>;

00h → (W);

1 → Z

(STATUS<6:5>) → PC<10:9>;

0 → PC<8>

Status Affected:

Encoding:

0000

0100

0000

Status Affected: None

The W register is cleared. Zero bit (Z)

is set.

Description:

1001

kkkk

Encoding:

Subroutine call. First, return address

(PC+1) is pushed onto the stack. The

eight bit immediate address is loaded

into PC bits <7:0>. The upper bits

PC<10:9> are loaded from STA-

TUS<6:5>, PC<8> is cleared. CALLis

a two cycle instruction.

Description:

Words:

Cycles:

Example:

CLRW

Before Instruction

0x5A

After Instruction

Words:

0x00

Cycles:

Example:

HERE

CALL

THERE

Before Instruction

PC address (HERE)

CLRWDT

Clear Watchdog Timer

[ label ] CLRWDT

None

Syntax:

After Instruction

PC address (THERE)

TOS =

Operands:

Operation:

address (HERE + 1)

00h → WDT;

0 → WDT prescaler (if assigned);

1 → TO;

1 → PD

CLRF

Clear f

Syntax:

[ label ] CLRF

Status Affected: TO, PD

Operands:

Operation:

0 ≤ f ≤ 31

0000

0100

Encoding:

00h → (f);

1 → Z

The CLRWDTinstruction resets the

WDT. It also resets the prescaler, if the

prescaler is assigned to the WDT and

not Timer0. Status bits TO and PD are

set.

Description:

Status Affected:

Encoding:

0000

011f

ffff

The contents of register 'f' are cleared

and the Z bit is set.

Description:

Words:

Cycles:

Example:

Words:

CLRWDT

Cycles:

Example:

Before Instruction

CLRF

FLAG_REG

WDT counter

Before Instruction

FLAG_REG

After Instruction

WDT counter

0x5A

0x00

After Instruction

WDT prescale =

FLAG_REG

0x00

DS40197A-page 12

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

COMF

Complement f

[ label ] COMF f,d

0 ≤ f ≤ 31

DECFSZ

Syntax:

Decrement f, Skip if 0

[ label ] DECFSZ f,d

0 ≤ f ≤ 31

Syntax:

Operands:

[0,1]

Operation:

(f) → (dest)

Operation:

(f) – 1 → d; skip if result = 0

Status Affected:

Encoding:

Status Affected: None

0010

01df

ffff

0010

11df

ffff

Encoding:

The contents of register 'f' are comple-

mented. If 'd' is 0 the result is stored in

the W register. If 'd' is 1 the result is

stored back in register 'f'.

The contents of register 'f' are decre-

mented. If 'd' is 0 the result is placed in

the W register. If 'd' is 1 the result is

placed back in register 'f'.

Description:

If the result is 0, the next instruction,

which is already fetched, is discarded

and an NOP is executed instead mak-

ing it a two cycle instruction.

Words:

Cycles:

Example:

COMF

REG1,0

Words:

Before Instruction

REG1

0x13

Cycles:

Example:

1(2)

After Instruction

HERE

DECFSZ

GOTO

CONTINUE •

CNT, 1

LOOP

REG1

0xEC

•

DECF

Decrement f

[ label ] DECF f,d

0 ≤ f ≤ 31

Before Instruction

address (HERE)

Syntax:

After Instruction

Operands:

CNT

if CNT

≠

CNT - 1;

address (CONTINUE);

[0,1]

Operation:

(f) – 1 → (dest)

Status Affected:

Encoding:

address (HERE+1)

0000

11df

ffff

Decrement register 'f'. If 'd' is 0 the

result is stored in the W register. If 'd' is

1 the result is stored back in register 'f'.

Description:

GOTO

Unconditional Branch

Syntax:

[ label ] GOTO

0 ≤ k ≤ 511

Words:

Operands:

Cycles:

Example:

Operation:

k → PC<8:0>;

STATUS<6:5> → PC<10:9>

DECF

CNT,

Before Instruction

Status Affected: None

CNT

0x01

101k

kkkk

Encoding:

GOTOis an unconditional branch. The

9-bit immediate value is loaded into PC

bits <8:0>. The upper bits of PC are

loaded from STATUS<6:5>. GOTOis a

two cycle instruction.

Description:

After Instruction

CNT

0x00

Words:

Cycles:

Example:

GOTO THERE

After Instruction

address (THERE)

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 13

PIC16HV540

INCF

Increment f

IORLW

Inclusive OR literal with W

Syntax:

Operands:

[ label ] INCF f,d

Syntax:

[ label ] IORLW k

0 ≤ f ≤ 31

Operands:

Operation:

Status Affected:

Encoding:

Description:

0 ≤ k ≤ 255

[0,1]

(W) .OR. (k) → (W)

Operation:

(f) + 1 → (dest)

Status Affected:

Encoding:

1101

kkkk

0010

10df

ffff

The contents of the W register are

OR’ed with the eight bit literal 'k'. The

result is placed in the W register.

The contents of register 'f' are incre-

mented. If 'd' is 0 the result is placed in

the W register. If 'd' is 1 the result is

placed back in register 'f'.

Description:

Words:

Cycles:

Example:

Words:

IORLW 0x35

Cycles:

Example:

Before Instruction

0x9A

INCF

CNT,

Before Instruction

After Instruction

CNT

0xFF

0xBF

After Instruction

CNT

0x00

IORWF

Inclusive OR W with f

[ label ] IORWF f,d

0 ≤ f ≤ 31

Syntax:

Operands:

INCFSZ

Increment f, Skip if 0

[ label ] INCFSZ f,d

0 ≤ f ≤ 31

[0,1]

Syntax:

Operation:

(W).OR. (f) → (dest)

Operands:

Status Affected:

Encoding:

[0,1]

0001

00df

ffff

Operation:

(f) + 1 → (dest), skip if result = 0

Inclusive OR the W register with regis-

ter 'f'. If 'd' is 0 the result is placed in

the W register. If 'd' is 1 the result is

placed back in register 'f'.

Description:

Status Affected: None

0011

11df

ffff

Encoding:

The contents of register 'f' are incre-

mented. If 'd' is 0 the result is placed in

the W register. If 'd' is 1 the result is

placed back in register 'f'.

Description:

Words:

Cycles:

Example:

If the result is 0, then the next instruc-

tion, which is already fetched, is dis-

carded and an NOP is executed

instead making it a two cycle instruc-

tion.

IORWF

RESULT, 0

Before Instruction

RESULT

0x13

0x91

After Instruction

Words:

RESULT

0x13

0x93

Cycles:

Example:

1(2)

HERE

INCFSZ

GOTO

CNT,

LOOP

CONTINUE •

•

Before Instruction

address (HERE)

After Instruction

CNT

if CNT

≠

CNT + 1;

address (CONTINUE);

address (HERE +1)

DS40197A-page 14

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

MOVF

Move f

MOVWF

Syntax:

Move W to f

[ label ] MOVWF

Syntax:

Operands:

[ label ] MOVF f,d

0 ≤ f ≤ 31

Operands:

Operation:

0 ≤ f ≤ 31

(W) → (f)

[0,1]

Operation:

(f) → (dest)

Status Affected: None

Status Affected:

Encoding:

0000

001f

ffff

Encoding:

0010

00df

ffff

Move data from the W register to regis-

ter 'f'.

Description:

The contents of register 'f' is moved to

destination 'd'. If 'd' is 0, destination is

the W register. If 'd' is 1, the destination

is ﬁle register 'f'. 'd' is 1 is useful to test

a ﬁle register since status ﬂag Z is

affected.

Description:

Words:

Cycles:

Example:

MOVWF TEMP_REG

Before Instruction

Words:

TEMP_REG

0xFF

0x4F

Cycles:

Example:

MOVF

FSR,

After Instruction

TEMP_REG

0x4F

After Instruction

value in FSR register

NOP

No Operation

[ label ] NOP

None

MOVLW

Move Literal to W

[ label ] MOVLW

0 ≤ k ≤ 255

Syntax:

Operands:

Operation:

Operands:

Operation:

No operation

k → (W)

Status Affected: None

0000

Status Affected: None

Encoding:

Description:

Words:

1100

kkkk

Encoding:

No operation.

The eight bit literal 'k' is loaded into the

W register. The don’t cares will assem-

ble as 0s.

Description:

Cycles:

NOP

Example:

Words:

Cycles:

Example:

MOVLW 0x5A

After Instruction

0x5A

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 15

PIC16HV540

OPTION

Syntax:

Load OPTION Register

RLF

Rotate Left f through Carry

[ label ] RLF f,d

0 ≤ f ≤ 31

[ label ] OPTION

None

Syntax:

Operands:

Operation:

[0,1]

(W) → OPTION

Status Affected: None

Operation:

See description below

0000

0010

Encoding:

Status Affected:

Encoding:

The content of the W register is loaded

into the OPTION register.

Description:

0011

01df

ffff

The contents of register 'f' are rotated

one bit to the left through the Carry

Flag. If 'd' is 0 the result is placed in the

W register. If 'd' is 1 the result is stored

back in register 'f'.

Description:

Words:

Cycles:

Example

OPTION

Before Instruction

0x07

After Instruction

OPTION

Words:

Cycles:

Example:

RLF

REG1,0

RETLW

Return with Literal in W

Before Instruction

Syntax:

[ label ] RETLW

REG1

1110 0110

Operands:

Operation:

0 ≤ k ≤ 255

After Instruction

k → (W);

TOS → PC

REG1

1110 0110

1100 1100

Status Affected: None

1000

kkkk

Encoding:

The W register is loaded with the eight

bit literal 'k'. The program counter is

loaded from the top of the stack (the

return address). This is a two cycle

instruction.

Description:

RRF

Rotate Right f through Carry

[ label ] RRF f,d

0 ≤ f ≤ 31

Syntax:

Operands:

[0,1]

Words:

Operation:

See description below

Cycles:

Example:

Status Affected:

Encoding:

CALL TABLE ;W contains

;table offset

;value.

0011

00df

ffff

The contents of register 'f' are rotated

one bit to the right through the Carry

Flag. If 'd' is 0 the result is placed in the

W register. If 'd' is 1 the result is placed

back in register 'f'.

Description:

•

;W now has table

;value.

•

TABLE

ADDWF PC

RETLW k1

RETLW k2

;W = offset

;Begin table

;

•

Words:

•

Cycles:

Example:

RETLW kn

; End of table

RRF

REG1,0

Before Instruction

0x07

Before Instruction

REG1

1110 0110

After Instruction

value of k8

After Instruction

REG1

1110 0110

0111 0011

DS40197A-page 16

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

SLEEP

Enter SLEEP Mode

SUBWF

Subtract W from f

Syntax:

[label]

[label] SUBWF f,d

SLEEP

Operands:

0 ≤ f ≤ 31

Operands:

Operation:

None

[0,1]

00h → WDT;

0 → WDT prescaler;

1 → TO;

Operation:

(f) – (W) → (dest)

Status Affected: C, DC, Z

0 → PD

0000

10df

ffff

Encoding:

Status Affected: TO, PD

Subtract (2’s complement method) the

W register from register 'f'. If 'd' is 0 the

result is stored in the W register. If 'd' is

1 the result is stored back in register 'f'.

Description:

0000

0011

Encoding:

Time-out status bit (TO) is set. The

power down status bit (PD) is cleared.

The WDT and its prescaler are cleared.

Description:

Words:

The processor is put into SLEEP mode

with the oscillator stopped. See sec-

tion on SLEEP for more details.

Cycles:

SUBWF

REG1, 1

Example 1:

Words:

Before Instruction

REG1

Cycles:

Example:

SLEEP

After Instruction

REG1

; result is positive

Example 2:

Before Instruction

REG1

After Instruction

REG1

; result is zero

Example 3:

Before Instruction

REG1

After Instruction

REG1

; result is negative

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 17

PIC16HV540

SWAPF

Syntax:

Swap Nibbles in f

XORLW

Exclusive OR literal with W

[ label ] SWAPF f,d

Syntax:

[label] XORLW

0 ≤ k ≤ 255

Operands:

0 ≤ f ≤ 31

Operands:

[0,1]

Operation:

(W) .XOR. k → (W)

Operation:

(f<3:0>) → (dest<7:4>);

(f<7:4>) → (dest<3:0>)

Status Affected:

Encoding:

1111

kkkk

Status Affected: None

The contents of the W register are

XOR’ed with the eight bit literal 'k'. The

result is placed in the W register.

Description:

0011

10df

ffff

Encoding:

The upper and lower nibbles of register

'f' are exchanged. If 'd' is 0 the result is

placed in W register. If 'd' is 1 the result

is placed in register 'f'.

Description:

Words:

Cycles:

Example:

Words:

Cycles:

Example

XORLW 0xAF

Before Instruction

0xB5

SWAPF

REG1,

After Instruction

Before Instruction

REG1

0x1A

0xA5

After Instruction

REG1

0xA5

0X5A

XORWF

Exclusive OR W with f

[ label ] XORWF f,d

0 ≤ f ≤ 31

Syntax:

Operands:

TRIS

Load TRIS Register

[0,1]

Syntax:

[ label ] TRIS

f = 5, 6 or 7

Operation:

(W) .XOR. (f) → (dest)

Operands:

Operation:

Status Affected:

Encoding:

(W) → TRIS register f

0001

10df

ffff

Status Affected: None

Exclusive OR the contents of the W

result is stored in the W register. If 'd' is

1 the result is stored back in register 'f'.

Description:

0000

0fff

Encoding:

TRIS register 'f' (f = 5, 6, or 7) is loaded

with the contents of the W register

Description:

Words:

Cycles:

Example

Words:

Cycles:

Example

TRIS

PORTA

REG,1

XORWF

Before Instruction

0XA5

REG

0xAF

0xB5

After Instruction

TRISA

After Instruction

REG

0x1A

0xB5

DS40197A-page 18

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

6.3

Quick-Turnaround-Production (QTP)

Devices

6.0

PIC16HV540 DEVICE

VARIETIES

A variety of frequency ranges and packaging options

are available. Depending on application and

production requirements, the proper device option can

be selected using the information in this section. When

placing orders, please use the PIC16HV540 Product

Identiﬁcation System at the back of this data sheet to

specify the correct part number.

Microchip offers a QTP Programming Service for

factory production orders. This service is made

available for users who choose not to program a

medium to high quantity of units and whose code

patterns have stabilized. The devices are identical to

the OTP devices but with all EPROM locations and

conﬁguration bit options already programmed by the

factory. Certain code and prototype veriﬁcation

procedures apply before production shipments are

available. Please contact your Microchip Technology

sales ofﬁce for more details.

For the PIC16HV540 family of devices, there is one

device type, as indicated in the device number:

1. HV, as in PIC16HV540A. Refer to PIC16C5X

data sheet (DS30453A) for an explanation of

how to access these bits. These devices have

EPROM program memory and operate over the

standard voltage range of 3.5 to 13 volts.

6.4

Serialized

Quick-Turnaround-Production

(SQTP^SM) Devices

6.1

UV Erasable Devices

Microchip offers the unique programming service

where a few user-deﬁned locations in each device are

programmed with different serial numbers. The serial

numbers may be random, pseudo-random or

sequential.

The UV erasable versions, offered in CERDIP

packages, are optimal for prototype development and

pilot programs

UV erasable devices can be programmed for any of

the four oscillator conﬁgurations. Microchip's

PICSTART and PRO MATE programmers both

support programming of the PIC16HV540. Third party

programmers also are available; refer to the Third

Party Guide for a list of sources.

Serial programming allows each device to have a

unique number which can serve as an entry code,

password or ID number.

6.2

One-Time-Programmable (OTP)

Devices

The availability of OTP devices is especially useful for

customers expecting frequent code changes and

updates.

The OTP devices, packaged in plastic packages,

permit the user to program them once. In addition to

the program memory, the conﬁguration bits must be

programmed.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 19

PIC16HV540

7.0

ELECTRICAL CHARACTERISTICS - PIC16HV540

†

Absolute Maximum Ratings

Ambient temperature under bias...............................................................................................................-20˚C to +85˚C

Storage temperature ............................................................................................................................. - 65˚C to +150˚C

Voltage on VDD with respect to VSS................................................................................................................... 0 to +16V

(2)

Voltage on MCLR with respect to VSS ........................................................................................................... 0 to +14V

Voltage on all other pins with respect to VSS...................................................................................-0.6V to (VDD + 0.6V)

(1)

Total power dissipation ..................................................................................................................................... 800 mW

Max. current out of VSS pin................................................................................................................................... 150 mA

Max. current into VDD pin...................................................................................................................................... 100 mA

Max. current into an input pin (T0CKI only)......................................................................................................................±500 µA

Input clamp current, IIK (VI < 0 or VI > VDD)......................................................................................................................±20 mA

Output clamp current, IOK (V0 < 0 or V0 > VDD)...............................................................................................................±20 mA

Max. output current sunk by any I/O pin................................................................................................................. 25 mA

Max. output current sourced by any I/O pin............................................................................................................ 10 mA

Max. output current sourced by a single I/O port (PORTA or B)............................................................................. 40 mA

Max. output current sunk by a single I/O port (PORTA or B).................................................................................. 50 mA

Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)

Note 2: Voltage spikes below VSS at the MCLR pin, inducing currents greater than 80mA, may cause latch-up.Thus,

a series resistor of 50-100Ω should be used when applying a “low” level to the MCLR pin rather than pulling

this pin directly to VSS

†

NOTICE: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device.

This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operation listings of this speciﬁcation is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

DS40197A-page 20

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

7.1

DC Characteristics: PIC16HV540-04, 20 (Commercial)

PIC16HV540-04I, 20I (Industrial)

Standard Operating Conditions (unless otherwise speciﬁed)

DC Characteristics

Power Supply Pins

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial)

–40°C ≤ TA ≤ +85°C (industrial)

(1)

Characteristic

Sym Min Typ

Max Units Conditions

Supply Voltage

VDD

HS, XT, RC and LP options

3.5

(2)

RAM Data Retention Voltage

VDR

1.5*

VSS

Device in SLEEP mode

See section on Power-On Reset for details

VDD start voltage to ensure

Power-On Reset

VPOR

VDD rise rate to ensure

Power-On Reset

SVDD

IDD

0.05

VDD

V/ms See section on Power-On Reset for details

(3)

Supply Current

(4)

HS, XT and RC options

0.5

mA FOSC = 4.0 MHz, VDD = 15V

µA FOSC = 32 kHz, VDD = 15V, WDT disabled

LP option, Commercial

(5)(6)

Power Down Current

IPD

Commercial

µA VDD = 15V, sleep timer enabled

µA VDD = 15V, sleep timer disabled

µA VDD = 15V, sleep timer enabled

µA VDD = 15V, sleep timer disabled

0.25 4.0

0.3

Industrial

5.0

Brown-Out Detector Threshold

3.1

2.2

5V Core

3V Core

* These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25°C.This data is for design guidance

only and is not tested.

2: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.

3: The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus

loading, oscillator type, bus rate, internal code execution pattern, and temperature also have an impact on

the current consumption.

a) The test conditions for all IDD measurements in active operation mode are:

OSC1 = external square wave, from rail-to-rail; all I/O pins tristated, pulled to

Vss, T0CKI = VDD, MCLR = VDD; WDT enabled/disabled as speciﬁed.

b) For standby current measurements, the conditions are the same, except that

the device is in SLEEP mode.

4: Does not include current through Rext. The current through the resistor can be estimated by the

formula: IR = VDD/2Rext (mA) with Rext in kΩ.

5: The power down current in SLEEP mode does not depend on the oscillator type. Power down current is

measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD or VSS.

6: The oscillator start-up time can be as much as 8 seconds for XT and LP oscillator selection, if the SLEEP

mode is exited or during initial power-up.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 21

PIC16HV540

7.2

DC Characteristics: PIC16HV540-04, 20 (Commercial)

PIC16HV540-04I, 20I (Industrial)

DC Characteristics

All Pins Except

Power Supply Pins

Standard Operating Conditions (unless otherwise speciﬁed)

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial)

–40°C ≤ TA ≤ +85°C (industrial)

(1)

Characteristic

Sym

Min

Typ

Max

Units

Conditions

Input Low Voltage

VIL

I/O Ports

PORTA

VSS

0.15 VIO

0.3 VIO

TBD

Pin at hi-impedance

MCLR (Schmitt Trigger)

T0CKI (Schmitt Trigger)

OSC1 (Schmitt Trigger)

OSC1

(4)

RC option only

HS, XT and LP options

I/O Ports

PORTB

Input High Voltage

VIH

(5)

I/O Ports

PORTA

0.25 VIO+0.8V

0.85 VIO

0.7 VIO

VIO

VDD

VIO

For all VIO

MCLR (Schmitt Trigger)

T0CKI (Schmitt Trigger)

OSC1 (Schmitt Trigger)

OSC1

(4)

RC option only

XT and LP options

HS, XT and LP options

I/O Ports

PORTB

TBD

Hysteresis of Schmitt

Trigger inputs

VHYS

IIL

0.15 VIO*

(3)

Input Leakage Current

I/O Ports

-1.0

-5.0

0.5

+1.0

µA VSS ≤ VPIN ≤ VDD,

Pin at hi-impedance

(2)

MCLR

+5.0

+3.0

µA VPIN = VSS +0.25V

(2)

0.5

µA VPIN = VDD

T0CKI

OSC1

-3.0

µA VSS ≤ VPIN ≤ VDD

µA VSS ≤ VPIN ≤ VDD,

HS, XT and LP options

Sleep mode, WPC enabled

RB7

TBD

Output Low Voltage

VOL

I/O Ports

PORTA

0.6

VDD = 15V, VIO = 5V, IOL = 8.7 mA

VDD = 15V, VIO = 5V, IOL = 5 mA

VDD = 15V, VIO = 5V, IOL = 2.8 mA

VDD = 15V, VIO = 5V, IOL = 1.5 mA

RC option only

OSC2/CLKOUT

I/O ports

PORT B

0.6

VDD = 15V, IOL = 8.7 mA, VIO = 5V

Output High Voltage

(3)

VOH

I/O Ports

PORTA

VIO-0.7

VDD = 15V, VIO = 3V, IOH = -2 mA

VDD = 15V, VIO = 5V, IOH = -5.4 mA

VDD = 15V, VIO = 3V, IOH =-0.5 mA

VDD = 15V, VIO = 5V, IOH = -1.0 mA

RC option only

OSC2/CLKOUT

I/O Ports

PORTB

VDD-0.7

TBD

VDD = 15V, IOH = -8 mA, VIO = 5V

Threshold Voltage

I/O Ports

PORTB [7] VLEV

VDD-1.0

TBD

Slowly rising input detect level

* These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25°C. This data is for design guidance

only and is not tested.

2: The leakage current on the MCLR/VPP pin is strongly dependent on the applied voltage level. The speciﬁed lev-

els represent normal operating conditions. Higher leakage current may be measured at different input voltage.

3: Negative current is deﬁned as coming out of the pin.

4: For the RC option, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the

PIC16HV540 be driven with external clock in RC mode.

5: The user may use the better of the two speciﬁcations.

DS40197A-page 22

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

7.3

Timing Parameter Symbology and Load Conditions

The timing parameter symbols have been created following one of the following formats:

1. TppS2ppS

2. TppS

Frequency

Lowercase subscripts (pp) and their meanings:

Time

osc

MCLR

drt

CLKOUT

cycle time

device reset timer

I/O port

oscillator

OSC1

T0CKI

wdt

watchdog timer

Uppercase letters and their meanings:

Fall

Period

High

Rise

Invalid (Hi-impedance)

Low

Valid

Hi-impedance

FIGURE 7-1: LOAD CONDITIONS - PIC16HV540

CL = 50 pF for all pins except OSC2

15 pF for OSC2 in XT, HS or LP

options when external clock

is used to drive OSC1

VSS

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 23

PIC16HV540

7.4

Timing Diagrams and Speciﬁcations

FIGURE 7-2: EXTERNAL CLOCK TIMING - PIC16HV540

OSC1

CLKOUT

TABLE 7-1:

EXTERNAL CLOCK TIMING REQUIREMENTS - PIC16HV540

Standard Operating Conditions (unless otherwise speciﬁed)

AC Characteristics

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial),

–40°C ≤ TA ≤ +85°C (industrial)

Parameter

(1)

No.

Sym

Characteristic

Min Typ

Max Units

Conditions

(2)

FOSC

External CLKIN Frequency

0.1

—

4.0

MHz RC osc mode

MHz HS osc mode

MHz XT osc mode

kHz LP osc mode

MHz RC osc mode

MHz HS osc mode

MHz XT osc mode

kHz LP osc mode

—

4.0

200

4.0

—

(2)

Oscillator Frequency

—

4.0

200

—

(2)

TOSC

External CLKIN Period

250

5.0

250

5.0

—

µs

—

µs

RC osc mode

HS osc mode

XT osc mode

LP osc mode

RC osc mode

HS osc mode

XT osc mode

LP osc mode

—

(2)

Oscillator Period

—

10,000

200

—

(3)

TCY

Instruction Cycle Time

4/FOSC

—

TosL, TosH Clock in (OSC1) Low or High Time

—

HS osc mode

XT oscillator

LP oscillator

HS osc mode

XT oscillator

LP oscillator

50*

2.0*

—

TosR, TosF Clock in (OSC1) Rise or Fall Time

—

25*

50*

—

These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is at VIO = 5V, VDD = 9V, 25˚C unless otherwise stated.These parameters are for design

guidance only and are not tested.

2: All speciﬁed values are based on characterization data for that particular oscillator type under standard operating condi-

tions with the device executing code. Exceeding these speciﬁed limits may result in an unstable oscillator operation and/or

higher than expected current consumption. When an external clock input is used, the “max” cycle time limit “DC” (no clock)

for all devices.

3: Instruction cycle period (TCY) equals four times the input oscillator time base period.

DS40197A-page 24

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

FIGURE 7-3: CLKOUT AND I/O TIMING - PIC16HV540

OSC1

CLKOUT

I/O Pin

(input)

I/O Pin

(output)

New Value

Old Value

20, 21

Note: All tests must be done with specified capacitive loads 50 pF on I/O pins and CLKOUT.

TABLE 7-2:

CLKOUT AND I/O TIMING REQUIREMENTS - PIC16HV540

Standard Operating Conditions (unless otherwise speciﬁed)

AC Characteristics

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial),

–40°C ≤ TA ≤ +85°C (industrial).

Parameter

No.

(1)

Sym

Characteristic

Min

Typ

Max

Units

(2)

TosH2ckL

TosH2ckH

TckR

OSC1↑ to CLKOUT↓

OSC1↑ to CLKOUT↑

—

5.0

—

30**

15**

40**

—

(2)

CLKOUT rise time

—

(2)

TckF

CLKOUT fall time

—

(2)

CLKOUT↓ to Port out valid

TckL2ioV

TioV2ckH

TckH2ioI

TosH2ioV

TosH2ioI

—

(2)

Port in valid before CLKOUT↑

(2)

0.25 TCY+30*

—

Port in hold after CLKOUT↑

OSC1↑ (Q1 cycle) to Port out valid

—

(3)

—

100*

—

OSC1↑ (Q2 cycle) to Port input invalid (I/O in

TBD

—

hold time)

TioV2osH

Port input valid to OSC1↑

TBD

—

(I/O in setup time)

(3)

TioR

TioF

Port output rise time

—

25**

(3)

Port output fall time

These parameters are characterized but not tested.

** These parameters are design targets and are not tested. No characterization data available at this time.

Note 1: Data in the Typical (“Typ”) column is at VIO = 5V, VDD = 9V, 25˚C unless otherwise stated.These parameters are for design

guidance only and are not tested.

2: Measurements are taken in RC Mode where CLKOUT output is 4 x TOSC.

3: See Figure 7-1 for loading conditions.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 25

PIC16HV540

FIGURE 7-4: RESET, WATCHDOG TIMER, AND

DEVICE RESET TIMER TIMING - PIC16HV540

VDD

MCLR

Internal

POR

DRT

Time-out

Internal

RESET

Watchdog

Timer

RESET

I/O pin

(Note 1)

Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.

TABLE 7-3:

RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER - PIC16HV540

AC Characteristics Standard Operating Conditions (unless otherwise speciﬁed)

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial)

–40°C ≤ TA ≤ +85°C (industrial)

Parameter

No.

(1)

Sym Characteristic

Min Typ

Max Units

Conditions

TmcL MCLR Pulse Width (low)

—

µs VDD = 15V, VIO = 5V

Twdt Watchdog Timer Time-out Period

TDRT Device Reset Timer Period

9.0*

18*

40*

ms VDD = 15V, VIO = 5V

30*

2.5

ms VDD = 15V, VIO = 5V,

RC mode

0.55* 1.1*

—

TioZ I/O Hi-impedance from MCLR Low

Tpc Pin Change Pulse Width

—

100*

—

µs

These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is at VIO = 5V, VDD = 9V, 25°C unless otherwise stated. These parameters

are for design guidance only and are not tested.

DS40197A-page 26

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

FIGURE 7-5: TIMER0 CLOCK TIMINGS - PIC16HV540

T0CKI

TABLE 7-4:

TIMER0 CLOCK REQUIREMENTS - PIC16HV540

Standard Operating Conditions (unless otherwise speciﬁed)

AC Characteristics

Operating Temperature

0°C ≤ TA ≤ +70°C (commercial)

–40°C ≤ TA ≤ +85°C (industrial)

Parameter

No.

(1)

Sym Characteristic

Min

Typ

Max Units Conditions

Tt0H T0CKI High Pulse Width - No Prescaler

- With Prescaler

0.5 TCY + 20*

10*

—

Tt0L T0CKI Low Pulse Width - No Prescaler

- With Prescaler

0.5 TCY + 20*

10*

Tt0P T0CKI Period

20 or TCY + 40*

ns Whichever is greater.

N = Prescale Value

(1, 2, 4,..., 256)

These parameters are characterized but not tested.

Note 1: Data in the Typical (“Typ”) column is at 3.8V, 25˚C unless otherwise stated.These parameters are for design guidance only

and are not tested.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 27

PIC16HV540

8.0

DC AND AC

CHARACTERISTICS -

PIC16HV540

The graphs and tables provided in this section are for

design guidance and are not tested or guaranteed. In

some graphs or tables the data presented are outside

speciﬁed operating range (e.g., outside speciﬁed VDD

range). This is for information only and devices will

operate properly only within the speciﬁed range.

The data presented in this section is a statistical

summary of data collected on units from different lots

over a period of time. “Typical” represents the mean of

the distribution while “max” or “min” represents (mean

+ 3σ) and (mean – 3σ) respectively, where

σ is

standard deviation.

Not available at this time.

DS40197A-page 28

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

9.0

PACKAGING INFORMATION

Package Type: K04-007 18-Lead Plastic Dual In-line (P) – 300 mil

Units

INCHES*

NOM

0.300

MILLIMETERS

Dimension Limits

PCB Row Spacing

Number of Pins

Pitch

Lower Lead Width

Upper Lead Width

Shoulder Radius

Lead Thickness

Top to Seating Plane

Top of Lead to Seating Plane

Base to Seating Plane

Tip to Seating Plane

Package Length

Molded Package Width

Radius to Radius Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

MIN

MAX

MIN

NOM

7.62

MAX

2.54

0.46

1.52

0.13

0.25

3.94

2.41

0.51

3.30

22.73

6.48

6.35

8.85

0.100

0.018

0.060

0.005

0.010

0.155

0.095

0.020

0.130

0.895

0.255

0.250

0.349

0.013

0.023

0.33

0.58

†

0.055

0.000

0.005

0.110

0.075

0.000

0.125

0.890

0.245

0.230

0.310

0.065

0.010

0.015

0.155

0.115

0.020

0.135

0.900

0.265

0.270

0.387

1.40

0.00

0.13

2.79

1.91

0.00

3.18

22.61

6.22

5.84

7.87

1.65

0.25

0.38

3.94

2.92

0.51

3.43

22.86

6.73

6.86

9.83

‡

Controlling Parameter.

†

Dimension “B1” does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003”

(0.076 mm) per side or 0.006” (0.152 mm) more than dimension “B1.”

‡

Dimensions “D” and “E” do not include mold ﬂash or protrusions. Mold ﬂash or protrusions shall not

exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.”

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 29

PIC16HV540

Package Type: K04-051 18-Lead Plastic Small Outline (SO) – Wide, 300 mil

45°

Units

Dimension Limits

Pitch

INCHES*

NOM

0.050

MILLIMETERS

MIN

MAX

MIN

NOM

1.27

MAX

Number of Pins

Overall Pack. Height

Shoulder Height

Standoff

Molded Package Length

Molded Package Width

Outside Dimension

Chamfer Distance

Shoulder Radius

Gull Wing Radius

Foot Length

0.093

0.099

0.058

0.008

0.456

0.296

0.407

0.020

0.005

0.016

0.104

2.36

1.22

2.50

1.47

0.19

11.58

7.51

10.33

0.50

0.13

0.41

2.64

1.73

0.28

11.73

7.59

10.64

0.74

0.25

0.53

0.048

0.004

0.450

0.292

0.394

0.010

0.005

0.011

0.068

0.011

0.462

0.299

0.419

0.029

0.010

0.021

0.10

11.43

7.42

10.01

0.25

0.13

0.28

‡

Foot Angle

Radius Centerline

Lead Thickness

Lower Lead Width

Mold Draft Angle Top

Mold Draft Angle Bottom

0.010

0.009

0.014

0.015

0.011

0.017

0.020

0.012

0.019

0.25

0.23

0.36

0.38

0.27

0.42

0.51

0.30

0.48

†

Controlling Parameter.

†

Dimension “B” does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003”

(0.076 mm) per side or 0.006” (0.152 mm) more than dimension “B.”

‡

Dimensions “D” and “E” do not include mold ﬂash or protrusions. Mold ﬂash or protrusions shall not

exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.”

DS40197A-page 30

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

Package Type: K04-010 18-Lead Ceramic Dual In-line with Window (JW) – 300 mil

Units

Dimension Limits

PCB Row Spacing

Number of Pins

Pitch

Lower Lead Width

Upper Lead Width

Shoulder Radius

Lead Thickness

Top to Seating Plane

Top of Lead to Seating Plane

Base to Seating Plane

Tip to Seating Plane

Package Length

INCHES*

NOM

0.300

MILLIMETERS

MIN

MAX

MIN

NOM

7.62

MAX

0.098

0.100

0.019

0.055

0.013

0.010

0.183

0.111

0.023

0.138

0.900

0.298

0.270

0.385

0.140

0.200

0.102

2.49

0.41

2.54

0.47

1.40

0.32

0.25

4.64

2.82

0.57

3.49

22.86

7.56

6.86

9.78

0.14

0.2

2.59

0.016

0.050

0.010

0.008

0.175

0.091

0.015

0.125

0.880

0.285

0.255

0.345

0.130

0.190

0.021

0.060

0.015

0.012

0.190

0.131

0.030

0.150

0.920

0.310

0.285

0.425

0.150

0.210

0.53

1.52

0.38

0.30

4.83

3.33

0.76

3.81

23.37

7.87

7.24

10.80

0.15

0.21

1.27

0.25

0.20

4.45

2.31

0.00

3.18

22.35

7.24

6.48

8.76

0.13

0.19

Package Width

Radius to Radius Width

Overall Row Spacing

Window Width

Window Length

Controlling Parameter.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 31

PIC16HV540

Package Type: K04-072 20-Lead Plastic Shrink Small Outine (SS) – 5.30 mm

Units

Dimension Limits

Pitch

INCHES

NOM

0.026

MILLIMETERS*

MIN

MAX

MIN

NOM

0.65

MAX

Number of Pins

Overall Pack. Height

Shoulder Height

Standoff

Molded Package Length

Molded Package Width

Outside Dimension

Shoulder Radius

Gull Wing Radius

Foot Length

0.073

0.036

0.005

0.283

0.208

0.306

0.005

0.020

0.068

0.078

1.73

0.66

1.86

0.91

0.13

7.20

5.29

7.78

0.13

0.51

1.99

0.026

0.002

0.278

0.205

0.301

0.005

0.015

0.046

0.008

0.289

0.212

0.311

0.010

0.025

1.17

0.21

7.33

5.38

7.90

0.25

0.64

0.05

7.07

5.20

7.65

0.13

0.38

‡

Foot Angle

Radius Centerline

Lead Thickness

Lower Lead Width

Mold Draft Angle Top

0.000

0.005

0.010

0.005

0.007

0.012

0.010

0.009

0.015

0.00

0.13

0.25

0.13

0.18

0.32

0.25

0.22

0.38

†

Mold Draft Angle Bottom

Controlling Parameter.

†

Dimension “B” does not include dam-bar protrusions. Dam-bar protrusions shall not exceed 0.003”

(0.076 mm) per side or 0.006” (0.152 mm) more than dimension “B.”

‡

Dimensions “D” and “E” do not include mold ﬂash or protrusions. Mold ﬂash or protrusions shall not

exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.”

DS40197A-page 32

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

9.1

Package Marking Information

18-Lead PDIP

Example

PIC16HV540

04I/P456

9823CBA

MMMMMMMMMMMMMMMMM

AABBCDE

18-Lead SOIC

Example

MMMMMMMMMMMM

PIC16HV540

04I/S0218

AABBCDE

9818CDK

18-Lead CERDIP Windowed

Example

MMMMMMMM

AABBCDE

PIC16HV5

40MMMMMM

9801CBA

20-Lead SSOP

Example

PIC16HV540

MMMMMMMMMMM

04I/218

9820CBP

AABBCDE

Legend: MM...M Microchip part number information

XX...X Customer speciﬁc information*

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Facility code of the plant at which wafer is manufactured

O = Outside Vendor

C = 5” Line

S = 6” Line

H = 8” Line

Mask revision number

Assembly code of the plant or country of origin in which

part was assembled

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line thus limiting the number of available characters

for customer speciﬁc information.

Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask

rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with

your Microchip Sales Ofﬁce. For QTP devices, any special marking adders are included in QTP price.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 33

PIC16HV540

Systems Information and Upgrade Hot Line

ON-LINE SUPPORT

The Systems Information and Upgrade Line provides

system users a listing of the latest versions of all of

Microchip's development systems software products.

Plus, this line provides information on how customers

can receive any currently available upgrade kits.The

Hot Line Numbers are:

Microchip provides on-line support on the Microchip

World Wide Web (WWW) site.

The web site is used by Microchip as a means to make

ﬁles and information easily available to customers. To

view the site, the user must have access to the Internet

and a web browser, such as Netscape or Microsoft

Explorer. Files are also available for FTP download

from our FTP site.

1-800-755-2345 for U.S. and most of Canada, and

1-602-786-7302 for the rest of the world.

ConnectingtotheMicrochipInternetWebSite

The Microchip web site is available by using your

favorite Internet browser to attach to:

www.microchip.com

The ﬁle transfer site is available by using an FTP ser-

vice to connect to:

ftp://ftp.futureone.com/pub/microchip

The web site and ﬁle transfer site provide a variety of

services. Users may download ﬁles for the latest

Development Tools, Data Sheets, Application Notes,

User's Guides, Articles and Sample Programs. A vari-

ety of Microchip speciﬁc business information is also

available, including listings of Microchip sales ofﬁces,

distributors and factory representatives. Other data

available for consideration is:

Trademarks: The Microchip name, logo, PIC, PICSTART,

MPLAB, PICmicro and PRO MATE are registered trade-

marks of Microchip Technology Incorporated in the U.S.A.

and other countries. SQTP is a service mark of Microchip

in the U.S.A.

• Latest Microchip Press Releases

• Technical Support Section with Frequently Asked

Questions

• Design Tips

All other trademarks mentioned herein are the property of

their respective companies.

• Device Errata

• Job Postings

• Microchip Consultant Program Member Listing

• Links to other useful web sites related to

Microchip Products

• Conferences for products, Development Systems,

technical information and more

• Listing of seminars and events

DS40197A-page 34

Preliminary

1998 Microchip Technology Inc.

PIC16HV540

PIC16HV540 Product Identiﬁcation System

To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed

sales ofﬁces.

PIC16HV540 -XX

/XX XXX

Pattern:

3-Digit Pattern Code for QTP (blank otherwise)

Package:

PDIP

SOIC (Gull Wing, 300 mil body)

SSOP (209 mil)

Windowed CERDIP

Temperature

Range:

0˚C to +70˚C

–40˚C to +85˚C

Examples:

a) PIC16HV540 - 04/P 301 =

Commercial temp., PDIP pack-

age, 4 MHz, QTP pattern #301

b) PIC16HV540 - 04I/SO =

Industrial temp., SOIC package,

4 MHz

Frequency

Range:

4 MHz (XT, RC and LP oscs)

20 MHz (HS osc)

Device:

PIC16HV540: V

PICHV540: (Tape and Reel)

Sales and Support

Products supported by a preliminary Data Sheet may possibly have an errata sheet describing minor operational differences and recom-

mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1.Your local Microchip sales ofﬁce (see below)

2.The Microchip Corporate Literature Center U.S. FAX: (602) 786-7277

3.The Microchip Worldwide Web Site at www.microchip.com

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

For latest version information and upgrade kits for Microchip Development Tools, please call 1-800-755-2345 or 1-602-786-7302.

1998 Microchip Technology Inc.

Preliminary

DS40197A-page 35

WORLDWIDE SALES AND SERVICE

AMERICAS

AMERICAS (continued)

ASIA/PACIFIC (continued)

Corporate Office

Toronto

Singapore

Microchip Technology Inc.

Microchip Technology Singapore Pte Ltd.

200 Middle Road

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-786-7200 Fax: 480-786-7277

Technical Support: 480-786-7627

Web Address: http://www.microchip.com

5925 Airport Road, Suite 200

Mississauga, Ontario L4V 1W1, Canada

Tel: 905-405-6279 Fax: 905-405-6253

#07-02 Prime Centre

Singapore 188980

Tel: 65-334-8870 Fax: 65-334-8850

Taiwan, R.O.C

Microchip Technology Taiwan

10F-1C 207

Tung Hua North Road

Taipei, Taiwan, ROC

ASIA/PACIFIC

Hong Kong

Microchip Asia Pacific

Unit 2101, Tower 2

Atlanta

Microchip Technology Inc.

500 Sugar Mill Road, Suite 200B

Atlanta, GA 30350

Metroplaza

223 Hing Fong Road

Kwai Fong, N.T., Hong Kong

Tel: 852-2-401-1200 Fax: 852-2-401-3431

Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

Tel: 770-640-0034 Fax: 770-640-0307

Boston

EUROPE

Microchip Technology Inc.

5 Mount Royal Avenue

Marlborough, MA 01752

Tel: 508-480-9990 Fax: 508-480-8575

Beijing

United Kingdom

Microchip Technology, Beijing

Unit 915, 6 Chaoyangmen Bei Dajie

Dong Erhuan Road, Dongcheng District

New China Hong Kong Manhattan Building

Beijing 100027 PRC

Arizona Microchip Technology Ltd.

505 Eskdale Road

Winnersh Triangle

Wokingham

Berkshire, England RG41 5TU

Tel: 44 118 921 5858 Fax: 44-118 921-5835

Denmark

Microchip Technology Denmark ApS

Regus Business Centre

Lautrup hoj 1-3

Ballerup DK-2750 Denmark

Tel: 45 4420 9895 Fax: 45 4420 9910

Chicago

Microchip Technology Inc.

333 Pierce Road, Suite 180

Itasca, IL 60143

Tel: 86-10-85282100 Fax: 86-10-85282104

India

Tel: 630-285-0071 Fax: 630-285-0075

Dallas

Microchip Technology Inc.

4570 Westgrove Drive, Suite 160

Addison, TX 75248

Microchip Technology Inc.

India Liaison Office

No. 6, Legacy, Convent Road

Bangalore 560 025, India

Tel: 91-80-229-0061 Fax: 91-80-229-0062

Tel: 972-818-7423 Fax: 972-818-2924

Dayton

Microchip Technology Inc.

Two Prestige Place, Suite 150

Miamisburg, OH 45342

Tel: 937-291-1654 Fax: 937-291-9175

Detroit

Microchip Technology Inc.

Tri-Atria Office Building

32255 Northwestern Highway, Suite 190

Farmington Hills, MI 48334

Tel: 248-538-2250 Fax: 248-538-2260

Japan

France

Microchip Technology Intl. Inc.

Benex S-1 6F

Arizona Microchip Technology SARL

Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

3-18-20, Shinyokohama

Kohoku-Ku, Yokohama-shi

Kanagawa 222-0033 Japan

Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Batiment A - ler Etage

91300 Massy, France

Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79

Germany

Arizona Microchip Technology GmbH

Gustav-Heinemann-Ring 125

D-81739 München, Germany

Tel: 49-89-627-144 0 Fax: 49-89-627-144-44

Korea

Microchip Technology Korea

168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku

Seoul, Korea

Tel: 82-2-554-7200 Fax: 82-2-558-5934

Shanghai

Microchip Technology

RM 406 Shanghai Golden Bridge Bldg.

2077 Yan’an Road West, Hong Qiao District

Shanghai, PRC 200335

Italy

Los Angeles

Arizona Microchip Technology SRL

Centro Direzionale Colleoni

Palazzo Taurus 1 V. Le Colleoni 1

20041 Agrate Brianza

Microchip Technology Inc.

18201 Von Karman, Suite 1090

Irvine, CA 92612

Tel: 949-263-1888 Fax: 949-263-1338

New York

Microchip Technology Inc.

150 Motor Parkway, Suite 202

Hauppauge, NY 11788

Tel: 631-273-5305 Fax: 631-273-5335

Milan, Italy

Tel: 39-039-65791-1 Fax: 39-039-6899883

Tel: 86-21-6275-5700 Fax: 86 21-6275-5060

11/15/99

San Jose

Microchip received QS-9000 quality system

certification for its worldwide headquarters,

design and wafer fabrication facilities in

Chandler and Tempe, Arizona in July 1999. The

Company’s quality system processes and

procedures are QS-9000 compliant for its

PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs and microperipheral

products. In addition, Microchip’s quality

system for the design and manufacture of

development systems is ISO 9001 certified.

Microchip Technology Inc.

2107 North First Street, Suite 590

San Jose, CA 95131

Tel: 408-436-7950 Fax: 408-436-7955

Printed on recycled paper.

Information contained in this publication regarding device applications and the like is intended for suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed

by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products

as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip

logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.

 1999 Microchip Technology Inc.

PICHV540-20/SO [MICROCHIP]

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