SY100S351JY-TR [MICROCHIP]
100S SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28;
| 型号： | SY100S351JY-TR |
| 厂家： | 
MICROCHIP |
| 描述： | 100S SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28 输出元件 逻辑集成电路 触发器 |
| 文件： | 总6页 (文件大小：391K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1
HEXꢀDꢀFLIP-FLOP
SY100S351
FEATURES
DESCRIPTION
■ꢀ Max.ꢀtoggleꢀfrequencyꢀofꢀ700MHz
■ꢀ ClockꢀtoꢀQꢀmax.ꢀofꢀ1200ps
■ꢀ IEEꢀmin.ꢀofꢀ–98mA
The SY100S351 offers six D-type, edge-triggered, master/
slave flip-flops with differential outputs, and is designed for
use in high-performance ECL systems. The flip-flops are
controlled by the signal from the logical OR operation on a
pair of common clock signals (CPa, CPb). Data enters the
master when both CPa and CPb are LOW and transfers to the
slave when either CPa or CPb (or both) go to a logic HIGH.
The Master Reset (MR) input overrides all other inputs and
takes the Q outputs to a logic LOW. The inputs on this device
have 75kΩ pull-down resistors.
■ꢀ Industryꢀstandardꢀ100KꢀECLꢀlevels
■ꢀ Extendedꢀsupplyꢀvoltageꢀoption:
VEEꢀ=ꢀ–4.2Vꢀtoꢀ–5.5V
■ꢀ Voltageꢀandꢀtemperatureꢀcompensationꢀforꢀimprovedꢀ
noiseꢀimmunity
■ꢀ Internalꢀ75kΩꢀinputꢀpull-downꢀresistors
■ꢀ 50%ꢀfasterꢀthanꢀFairchildꢀ300K
■ꢀ Betterꢀthanꢀ20%ꢀlowerꢀpowerꢀthanꢀFairchild
■ꢀ FunctionꢀandꢀpinoutꢀcompatibleꢀwithꢀFairchildꢀF100K
■ꢀ Availableꢀinꢀ28-pinꢀPLCCꢀpackage
BLOCK DIAGRAM
PINꢀNAMES
ꢀ
Pinꢀ
ꢀ
Function
D0 — D5
CPa, CPb
MR
Data Inputs
Common Clock Inputs
Asynchronous Master Reset Input
Data Outputs
Q0 — Q5
Q0 — Q5
VEES
Complementary Data Outputs
VEE Substrate
VCCA
VCCO for ECL Outputs
Rev.: I
Amendment: /0
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
1
Issue Date: June 2010
SY100S351
Micrel, Inc.
PACKAGE/ORDERINGꢀINFORMATION
OrderingꢀInformation
ꢀ
Packageꢀ Operatingꢀꢀ
Packageꢀ
Markingꢀ
Lead
Finish
PartꢀNumberꢀ
Typeꢀ
J28-1
J28-1
J28-1
Rangeꢀ
SY100S351JC
Commercial
Commercial
Commercial
SY100S351JC
SY100S351JC
Sn-Pb
Sn-Pb
SY100S351JCTR(1)
SY100S351JZ(2)
SY100S351JZ with
Matte-Sn
Pb-Free bar-line indicator
SY100S351JZTR(1, 2)
SY100S351JY(1)
J28-1
J28-1
Commercial
Industrial
SY100S351JZ with
Pb-Free bar-line indicator
Matte-Sn
Matte-Sn
SY100S351JY with
Pb-Free bar-line indicator
SY100S351JY with
Pb-Free bar-line indicator
Matte-Sn
SY100S351JYTR(1,2)
Industrial
J28-1
Notes:
28-PinꢀPLCCꢀ(J28-1)
1. Tape and Reel.
2. Pb-Free package is recommended for new designs.
TRUTHꢀTABLES
ꢀ
ꢀ
AsynchronousꢀOperation(1)
Inputsꢀ
CPaꢀ
ꢀ
ꢀ
SynchronousꢀOperation(1)
Inputsꢀ
CPaꢀ
Outputs
Qnꢀ(t+1)
L
Outputs
Dnꢀ
CPbꢀ
MRꢀ
Dnꢀ
L
CPbꢀ
MRꢀ
L
Qnꢀ(t+1)
u
u
L
L
H
u
L
L
L
u
u
u
H
L
L
H
X
X
X
H
H
L
L
NOTE:
L
L
1. H = High Voltage Level
L = Low Voltage Level
X = Don't Care
H
X
L
H
L
Qn(t)
Qn(t)
Qn(t)
t = Time before CP Positive Transition
t+1 = Time after CP Positive Transition
u = LOW-to-HIGH Transition
X
L
X
L
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
2
SY100S351
Micrel, Inc.
DCꢀELECTRICALꢀCHARACTERISTICS
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND
ꢀ
Symbolꢀ
ꢀ
Parameterꢀ
Min.ꢀ
Typ.ꢀ
Max.ꢀ
Unitꢀ
ꢀ
Condition
IIH
Input HIGH Current
MR
D0 – D5
µA
VIN = VIH (Max.)
—
—
—
—
—
—
270
200
300
CPa, CPb
IEE
Power Supply Current
–98
–71
–49
mA
Inputs Open
ACꢀELECTRICALꢀCHARACTERISTICS
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND
ꢀ
ꢀ
ꢀ
ꢀ
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀTAꢀ=ꢀ0°CꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀTAꢀ=ꢀ+25°CꢀꢀꢀꢀꢀꢀꢀTAꢀ=ꢀ+85°C
TAꢀ=ꢀ-40°C
ꢀ Symbolꢀ
Parameterꢀ
ꢀ
Min.
Maꢀx.
Min.ꢀ
700
—
Max.ꢀ
—
Min.ꢀ
700
—
Max.ꢀ
—
Min.ꢀꢀꢀꢀꢀꢀꢀMax.ꢀꢀꢀUnitꢀꢀꢀꢀCondition
700
fMAX
Toggle Frequency
700
—
—
MHz
ps
1200
1200
900
tPLH
tPHL
Propagation Delay
CPa, CPb to Output
1200
1200
1200
ps
ps
ps
tPLH
tPHL
Propagation Delay
MR to Output
—
1200
900
—
1200
900
—
1200
900
tTLH
tTHL
Transition Time
20% to 80%, 80% to 20%
300
300
300
300
tS
Set-up Time
D0–D5
500
500
—
500
—
500
—
1000
MR (Release Time)
1000
—
1000
—
1000
—
tH
Hold Time, D0–D5
550
—
550
—
550
—
ps
ps
550
tPW (H)
Pulse Width HIGH
1000
1000
—
1000
—
1000
—
CPa, CPb, MR
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
3
SY100S351
Micrel, Inc.
TIMINGꢀDIAGRAMS
PropagationꢀDelayꢀ(Clock)ꢀandꢀTransitionꢀTimes
NOTE:
VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND
PropagationꢀDelayꢀ(Resets)
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
4
SY100S351
Micrel, Inc.
TIMINGꢀDIAGRAMS
DataꢀSet-upꢀandꢀHoldꢀTime
Notes:
1. VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND
2. tS is the minimum time before the transition of the clock that information
must be present at the data input.
3. tH is the minimum time after the transition of the clock that information
must remain unchanged at the data input.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
5
SY100S351
Micrel, Inc.
28-PINꢀPLCCꢀ(J28-1)
MICREL,ꢀINC.ꢀ 2180ꢀFORTUNEꢀDRIVEꢀ SANꢀJOSE,ꢀCAꢀ 95131ꢀ USA
t e l + 1 (408) 944-0800 f a x + 1 (408) 474-1000 w e b http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2006 Micrel, Incorporated.
M9999-060910
hbwhelp@micrel.com or (408) 955-1690
6
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