1110C65M00000AA [MICROSEMI]

TTL Output Clock Oscillator, 65MHz Nom, PLASTIC, FLAT PACKAGE-20;
1110C65M00000AA
型号: 1110C65M00000AA
厂家: Microsemi    Microsemi
描述:

TTL Output Clock Oscillator, 65MHz Nom, PLASTIC, FLAT PACKAGE-20

机械 振荡器
文件: 总22页 (文件大小:453K)
中文:  中文翻译
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REV  
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DESCRIPTION  
DATE  
PREP  
APPD  
LT  
CO-14428  
4/30/09  
DF/LT  
VECTRON INTERNATIONAL  
MOUNT HOLLY SPRINGS, PA 17065  
DATE  
10/26/00  
11/1/00  
10/30/00  
PREPARED BY  
QUALITY  
Stan Carpenter  
SWP  
Oscillator Specification, Hybrid Clock  
Hi-Rel Standard  
CODE IDENT NO SIZE DWG. NO.  
REV  
S. Carpenter  
ENGINEERING  
K
OS-68338  
00136 A  
UNSPECIFIED TOLERANCES: N/A  
SHEET 1 0F 20  
1.  
SCOPE  
1.1  
General. This specification defines the design, assembly and functional evaluation of high  
reliability, hybrid clock oscillators produced by Vectron International. Devices delivered to  
this specification represent the standardized Parts, Materials and Processes (PMP) Program  
developed, implemented and certified for advanced applications and extended environments.  
1.2  
Applications Overview. The designs represented by these products were primarily developed  
for the MIL-Aerospace community. The lesser Design Pedigrees and Screening Options  
imbedded within OS-68338 bridge the gap between Space and COTS hardware by providing  
custom hardware with measures of mechanical, assembly and reliability assurance needed for  
Military or Ruggedized COTS environments.  
2.  
APPLICABLE DOCUMENTS  
2.1  
Specifications and Standards. The following specifications and standards form a part of this  
document to the extent specified herein. The issue currently in effect on the date of quotation  
will be the product baseline, unless otherwise specified. In the event of conflict between the  
texts of any references cited herein, the text of this document shall take precedence.  
Military  
MIL-PRF-55310  
MIL-PRF-38534  
Oscillators, Crystal Controlled, General Specification For  
Hybrid Microcircuits, General Specification For  
Standards  
MIL-STD-202  
MIL-STD-883  
MIL-STD-1686  
Test Method Standard, Electronic and Electrical Component Parts  
Test Methods and Procedures for Microelectronics  
Electrostatic Discharge Control Program for Protection of Electrical and  
Electronic Parts, Assemblies and Equipment  
Other  
HT-67849  
QSP-90100  
VL-65339  
Test Specification, OS-68338 Hybrids, Hi-Rel Standard  
Quality Systems Manual, Vectron International  
Identification Common Documents, Materials and Processes, Hi-Rel XO  
3.  
GENERAL REQUIREMENTS  
3.1  
Classification. All devices delivered to this specification are of hybrid technology conforming  
to Type 1, Class 2 of MIL-PRF-55310. Primarily developed as a Class S equivalent  
specification, options are imbedded within it to also produce Class B, Engineering Model and  
Ruggedized COTS devices. Devices carry a Class 2 ESDS classification.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
2
3.2  
3.3  
Item Identification. External packaging choices are of metal flatpacks, DIP’s and ceramic J-  
lead 9x14mm and LCC’s with either TTL or ACMOS logic output. Unique Model Number  
Series’ are utilized to identify device package configurations and output logic as listed in Table  
1.  
Absolute Maximum Ratings.  
a. Supply Voltage Range (VCC):  
b. Storage Temperature Range (TSTG):  
c. Junction Temperature (TJ):  
-0.5Vdc to +7.0Vdc  
-65°C to +125°C  
+175°C  
d. Lead Temperature (soldering, 10 seconds):  
e. Output Source/Sink Current  
+300°C  
70 mA  
3.4  
Design, Parts, Materials and Processes, Assembly, Inspection and Test.  
3.4.1 Design. The ruggedized designs implemented for these devices are proven in military and  
space applications under extreme environments. Designs utilize 4-point crystal mounting in  
compliment with Established Reliability (MIL-ER) componentry. When specified, radiation  
hardening up to 100krad(Si) (RHA level R) can be included without altering the device’s  
internal topography.  
3.4.1.1 Design and Configuration Stability. Barring changes to improve performance by reselecting  
passive chip component values to offset component tolerances, there will not be fundamental  
changes to the design or assembly or parts, materials and processes after first product delivery  
of that item without written approval from the procuring activity.  
3.4.1.2 Environmental Integrity. Designs have passed the environmental qualification levels of MIL-  
PRF-55310. These designs have also passed extended dynamic levels of at least:  
Sine Vibration: MIL-STD-202, Method 204, Condition G (30g pk.)  
Random Vibration: MIL-STD-202, Method 214, Condition II-J (43.92g rms)  
Mechanical Shock: MIL-STD-202, Method 213, Condition F (1500g, 0.5ms)  
3.4.2 Prohibited Parts, Materials and Processes. The items listed are prohibited for use in high  
reliability devices produced to this specification.  
a. Gold metallization of package elements without a barrier metal.  
b. Zinc chromate as a finish.  
c. Cadmium, zinc, or pure tin external or internal to the device.  
d. Plastic encapsulated semiconductor devices.  
e. Ultrasonically cleaned electronic parts.  
f. Heterojunction Bipolar Transistor (HBT) technology.  
g. ‘getter’ materials  
3.4.3 Assembly. Manufacturing utilizes standardized procedures, processes and verification  
methods to produce MIL-PRF-55310 Class S / MIL-PRF-38534 Class K equivalent devices.  
MIL-PRF-38534 Group B Option 1 in-line inspection is included on radiation hardened part  
numbers to further verify lot pedigree. Traceability of all components and production lots are  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
3
in accordance with MIL-PRF-38534, as a minimum. Tabulated records are provided as a part  
of the deliverable data package. Devices are handled in accordance with MIL-STD-1686 for  
Class 1 devices.  
3.4.4 Inspection. The inspection requirements of MIL-PRF-55310 apply to all devices delivered to  
this document. Inspection conditions and standards are documented in accordance with the  
Quality Assurance, ISO-9001 derived, System of QSP-90100.  
3.4.5 Test. The Screening test matrix of Table 5 is tailored for selectable-combination testing to  
eliminate costs associated with the development/maintenance of device-specific documentation  
packages while maintaining performance integrity.  
3.4.6 Marking. Device marking shall be in accordance with the requirements of MIL-PRF-55310.  
3.4.7 Ruggedized COTS Design Implementation. Design Pedigree “D” devices (see ¶ 5.2) use the  
same robust designs found in the other device pedigrees. They do not include the provisions of  
traceability or the Class-qualified componentry noted in paragraphs 3.4.3 and 4.1.  
4.  
DETAIL REQUIREMENTS  
Components  
4.1  
4.1.1 Crystals. Cultured quartz crystal resonators are used to provide the selected frequency for the  
devices. The optional use of Premium Q swept quartz can, because of its processing to remove  
impurities, be specified for better frequency aging characteristics. In accordance with MIL-  
PRF-55310, the manufacturer has a documented crystal element evaluation program.  
4.1.2 Passive Components. Established Reliability (ER) failure level R minimum passive  
components are procured from QPL suppliers. Lot evaluations are in accordance with MIL-  
PRF-55310 or Enhanced Element Evaluation as specified in Table 7.  
4.1.3 Class S Microcircuits. Microcircuits are procured from wafer lots that have passed MIL-PRF-  
55310 Lot Acceptance Tests for Class S devices. The prescribed die carries a Class 2 ESDS  
classification in accordance with MIL-PRF-38535. When optionally specified, further testing  
in accordance with MIL-PRF-55310 and MIL-PRF-38534 is performed for radiation hardness  
assurance and for Enhanced Element Evaluation as specified in Table 6. Those microcircuits,  
identified by a unique part number, are certified for 100krad(Si) total ionizing dose (TID),  
RHA level R (2X minimum margin). NSC, as the original 54ACT designer, rates the SEU  
LET at >40 MeV and SEL at >120MeV for the FACT™ family (AN-932). Vectron has  
conducted additional SEE testing in 2008 to verify this performance since our lot wafer testing  
does not include these parameters and determinations.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
4
4.1.3.1 Class B Microcircuits. When specified, microcircuits assembled into OS-68338 Design  
Pedigree letters “B” and “C” devices (¶ 5.2a) are procured from wafer lots that have passed  
MIL-PRF-55310 element evaluations for Class B devices.  
4.1.4 Packages. Packages are procured that meet the construction, lead materials and finishes as  
specified in MIL-PRF-55310. Package lots are upscreened in accordance with the  
requirements of MIL-PRF-38534 as applicable.  
4.1.5 Traceability. Class S active device lots are homogenous and traceable to the manufacturer’s  
individual wafer. Swept Quartz Crystals are traceable to the quartz bar and the processing  
details of the autoclave lot, as applicable. All other elements and materials are traceable to  
their manufacturer and incoming inspection lots.  
4.1.6 Enhanced Element Evaluation. When Design Pedigree Option “E” is specified, active and  
passive devices with Enhanced Element Evaluation as listed in Table 6 and 7 shall be  
implemented for the highest reliability preference.  
4.2  
Mechanical.  
4.2.1 Package Outline. Table 1 links each Hi-Rel Standard Model Number of this specification to a  
corresponding package style. Mechanical Outline information of each package style is found  
in the referenced Figure.  
4.2.2 Thermal Characteristics. The worst case thermal characteristics of each package style are  
found in Table 4.  
4.3  
Electrical.  
4.3.1 Input Power. Devices are designed for standard 5.0 volt dc operation, 10%. Optional 3.3  
Vdc ( 10%) input performance for ACMOS output conditions. Current is measured, no load,  
at maximum rated operating voltage.  
4.3.2 Temperature Range. Operating range is -55°C to +125°C.  
4.3.3 Frequency Tolerance. Initial accuracy at +23°C is 15 ppm maximum. Frequency-  
Temperature Stability is 50 ppm maximum from +23°C reference. Frequency-Voltage  
Tolerance is 4 ppm maximum.  
4.3.4 Frequency Aging. Aging limits, and when tested in accordance with MIL-PRF-55310 Group B  
inspection, shall not exceed 1 ppm the first 30 days, 5 ppm Year 1 and 2 ppm per year  
thereafter. When screening Option F is selected, aging is performed on 100% of the lot and  
Vectron does not apply the PDA as specified in MIL-PRF-55310. Data will be presented for  
each individual unit to show compliance to the aging limit.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
5
4.3.4.1 Frequency Aging Duration Option. By customer request, the Aging test may be terminated  
after 15 days if the measured aging rate is less than half of the specified aging rate. This is a  
common method of expediting 30-Day Aging without incurring risk to the hardware and used  
quite successfully for numerous customers. It is based on the ‘least squares fit’ determinations  
of MIL-PRF-55310 paragraph 4.8.35. The ‘half the time/half the spec’ limit is generally  
conservative as roughly 2/3 of a unit’s Aging deviation occurs within that period of time.  
Vectron’s automated aging systems take about 6 data points per day, so a lot of data is  
available to do very accurate projections, much more data than what is required by MIL-PRF-  
55310. The delivered data would include the Aging plots projected to 30 days. If the units  
would not perform within that limit then they would continue to full 30 Day term. Please  
advise by purchase order text if this may be an acceptable option to exercise as it assists in  
Production Test planning.  
4.3.5 Operating Characteristics. Symmetrical square wave limits are dependent on the device  
frequency and are in accordance with Tables 2 and 2A. Waveform measurement points and  
logic limits are in accordance with MIL-PRF-55310. Start-up time is 10.0 msec. maximum.  
4.3.6 Output Load. Standard TTL (6 or 10) and ACMOS (10k, 15pF) test loads are in accordance  
with MIL-PRF-55310.  
5.  
QUALITY ASSURANCE PROVISIONS AND VERIFICATION  
5.1  
Verification and Test. Device lots shall be tested prior to delivery in accordance with the  
applicable Screening Option letter as stated by the 15th character of the part number. Table 5  
tests are conducted in the order shown and annotated on the appropriate process travelers and  
data sheets of the governing test procedure. For devices that require Screening Options that  
include MIL-PRF-55310 Group A testing, the Post-Burn-In Electrical Test and the Group A  
Electrical Test are combined into one operation.  
5.1.1 Screening Options. The Screening Options, by letter, are summarized as:  
A
B
Modified MIL-PRF-38534 Class K  
Modified MIL-PRF-55310 Class B Screening & Group A Quality Conformance  
Inspection (QCI)  
C
D
E
F
Modified MIL-PRF-55310 Class S Screening & Group A QCI  
Modified MIL-PRF-38534 Class K with Burn-in Delta Aging  
Modified MIL-PRF-55310 Class B Screening, Groups A & B QCI  
Modified MIL-PRF-55310 Class S Screening, Groups A & B QCI  
Modified MIL-PRF-55310 Class B Screening & Post Burn-in Nominal  
Electricals  
G
X
Engineering Model (EM)  
5.2  
Optional Design, Test and Data Parameters. The following is a list of design, assembly,  
inspection and test options that can be selected or added by purchase order request.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
6
a. Design Pedigree (choose one as the 5th character in the part number):  
(E) Enhanced Element Evaluation, 100krad Class S die, Premium Q Swept Quartz  
(R) Hi-Rel design w/ 100krad Class S die, Premium Q Swept Quartz  
(V) Hi-Rel design w/ 100krad Class S die, Cultured Quartz  
(X) Hi-Rel design w/ Cultured Quartz, Class S die  
(B) Hi-Rel design w/ Swept Quartz, Class B die  
(C) Hi-Rel design w/ Cultured Quartz, Class B die  
(D) Hi-Rel design w/ Cultured Quartz and commercial grade components  
b. Input Voltage, (A) for 5.0V, (B) for 3.3V as the 14th character  
c. Frequency-Temperature Slew Test  
d. Radiographic Inspection  
e. Group C Inspection: MIL-PRF-55310 (requires 8 pc. sample)  
f. Group C Inspection: MIL-PRF-38534 (requires 8 pc. sample – 5 pc. Life, 3 pc. RGA)  
g. Internal Water-Vapor Content (RGA) samples and test performance  
h. MTBF Reliability Calculations  
i. Worst Case/Derating Analysis  
j. Deliverable Process Identification Documentation (PID)  
k. Customer Source Inspection (pre-cap / final)  
5.3  
5.4  
Test Conditions. Unless otherwise stated herein, inspections are performed in accordance with  
those specified in MIL-PRF-55310 and MIL-PRF-38534, in that order. Process travelers  
identify the applicable methods, conditions and procedures to be used. Examples of electrical  
test procedures that correspond to MIL-PRF-55310 requirements are shown in Table 3.  
Special Tests and Descriptions.  
5.4.1 Frequency-Temperature Slew. Frequency-Temperature Slew Test has been developed as an  
indicator of higher than normal internal water vapor content. The incremental temperature  
sweep from +125°C to -55°C and back to +125°C records output frequency fluctuations  
emulating the mass loading of moisture deposited on the crystal blank surface. Though not  
replacing a customer’s internal water-vapor content (RGA) requirement, confidence is  
increased without destructively testing otherwise good devices.  
5.4.2 Burn-in Delta Frequency Aging (in Option D). The frequency measurement for burn-in delta  
measurements is performed at the crystal’s upper turning point temperature where its effects on  
repeatable frequency accuracy are maximized. Dependent on the crystal specified, this  
temperature is typically between +65°C and +85°C, 0.2°C.  
5.5  
Deliverable Data. The manufacturer supplies the following data, as a minimum, with each lot  
of devices:  
a. Completed assembly and screening lot travelers, including rework history.  
b. Electrical test variables data, identified by unique serial number.  
c. Frequency-Temperature Slew plots, Radiographic films, Group C data and RGA data as  
required by purchase order.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
7
5.6  
5.7  
Discrepant Material. All MRB authority resides with the procuring activity.  
Failure Analysis. Any catastrophic failure (no clocking, no current) at Post Burn-In or after  
will be evaluated for root cause. The customer will be notified after occurrence and upon  
completion of the evaluation.  
6.  
PREPARATION FOR DELIVERY  
6.1  
Packaging. Devices will be packaged in a manner that prevents handling and transit damage  
during shipping. Devices will be handled in accordance with MIL-STD-1686 for Class 1  
devices.  
7.  
ORDERING INFORMATION  
7.1  
Ordering Part Number. The ordering part number is made up of an alphanumeric series  
of 15 characters. Design-affected product options, identified by the parenthetic letter on  
the Optional Parameters list (¶ 5.2a and b), are included within the device part number.  
The Part Number breakdown is described as:  
1104 R 10M00000 A F  
Model # (Table 1)  
Screening Option  
per Table 5, 5.1.1  
Design Pedigree  
E = Enhanced Element  
Evaluation, 100krad  
Class S die, Swept  
Quartz  
Input Voltage  
A= 5.0V  
B= 3.3V  
R = 100krad Class S die,  
Swept Quartz  
Frequency  
V = 100krad Class S  
die, Cultured Quartz  
X = Class S die,  
Cultured Quartz  
B = Class B die,  
Swept Quartz  
C = Class B die,  
Cultured Quartz  
D = Ruggedized COTS:  
Cultured Quartz,  
Commercial Grade  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
8
7.1.1 Model Number. The device model number is the four (4) digit number assigned to a  
corresponding package and output combination per Table 1.  
7.1.2 Design Pedigree. Class S variants correspond to either letter “E”, “R”, “V” or “X” and are  
described in paragraph 5.2a. Class B variants correspond to either letter “B” or “C” and are  
described in paragraph 5.2a. Ruggedized COTS, using commercial grade components,  
corresponds to letter “D”.  
7.1.2.1 Input Voltage. Voltage is the 14th character, letters “A” representing 5.0V and “B” for 3.3V.  
7.1.3 Output Frequency. The nominal output frequency is expressed in the format as specified in  
MIL-PRF-55310 utilizing eight (8) characters.  
7.1.4 Screening Options. The 15th character is the Screening Option (letter A thru G or X) selected  
from Table 4.  
7.2  
Optional Design, Test and Data Parameters. Test and documentation requirements above that  
of the standard high reliability model shall be specified by separate purchase order line items  
(as listed in ¶ 5.2c thru k).  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
9
HI-REL  
STANDARD  
MODEL #  
OUTPUT  
Square  
Wave  
,
PIN I/O 1/  
MECHANICAL  
OUTLINE  
PACKAGE  
Vcc  
Out Gnd/ E/D  
Case  
FIGURE 1  
FIGURE 2  
FIGURE 3  
FIGURE 6  
FIGURE 7  
FIGURE 4  
FIGURE 4  
FIGURE 5  
FIGURE 8  
FIGURE 9  
1101  
1102  
1103  
1104  
1105  
1106  
1113  
1115  
1116  
1118 2/.  
12 Lead Flatpack  
14 Lead Flatpack  
16 Lead Flatpack  
20 Lead Flatpack  
14 Pin DIP  
ACMOS  
ACMOS  
ACMOS  
12  
14  
8
7
8
6
7
na  
na  
na  
na  
na  
na  
na  
na  
1
10  
9
ACMOS 13, 20 11  
10  
7
ACMOS  
ACMOS  
ACMOS  
ACMOS  
ACMOS  
ACMOS  
14  
4
8
39  
39  
5
20 Lead Ceramic  
40 Pad LCC  
4 pin ½ DIP  
37  
37  
4
4
8
J-lead SMT  
4 pad 5 x 7mm  
4
3
2
4
3
2
1
FIGURE 1  
FIGURE 2  
FIGURE 3  
FIGURE 6  
FIGURE 7  
FIGURE 4  
FIGURE 4  
FIGURE 8  
1107  
1108  
1109  
1110  
1111  
1112  
1114  
1117  
12 Lead Flatpack  
14 Lead Flatpack  
16 Lead Flatpack  
20 Lead Flatpack  
14 Pin DIP  
TTL  
TTL  
TTL  
TTL  
TTL  
TTL  
TTL  
TTL  
12  
14  
8
7
8
6
7
na  
na  
na  
na  
na  
na  
na  
1
10  
9
13, 20 11  
10  
7
14  
4
8
39  
39  
3
20 Lead Ceramic  
40 Pad LCC  
J-lead SMT  
37  
37  
2
4
4
1/. All unassigned pins have no internal connections or ties.  
2/. See Appendix A  
TABLE 1 - Item Identification and Package Outline  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
10  
Frequency Range @ 5V Operation: 0.35 MHz to 100.0 MHz 1/.  
Frequency Range @ 3.3V Operation: 0.35 MHz to 100.0 MHz  
Temperature Range: -55°C to +125°C  
Frequency Tolerance, Initial Accuracy @ +23°C: 15 ppm max.  
Frequency-Temperature Stability from +23°C ref.: 50 ppm max.  
Frequency-Voltage Tolerance: 4 ppm max. (Vcc 10%)  
Frequency Aging: 1 ppm max. 1st 30 days, 5 ppm max. Year 1, 2 ppm max. Year 2+  
Start-up Time: 10.0 ms max.  
Frequency  
Range  
(MHz)  
Current (mA)  
(max. no load)  
5.5V | 3.63V  
Rise / Fall  
Times  
(ns max.)  
Duty Cycle  
(%)  
Fan-out  
(if TTL)  
0.35 - 4.0  
10  
15  
15  
20  
35  
45  
55  
6
6
5
5
5
5
3
3
45 to 55  
45 to 55  
40 to 60  
40 to 60  
40 to 60  
40 to 60  
40 to 60  
10  
10  
10  
6
4.0 – 12.0  
>12.0 – 24.0  
>24.0 – 40.0  
>40.0 – 65.0  
>65.0 – 85.0  
>85.0 – 100  
8
10  
15  
20  
25  
30  
6
6
6
1/. Exception: Frequency Range @ 5V Operation for model 1117 (TTL) series is limited to  
85 MHz.  
2/. Waveform measurement points and logic limits are in accordance with MIL-PRF-55310.  
TABLE 2 - Electrical Performance Characteristics  
OPERATION LISTING  
REQUIREMENTS AND  
CONDITIONS  
VECTRON  
TEST  
PROCEDURE  
@ all Electrical tests  
Input Current (no load)  
Initial Accuracy @ Ref. Temp.  
Output Logic Voltage Levels  
Rise and Fall Times  
MIL-PRF-55310, Para 4.8.5.1  
MIL-PRF-55310, Para 4.8.6  
MIL-PRF-55310, Para 4.8.21.3  
MIL-PRF-55310, Para 4.8.22  
MIL-PRF-55310, Para 4.8.23  
GR-51681  
GR-51596  
GR-51597  
GR-51599  
GR-51601  
Duty Cycle  
@ Post Burn-In Electrical only  
Overvoltage Survivability  
MIL-PRF-55310, Para 4.8.4  
MIL-PRF-55310, Para 4.8.10.1  
MIL-PRF-55310, Para 4.8.14  
MIL-PRF-55310, Para 4.8.29  
GR-37269  
GR-51602  
GR-51602  
GR-61352  
Initial Freq. – Temp. Accuracy  
Freq. – Voltage Tolerance  
Start-up Time (fast/slow start)  
TABLE 3 - Electrical Test Parameters  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
11  
Model #  
Thermal Resistance  
Junction to Case  
θjc (°C / W)  
17.32  
Junction Temp.  
Tj (°C @ max. Icc)  
1101 / 1107  
1102 / 1108  
1103 / 1109  
1104 / 1110  
1105 / 1111  
1106 / 1112  
1113 / 1114  
1115  
5.24  
5.24  
5.20  
5.13  
5.92  
1.33  
1.33  
6.12  
5.42  
1.14  
17.32  
17.20  
16.97  
19.57  
4.38  
4.38  
20.22  
17.91  
1116 / 1117  
1118  
Maximum operating power = 302.5 mW per Table 2.  
3.77  
TABLE 4 - Thermal Characteristics  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
12  
OPN.  
NO.  
OPERATION LISTING  
REQUIREMENTS AND CONDITIONS  
MIL Class Similarity  
Option  
A
Option  
B
Option  
C
Option  
D
Option  
E
Option  
F
Option  
G
Option  
X
K
B-  
S-  
K+  
B
S
EM  
SCREENING  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
1
2
Non-Destruct Bond Pull  
Internal Visual  
MIL-STD-883, Meth 2023  
MIL-STD-883, Meth 2017 Class K,  
Meth 2032 Class K  
Completed During Assembly  
3
4
Stabilization (Vacuum) Bake  
Thermal Shock  
MIL-STD-883, Meth 1008, Cond C,  
150°C, 48 hours min.  
MIL-STD-883, Meth 1011, Cond A  
NR  
X
NR  
X
X
X
NR  
X
NR  
X
X
X
NR  
X
NR  
NR  
NR  
X
5
Temperature Cycle  
MIL-STD-883, Meth 1010, Cond. B,  
10 cycles min.  
6
Constant Acceleration  
Particle Impact Noise Detection  
Electrical Testing, Pre Burn-In  
Freq-Temp Slew Test  
1st Burn-In  
MIL-STD-883, Meth 2001, Cond A,  
Y1 plane only, 5000 g’s  
X
X
X
X
X
X
X
7
MIL-STD-883, Meth 2020, Cond B  
X
X
X
X
X
X
NR  
X
8
Perform tests in Table 3. Nominal Vcc, nominal  
temperature  
X
X
X
X, 3/  
AR  
X
X
X
9
Operating temp. range, frequency plotted at 1.0°C  
steps  
AR  
AR  
AR  
AR  
AR  
NR  
NR  
NR  
NR  
NR  
NR  
X
10  
11  
12  
13  
14  
MIL-STD-883, Meth 1015, Condition B  
X
160 hrs.  
X
X
X
X
X
X
X
160 hrs.  
NR  
240 hrs.  
NR  
160 hrs.  
X, 4/  
160 hrs.  
NR  
240 hrs.  
NR  
160 hrs.  
NR  
Electrical Testing, Intermediate  
2nd Burn-In  
Perform tests in Table 3. Nominal Vcc, nominal  
temperature  
MIL-STD-883, Meth 1015, Condition B  
X
160 hrs.  
X
NR  
X
NR  
X
X
NR  
X
NR  
X
NR  
160 hrs.  
X, 5/  
Electrical Testing, Post Burn-In  
(Group A)  
Perform tests in Table 3. Nominal Vcc & extremes,  
nominal temperature & extremes  
MIL-STD-883, Meth 1014, Cond A2  
5 x 10-8 atm cc/sec max  
X
nom. Vcc  
X
Seal: Fine Leak  
X
X
X
X
X
X
15  
16  
Seal: Gross Leak  
MIL-STD-202, Meth 112, Cond D  
MIL-STD-883, Meth 2012  
X
X
X
X
X
X
X
X
X
X
X
Radiographic Inspection  
AR  
AR  
AR  
NR  
NR  
17  
18  
19  
Solderability  
MIL-STD-883, Meth 2003  
MIL-STD-883, Meth 2009  
MIL-PRF-55310, para. 4.8.35.1  
6/  
6/  
6/  
6/  
6/  
6/  
6/  
NR  
X 7/  
NR  
External Visual & Mechanical  
Aging, 30 Day 8/  
(M55310 Group B)  
X 7/  
NR  
X 7/  
NR  
X 7/  
NR  
X 7/  
NR  
X 7/  
X 7/  
X 9/.  
X 7/  
NR  
13 pcs.  
LEGEND: X = Required, NR = Not Required, AR = As Required  
TABLE 5 - Test Matrix  
3/ includes frequency recorded at the crystal Upper Turning Point (UTP) temperature. 4/ F @ UTP = 7.5 ppm maximum.  
5/ F @ UTP = 2.5 ppm maximum. 6/ Performed at package LAT. Include LAT data sheet  
7/ When specified, RGA samples will be removed from the lot after completion of this operation. Use of Screening failures require customer concurrence.  
8/ By customer request, the Aging test may be terminated after 15 days if the measured aging rate is less than one-half the specified aging rate, as described in  
paragraph 4.3.4.1 herein. See the customer PO. 9/. PDA is not applicable.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
13  
Mil-PRF-  
38534  
Subgroup Class  
K
Test  
Mil-STD-883  
Quantity  
Reference  
Paragraph  
Method  
Condition  
(accept number)  
Element Electrical  
A. May perform at wafer level  
B. All failures shall be removed  
from the lot  
1
X
100%  
C.3.3.1  
C. Perform at room ambient  
2
3
4
X
X
Element Visual  
Internal Visual  
2010  
2010  
100%  
C.3.3.2  
C.3.3.3  
C.3.3.4.2  
C.3.3.3  
10(0) or 22(0)  
X
X
Temperature Cycling  
Mechanical Shock  
or  
1010  
2002  
C
B, Y1  
10(0)  
22(0)  
direction  
3,000 G, Y1  
direction  
Constant Acceleration  
2001  
X
X
Interim Electrical  
Burn-In  
C.3.3.4.3  
240 hours  
minimum at  
+125°C  
1015  
1005  
X
X
X
Post Burn-In Electrical  
Steady State Life  
Final Electrical  
C.3.3.4.3  
C.3.3.4.3  
10(0) wires or  
20(1) wires  
C.3.3.3  
C.3.3.5  
C.3.3.6  
5
6
X
X
Wire Bond Evaluation  
SEM  
2011  
2018  
See method 2018  
Notes:  
Subgroups 3, 4, & 5 shall be performed on a sample of 10 die if the wafer lot is from a QPL/QML line. If the die are  
from commercial wafer lots, then the sample size shall be 22 die.  
TABLE 6 - MICROCIRCUIT ENHANCED ELEMENT EVALUATION  
Parts Type  
Test  
N/A  
N/A  
Requirement  
Paragraph  
Sample size  
N/A  
Allowable Reject(s)  
Ceramic Capacitors  
M55681 FRL S or  
M123 (chips)  
Resistors  
N/A  
N/A  
N/A  
N/A  
M55342 FRL R or  
S
Inductors  
N/A  
Custom  
Group A  
Group B  
Mil-Std-981  
Mil-Std-981  
Mil-Std-981  
Mil-Std-981  
Mil-Std-981  
Mil-Std-981  
TABLE 7: PASSIVE COMPONENT ENHANCED ELEMENT EVALUATION  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
14  
FIGURE 1  
Models 1101 & 1107 Package Outline  
FIGURE 2  
Models 1102 & 1108 Package Outline  
Tolerances: Unspecified = 0.010”  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
15  
FIGURE 3  
Models 1103 & 1109 Package Outline  
FIGURE 4  
Models 1106 & 1112 Package Outline  
Models 1113 & 1114 - same package minus the leads  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
16  
FIGURE 5  
Model 1115 Package Outline  
FIGURE 6  
Model 1104 & 1110 Package Outline  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
17  
FIGURE 7  
Model 1105 & 1111 Package Outline  
FIGURE 8  
Model 1116 & 1117 Package Outline  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
18  
APPENDIX A  
4 Pad 5 x 7mm ACMOS Hybrid, Model Number 1118 Series  
A.1 Scope. The Model 1118 Series uses a fundamentally different design approach versus  
the other models offered by the OS-68338 Specification. Some of that text does not fit  
this design, so for that reason the Model 1118 Series is specified here in Appendix A.  
Where not superseded by this Appendix the original text still applies.  
A.2 Design. The Model 1118 Series uses an AT-strip crystal mounted at two adjacent  
points. Due to the crystal’s smaller mass this 2-point design has proven its ruggedness  
by passing the same environmental qualification exposures of the other OS-68338  
Models (¶ 3.4.1.2).  
Frequency Range Operation: 0.7 MHz to 54 MHz  
Temperature Range: -55°C to +125°C  
Frequency Tolerance, Initial Accuracy @ +23°C: 15 ppm max.  
Frequency-Temperature Stability from +23°C ref.: 75 ppm max.  
Frequency-Voltage Tolerance: 4 ppm max. (Vcc 10%)  
Frequency Aging: 1 ppm 1st 30 days, 5 ppm max. Year 1, 2 ppm max. Year 2+  
Start-up Time: 10.0 ms max.  
Frequency  
Range  
(MHz)  
Current (mA)  
(max. no load)  
5.5V | 3.63V  
Rise / Fall  
Times  
(ns max.)  
Duty Cycle  
(%)  
0.7 - 4.0  
10  
15  
15  
20  
35  
6
6
5
5
5
5
45 to 55  
45 to 55  
45 to 55  
40 to 60  
40 to 60  
4.0 – 12.0  
>12.0 – 24.0  
>24.0 – 40.0  
>40.0 – 54.0  
8
10  
15  
20  
2/. Waveform measurement points and logic limits are in accordance with MIL-PRF-55310.  
TABLE 2A - Electrical Performance Characteristics, Model 1118 Series  
A.3 Marking. Device marking, due to size, will be limited to the Vectron logo (VI), date  
code, Pin 1 / ESD ID and the fully traceable Work Order – unique serial number  
combination, i.e. 370002-20. Individual device packaging will include the full part  
number.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
19  
FIGURE 9  
Model 1118 Package Outline  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
20  
DOCUMENT CHANGE RECORD  
Revision Change  
F
ECO 04-2126  
Add Application Overview: ¶ 1.2  
Add new para. for Ruggedized COTS: ¶ 3.4.7  
Add Design Pedigree ‘D’: ¶ 5.2, 7.1  
Add references to Ruggedized COTS: ¶ 3.1, 7.1.2  
Add Screening Option ‘G’: ¶ 5.1.1, 7.1.4  
Table 1: change all HCMOS or ACMOS,  
replace MIL package references with applicable added Figures  
Table 4: add Screening Options ‘G’ and ‘EM’  
Add Figures 6 thru 8  
G
ECO 05-0727  
Add ¶ 3.4.1.2 Environmental Integrity  
¶ 4.1.3: add SEU / SEL statement  
¶ 4.3.1: change 3.3Vdc tolerance from 5% to 10%  
¶ 4.3.4: revised Aging from 5 ppm / year max. to 5 ppm max. Year 1, 2 ppm max. Year 2+  
¶ 5.2: add (V) Hi-Rel design w/ 100krad Class S die, Cultured Quartz  
¶ 7.1 Design Pedigree: add V=100krad Class S die, Cultured Quartz  
Table 1: add 1118 Model Number info  
Table 2, Current column: split into 5.5V and 3.6V columns and revised limits downward  
Table 2, Rise/Fall Times column: revise limits downward for 12 MHz and >65.0 to 80 MHz  
ranges  
Add new Table 4 Thermal Characteristics, renumber Test Matrix to Table 5  
Table 5 Test Matrix, Option X column: correct Opn. No. 5, 6 and 17 from “X” to “N/R”  
Add Appendix A for 5 x 7 requirements  
H
ECO 06-2510  
¶ 2.1: add VL-65339  
Add ¶ 3.3e, Output Source/Sink Current  
Add ¶ 3.4.2g, ‘getter’ materials  
Add ¶ 4.3.4.1 Frequency Aging Duration Option  
¶ 5.1.1: S/O ‘G’, clarify description  
¶ 5.2e & 5.2f: clarify Group C sample sizes  
Table 1: 1106 & 1112 package name to 20 Lead Ceramic  
Table 2: add Frequency Ranges of both voltages; >65.0MHz – 85.0; >85.0 -100, ‘n/a’ under  
3.63V column  
Table 5: add Note 8  
Figure 2: add Unspecified Tolerance dimension  
ECO 07-0692  
I
Table 5: Corrected Operation 2 reference to “Cond. K”.  
Table 5: Changed Table 5 OPN 10 and 12 to note Method 1015 Condition B.  
Added new sentence to end of Par 5.1 describing that Post BI and Group A are combined  
into one electrical test.  
Added “n/a” to Table 2 for the 85.00-100.00 “Fan-out” column.  
Removed photo from cover page (to reduce file size).  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
21  
ECO 08-0145  
J
Paragraph 4.1.5: added "Class S" & "SWEPT Quartz"  
Table 2: replaced "n/a" with "30", at row “85.00-100.00”, column “3.63 V”  
Figure 3: changed ".057" to ".042", the dimension at back-to-leads  
CO-14428  
K
Sheet1:  
Inserted picture on cover sheet.  
¶ 4.1.2:  
Added “minimum” and “Lot evaluations are in accordance with MIL-PRF-55310 or Enhanced  
Element Evaluation as specified in Table 7.”  
¶ 4.1.3:  
Added “and for Enhanced Element Evaluation as specified in Table 6.”  
Added: “Vectron has conducted additional SEE testing in 2008 to verify this performance  
since our lot wafer testing does not include these parameters and determinations.”  
4.1.6:  
Added new paragraph.  
4.3.4:  
Added “When screening Option F is selected, aging is… compliance to the aging limit.”  
5.1.1:  
Added “Modified” to options F and G.  
5.2, 7.1 and 7.1.2:  
Added Option (E) for Enhanced Element Evaluation  
Table 1:  
Added Footnote 2 for Model 1118  
Table 2:  
Added Footnote 1  
Changed Frequency Range Maximum @ 3.3V Operation from “85.0 MHz” to “100.0 MHz”  
Table 5:  
Added Footnote 9 for Option F. “PDA is not applicable”  
Tables 6 and 7: New  
Figures 3, 6 and 9: Redrawn  
¶ A.3: Deleted. Renumbered paragraphs.  
Table 2A:  
Added “Frequency Range: 0.7 MHz to 54 MHz”  
Changed Duty Cycle at >12.0-24.0 From “40 to 60” To “45 to 55”  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
A
00136  
N/A  
OS-68338  
K
22  

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