CDLL5542C
更新时间:2024-10-29 02:27:35
品牌:MICROSEMI
描述:LEADLESS PACKAGE FOR SURFACE MOUNT ZENER DIODE, 500mW
CDLL5542C 概述
LEADLESS PACKAGE FOR SURFACE MOUNT ZENER DIODE, 500mW 无铅封装用于表面安装齐纳二极管500mW的 齐纳二极管
CDLL5542C 规格参数
是否无铅: | 含铅 | 是否Rohs认证: | 不符合 |
生命周期: | Active | 零件包装代码: | DO-213AA |
包装说明: | O-LELF-R2 | 针数: | 2 |
Reach Compliance Code: | not_compliant | ECCN代码: | EAR99 |
HTS代码: | 8541.10.00.50 | 风险等级: | 5.62 |
配置: | SINGLE | 二极管元件材料: | SILICON |
二极管类型: | ZENER DIODE | JEDEC-95代码: | DO-213AA |
JESD-30 代码: | O-LELF-R2 | JESD-609代码: | e0 |
元件数量: | 1 | 端子数量: | 2 |
封装主体材料: | GLASS | 封装形状: | ROUND |
封装形式: | LONG FORM | 峰值回流温度(摄氏度): | NOT SPECIFIED |
极性: | UNIDIRECTIONAL | 最大功率耗散: | 0.5 W |
认证状态: | Not Qualified | 标称参考电压: | 24 V |
表面贴装: | YES | 技术: | ZENER |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | WRAP AROUND |
端子位置: | END | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
最大电压容差: | 2% | 工作测试电流: | 1 mA |
Base Number Matches: | 1 |
CDLL5542C 数据手册
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1N5518BUR-1 THRU 1N5546BUR-1 AVAILABLE IN JAN, JANTX AND JANTXV
PER MIL-PRF-19500/437
1N5518BUR-1
thru
• ZENER DIODE, 500mW
1N5546BUR-1
and
• LEADLESS PACKAGE FOR SURFACE MOUNT
• LOW REVERSE LEAKAGE CHARACTERISTICS
• METALLURGICALLY BONDED
CDLL5518 thru CDLL5546D
MAXIMUM RATINGS
Junction and Storage Temperature: -65°C to +125°C
DC Power Dissipation: 500 mW @ T
= +125°C
EC
Power Derating: 10 mW / °C above T
= +125°C
EC
Forward Voltage @ 200mA: 1.1 volts maximum
ELECTRICAL CHARACTERISTICS @ 25°C, unless otherwise specified.
B-C-D
SUFFIX
CDI
TYPE
NOMINAL
ZENER
ZENER
TEST
MAX. ZENER
IMPEDANCE
MAXIMUM REVERSE
LEAKAGE CURRENT
MAXIMUM
DC ZENER
REGULATION
FACTOR
LOW
V
Z
NUMBER
VOLTAGE CURRENT B-C-D SUFFIX
CURRENT
CURRENT
V
@ 1
ZT
1
Z
@ 1
ZT
l
V
= VOLTS
1
∆V
1
Z
ZT
ZT
R
R
ZM
Z
ZL
(NOTE 1)
(NOTE 2)
(NOTE 3)
(NOTE 4)
(NOTE 5)
NON & A-
SUFFIX
B-C-D-
SUFFIX
VOLTS
mA
OHMS
µ Adc
mA
VOLTS
mA
MILLIMETERS
INCHES
CDLL5518B
CDLL5519B
CDLL5520B
CDLL5521B
CDLL5522B
3.3
3.6
3.9
4.3
4.7
20
20
20
20
10
26
24
22
18
22
5.0
3.0
1.0
3.0
2.0
0.90
0.90
0.90
1.0
1.0
1.0
1.0
1.5
2.0
115
105
98
88
81
0.90
0.90
0.85
0.75
0.60
2.0
2.0
2.0
2.0
1.0
DIM MIN MAX MIN MAX
D
F
1.60
0.41
3.30
1.70 0.063 0.067
0.55 0.016 0.022
3.70 .130 .146
1.5
G
CDLL5523B
CDLL5524B
CDLL5525B
CDLL5526B
CDLL5527B
5.1
5.6
6.2
6.8
7.5
5.0
3.0
1.0
1.0
1.0
26
30
30
30
35
2.0
2.0
1.0
1.0
0.5
2.0
3.0
4.5
5.5
6.0
2.5
3.5
5.0
6.2
6.8
75
68
61
56
51
0.65
0.30
0.20
0.10
0.05
0.25
0.25
0.01
0.01
0.01
G1
S
2.54 REF.
0.03 MIN.
.100 REF.
.001 MIN.
CDLL5528B
CDLL5529B
CDLL5530B
CDLL5531B
CDLL5532B
8.2
9.1
10.0
11.0
12.0
1.0
1.0
1.0
1.0
1.0
40
45
60
80
90
0.5
0.1
0.05
0.05
0.05
6.5
7.0
8.0
9.0
9.5
7.5
8.2
9.1
9.9
10.8
46
42
38
35
32
0.05
0.05
0.10
0.20
0.20
0.01
0.01
0.01
0.01
0.01
FIGURE 1
DESIGN DATA
CDLL5533B
CDLL5534B
CDLL5535B
CDLL5536B
CDLL5537B
13.0
14.0
15.0
16.0
17.0
1.0
1.0
1.0
1.0
1.0
90
0.01
0.01
0.01
0.01
0.01
10.5
11.5
12.5
13.0
14.0
11.7
12.6
13.5
14.4
15.3
29
27
25
24
22
0.20
0.20
0.20
0.20
0.20
0.01
0.01
0.01
0.01
0.01
100
100
100
100
CASE: DO-213AA, Hermetically sealed
glass case. (MELF, SOD-80, LL34)
CDLL5538B
CDLL5539B
CDLL5540B
CDLL5541B
CDLL5542B
18.0
19.0
20.0
22.0
24.0
1.0
1.0
1.0
1.0
1.0
100
100
100
100
100
0.01
0.01
0.01
0.01
0.01
15.0
16.0
17.0
18.0
20.0
16.2
17.1
18.0
19.8
21.6
21
20
19
17
16
0.20
0.20
0.20
0.25
0.30
0.01
0.01
0.01
0.01
0.01
LEAD FINISH: Tin / Lead
THERMAL RESISTANCE: (R
):
OJEC
100 °C/W maximum at L = 0 inch
CDLL5543B
CDLL5544B
CDLL5545B
CDLL5546B
25.0
28.0
30.0
33.0
1.0
1.0
1.0
1.0
100
100
100
100
0.01
0.01
0.01
0.01
21.0
23.0
24.0
28.0
22.4
25.2
27.0
29.7
15
14
13
12
0.35
0.40
0.45
0.50
0.01
0.01
0.01
0.01
THERMAL IMPEDANCE: (Z
°C/W maximum
): 35
OJX
NOTE 1
No Suffix type numbers are +20% with guaranteed limits for only V , l , and V .
Z R F
POLARITY: Diode to be operated with
the banded (cathode) end positive.
Units with “A” suffix are +10% with guaranteed limits for V , l , and V . Units with
Z
R
F
guaranteed limits for all six parameters are indicated by a “B” suffix for +5.0% units,
“C” suffix for+2.0% and “D” suffix for +1.0%.
MOUNTING SURFACE SELECTION:
The Axial Coefficient of Expansion
(COE) Of this Device is Approximately
+6PPM/°C. The COE of the Mounting
Surface System Should Be Selected To
Provide A Suitable Match With This
Device.
NOTE 2
NOTE 3
Zener voltage is measured with the device junction in thermal equilibrium at an ambient
temperature of 25°C + 3°C.
Zener impedance is derived by superimposing on 1
A 60Hz rms a.c. current equal to
ZT
10% of1
ZT.
NOTE 4
NOTE 5
Reverse leakage currents are measured at V as shown on the table.
R
∆V is the maximum difference between V at l
ZT
and V at l measured
ZL
Z
Z
Z
with the device junction in thermal equilibrium.
6 LAKE STREET, LAWRENCE, MASSACHUSETTS 01841
PHONE (978) 620-2600
FAX (978) 689-0803
WEBSITE: http://www.microsemi.com
143
CDLL5518 thru CDLL5546D
FIGURE 2
500
400
300
200
100
0
0
25
50
75
100
125
150
175
T
, End cap temperature (C°)
EC
POWER DERATING CURVE
1000
500
400
300
200
100
50
40
28 VOLT
30
20
10
5
4
11 VOLT
3
2
6.8 VOLT
1
.1
.2
.5
1
2
5
10
20
50
100
OPERATING CURRENT IZT (mA)
FIGURE 3
ZENER IMPEDANCE VS. OPERATING CURRENT
144
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