JANTXVF2N7268U [MICROSEMI]
Transistor;
| 型号： | JANTXVF2N7268U |
| 厂家： | 
Microsemi |
| 描述： | Transistor |
| 文件： | 总27页 (文件大小：1035K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
shall be completed by 20 June 2013.
MIL-PRF-19500/603J
6 May 2013
SUPERSEDING
MIL-PRF-19500/603H
1 July 2011
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED
(TOTAL DOSE ONLY) TRANSISTORS, N-CHANNEL, SILICON,
TYPES 2N7268, 2N7269, 2N7270, 2N7394, 2N7268U, 2N7269U, 2N7270U, AND 2N7394U,
JANTXVR, F, G, H; JANSR, F, G, AND H
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for an N-channel, enhancement-mode,
MOSFET, radiation hardened (total dose only), power. Two levels of product assurance are provided for each device
type specified in MIL-PRF-19500, with avalanche energy maximum rating (EAS) and maximum avalanche current
(IAS). See 6.5 for JANHC and JANKC die versions.
* 1.2 Physical dimensions. See figure 1 (TO-254AA) and figure 2 (surface mount, TO-276AB).
1.3 Maximum ratings. Unless otherwise specified, T = +25°C.
C
Type
P
P
R
θJA
R
V
V
V
I
I
(3) (4)
I
S
T
T
θJC
DS
DG
GS
D1
D2
(1)
(2)
(3) (4)
T
= +25°C
T
= +100°C
A
C
W
W
V dc
V dc
V dc
A dc
A dc
A dc
°C/W
°C/W
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
150
150
150
150
4
4
4
4
35
35
35
35
0.83
0.83
0.83
0.83
60
100
200
500
60
100
200
500
35.0
34.0
26.0
11.0
30.0
21.0
16.0
7.0
35.0
34.0
26.0
11.0
±20
±20
±20
±20
Type
I
T and T
J
V
DM
STG
ISO
70,000 ft altitude
A(pk)
V dc
°C
-55 to +150
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
140
136
104
44
N/A
N/A
N/A
500
See notes next page.
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at https://assist.dla.mil/.
AMSC N/A
FSC 5961
MIL-PRF-19500/603J
1.3 Maximum ratings. Unless otherwise specified, T = +25°C - Continued.
C
(1) Derate linearly 1.2 W/°C for T > +25°C.
C
(2) See figure 3 for thermal impedance curves.
(3) The following formula derives the maximum theoretical ID limit. ID is limited by package design:
-
TJM TC
( on ) at
=
ID
(
)
x
(
)
RθJC
RDS
TJM
(4) See figure 4 for maximum drain current graphs.
1.4 Primary electrical characteristics at TC = +25°C.
Type
Min
V
Max I
V
Max r
(1)
E
I
AS
GS(TH)1
DSS1
= 0
DS(ON)
AS
at I
D1
V
(BR)DSS
V
= 12 V dc
V
≥ V
GS
DS
GS
DS
GS
V
= 0
GS
= 1.0
V
= 80
I
= 1.0
D
I
mA dc
percent of rated
T
J
= +25°C
at I
D2
ohm
T = +150°C
J
D
V
mA dc
DS
at I
D2
ohm
V dc
Min
Max
mJ
A
µA dc
V dc
2.0
2.0
2.0
2.0
V dc
4.0
4.0
4.0
4.0
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
60
100
200
500
25
25
25
50
0.027
0.065
0.100
0.450
0.030
0.132
0.230
1.260
500
500
500
500
35.0
34.0
26.0
11.0
(1) Pulsed (see 4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750 Test Methods for Semiconductor Devices.
-
Semiconductor Devices, General Specification for.
-
*
(Copies of these documents are available online at http://quicksearch.dla.mil or https://assist.dla.mil or from the
Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/603J
Dimensions
Millimeters
Min Max
Symbol
Inches
Max
Min
.535
.249
.035
.510
BL
CH
.545
.260
.045
.570
13.59
6.32
13.84
6.60
LD
0.89
1.14
LL
12.95
14.48
LO
.150 BSC
.150 BSC
.139
3.81 BSC
3.81 BSC
3.53
LS
MHD
MHO
TL
.149
.685
.800
.050
.545
3.78
17.40
20.32
1.27
.665
.790
.040
.535
16.89
20.07
1.02
TT
TW
13.59
13.84
Term 1
Term 2
Term 3
Drain
Source
Gate
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. Refer to applicable symbol list.
4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
5. All terminals are isolated from case.
FIGURE 1. Physical dimensions for TO-254AA (2N7268, 2N7269, 2N7270, and 2N7394).
3
MIL-PRF-19500/603J
0.10 (0.004)
3 SURFACES
-C-
-A-
BW
CH
LW1
1
LL1
CL
BL
-B-
LW2
(2X)
Q1 (2X)
CL
CL
LL2
(2X)
2
3
Q2
LS2
LH
(3X)
C
A
M
0.36 (0.014)
B
M
M
LS1
FIGURE 2. Dimensions and configuration of surface mount package outline, TO-276AB (2N7268U,
2N7269U, 2N7270U, AND 2N7394U).
4
MIL-PRF-19500/603J
Dimensions
SMD-1
Symbol
Inches
Millimeters
Min Max
Min
Max
.630
.455
.142
.020
.420
.162
BL
BW
.620
.445
15.75
11.30
16.00
11.56
3.60
CH
LH
.010
.410
.152
0.26
10.41
3.86
0.50
LL1
10.67
4.11
LL2
LS1
.210 BSC
.105 BSC
5.33 BSC
2.67 BSC
9.40
LS2
LW1
LW2
Q1
.370
.380
.145
9.65
3.68
.135
.030
.035
3.43
0.76
0.89
Q2
Term 1
Term 2
Term 3
Drain
Gate
Source
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. The lid shall be electrically isolated from the drain, gate and source.
4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
FIGURE 2. Dimensions and configuration of surface mount package outline, TO-276AB (2N7268U,
2N7269U, 2N7270U, AND 2N7394U) - Continued.
5
MIL-PRF-19500/603J
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
before contract award (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500 and as follows.
IAS ........ Rated avalanche current, nonrepetitive
nC ........ nano Coulomb.
3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in
MIL-PRF-19500 and on figure 1 and 2 herein. Methods used for electrical isolation of the terminal feedthroughs shall
employ materials that contain a minimum of 90 percent AL2O3 (ceramic). Examples of such construction techniques
are metallized ceramic eyelets or ceramic walled packages.
3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.
Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).
3.4.2 Internal construction. Multiple chip construction is not permitted.
3.5 Marking. Marking shall be in accordance with MIL-PRF-19500.
3.6 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge
protection.
3.6.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation
of static charge. However, the following handling practices are recommended (see 3.6).
a. Devices should be handled on benches with conductive handling devices.
b. Ground test equipment, tools, and personnel handling devices.
c. Do not handle devices by the leads.
d. Store devices in conductive foam or carriers.
e. Avoid use of plastic, rubber, or silk in MOS areas.
f. Maintain relative humidity above 50 percent if practical.
g. Care should be exercised during test and troubleshooting to apply not more than maximum rated voltage to
any lead.
h. Gate must be terminated to source, R ≤ 100 kΩ, whenever bias voltage is to be applied drain to source.
3.7 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance
characteristics are as specified in 1.3, 1.4, and table I herein.
3.8 Electrical test requirements. The electrical test requirements shall be as specified in table I.
3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
6
MIL-PRF-19500/603J
4. VERIFICATION
4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:
a. Qualification inspection (see 4.2).
b. Screening (see 4.3).
c. Conformance inspection (see 4.4 and tables I and II).
4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500.
4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In
case qualification was awarded to a prior revision of the specification sheet that did not request the performance of
table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on
the first inspection lot of this revision to maintain qualification.
7
MIL-PRF-19500/603J
*
4.3 Screening (JANTXV and JANS levels only). Screening shall be in accordance with appendix E, table E-IV of
MIL-PRF-19500 and as specified herein. The following measurements shall be made in accordance with table I
herein. Devices that exceed the limits of table I herein shall not be acceptable.
Screen (see table IV
of MIL-PRF-19500)
(1) (2)
Measurement
JANS level
JANTXV levels
Gate stress test (see 4.3.1).
(3)
(3)
Gate stress test (see 4.3.1).
Single pulse avalanche energy test, method
3470 of MIL-STD-750 (see 4.3.2).
Single pulse avalanche energy test, method 3470
of MIL-STD-750 (see 4.3.2).
(3) 3c
9
Method 3161 of MIL-STD-750 (see 4.3.3).
Method 3161 of MIL-STD-750 (see 4.3.3).
Subgroup 2 of table I herein.
Subgroup 2 of table I herein. I
,
GSSF1
I
, I .
GSSR1 DSS1
10
11
Method 1042 of MIL-STD-750, test condition B
Method 1042 of MIL-STD-750, test condition B
I
, I
, I
, r
, V
I
, I
, I
, r
, V
GSSF1 GSSR1 DSS1 DS(on)1 GS(TH)1
GSSF1 GSSR1 DSS1 DS(on)1 GS(TH)1
Subgroup 2 of table I herein
∆I = ± 20 nA dc or ± 100 percent of
Subgroup 2 of table I herein.
GSSF1
initial value, whichever is greater.
∆I = ± 20 nA dc or ± 100 percent of
GSSR1
initial value, whichever is greater.
∆I = ± 10 µA dc or ± 100 percent of
DSS1
initial value, whichever is greater.
12
13
Method 1042 of MIL-STD-750, test condition A.
Method 1042 of MIL-STD-750, test condition A.
Subgroup 2 of table I herein
Subgroups 2 and 3 of table I herein
∆I
= ± 20 nA dc or ± 100 percent of
∆I
= ± 20 nA dc or ± 100 percent of
GSSF1
initial value, whichever is greater.
∆I = ± 20 nA dc or ± 100 percent of
GSSF1
initial value, whichever is greater.
∆I = ± 20 nA dc or ± 100 percent of
GSSR1
initial value, whichever is greater.
∆I = ± 10 µA dc or ± 100 percent of
GSSR1
initial value, whichever is greater.
∆I = ± 10 µA dc or ± 100 percent of
DSS1
initial value, whichever is greater.
DSS1
initial value, whichever is greater.
∆r
=± 20 percent of initial value
= ± 20 percent of initial value.
∆r
=± 20 percent of initial value
= ± 20 percent of initial value.
GS(th)1
DS(on)1
∆V
DS(on)1
∆V
GS(th)1
17
Method 1081 of MIL-STD-750 (see 4.3.4),
Endpoints: Subgroup 2 of table I herein. (Not
applicable for TO-276AB surface mount
devices).
Method 1081 of MIL-STD-750 (see 4.3.4),
Endpoints: Subgroup 2 of table I herein.
(Not applicable for TO-276AB surface mount
devices).
*
(1) At the end of the test program, IGSSF1, IGSSR1, and IDSS1 are measured.
(2) An out-of-family program to characterize IGSSF1, IGSSR1, IDSS1, and VGS(th)1 shall be invoked.
(3) Shall be performed anytime after temperature cycling, screen 3a; JANTXV level does not need to be repeated in
screening requirements.
8
MIL-PRF-19500/603J
4.3.1 Gate stress test. Apply V
= 30 V minimum for t = 250 µs minimum.
GS
4.3.2 Single pulse avalanche energy EAS
.
a. Peak current (I ) ...................................................... I
.
AS
AS(max)
b. Peak gate voltage (V ) ............................................. 12 V.
GS
c. Gate to source resistor (R ) ..................................... 25Ω ≤ R
GS
≤ 200Ω.
GS
d. Initial case temperature (T ) ...................................... +25°C +10°C, -5°C.
C
e. Inductance (L) ............................................................. L = (2*EAS/(ID1)2)*((VBR-VDD)/VBR) mH minimum.
f. Number of pulses to be applied ................................... 1 pulse minimum.
g. Supply voltage (V ) ................................................. 25 V for 2N7268, 2N7394, and 2N7268U; 50 V for
DD
2N7269, 2N7269U, and 2N7270.
4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method
3161 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW, (and VH where appropriate).
Measurement delay time (tMD) = 70 µs max. See table III, group E, subgroup 4 herein.
*
4.3.4 Dielectric withstanding voltage.
a. Magnitude of test voltage…………………………………900 V dc.
b. Duration of application of test voltage…………………..15 seconds (min).
c. Points of application of test voltage………………………All leads to case (bunch connection).
d. Method of connection………………………………………Mechanical.
e. Kilovolt-ampere rating of high voltage source…………..1,200V /1.0 mA (min).
f. Maximum leakage current………………………………….1.0 mA.
g. Voltage ramp up time……………………………………….500V /second.
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500, and as
specified herein.
4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with appendix E, table V of
MIL-PRF-19500 and table I herein. End-point electrical measurements shall be in accordance with table I, subgroup
2 herein.
4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table VIA (JANS) and table VIB (JANTXV) of MIL-PRF-19500, and herein. Electrical
measurements (end-points) shall be in accordance with table I, subgroup 2 herein.
9
MIL-PRF-19500/603J
4.4.2.1 Group B inspection, table VIA (JANS) of MIL-PRF-19500.
Subgroup
Method
1051
2075
2077
1042
1042
Condition
B3
B3
B3
B4
B5
Test condition G, 100 cycles.
See 3.4.2.
SEM qualification may be performed anytime prior to lot formation.
The heating cycle shall be 30 seconds minimum.
Accelerated steady-state gate bias, condition B, V
GS
t = 24 hours minimum; or, T = +150°C, t = 48 hours minimum.
= rated, T = +175°C,
A
A
B5
B6
1042
Accelerated steady-state reverse bias, condition A, V
= rated, T = +175°C,
DS A
t = 120 hours minimum; or, T = +150°C, t = 240 hours minimum.
A
Not applicable for surface mount packages.
*
4.4.2.2 Group B inspection, table VIB (JANTXV) of MIL-PRF-19500.
Subgroup
Method
1051
Condition
B2
B3
B3
Test condition G, 25 cycles.
The heating cycle shall be 30 seconds minimum.
1042
2037
Test condition D. All internal bond wires for each device shall be pulled
separately.
B4
B5
B6
2075
See 3.4.2.
*
*
*
Not applicable.
Not applicable for surface mount packages.
4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table VII of MIL-PRF-19500 and as follows. Electrical measurements (end-points) shall be in
accordance with table I, subgroup 2 herein.
Subgroup
C2
Method
2036
Condition
Test condition A; weight = 10 pounds; t = 15 s (applicable to TO-254AA only).
*
C5
3161
R
= 0.83°C/W. Not required when performed in Group B.
θJC(max)
C6
1042
The heating cycle shall be 30 seconds minimum.
10
MIL-PRF-19500/603J
4.4.4 Group D Inspection. Group D inspection shall be conducted in accordance with appendix E, table VIII of
MIL-PRF-19500 and table II herein.
4.4.5 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table IX of MIL-PRF-19500 and as specified in table III herein. Electrical measurements (end-
points) shall be in accordance with table I, subgroup 2 herein.
4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.
4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in MIL-STD-750.
11
MIL-PRF-19500/603J
TABLE I. Group A inspection.
MIL-STD-750
Inspection 1/
Subgroup 1
Symbol
Limits
Max
Unit
Method
2071
Conditions
Min
Visual and mechanical
inspection
Subgroup 2
Thermal impedance 2/
3161
3407
See 4.3.3.
Z
°C/W
θJC
Breakdown voltage, drain
to source
V
= 0; I = 1 mA dc
V
(BR)DSS
GS
D
bias condition C
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
60
100
200
500
V dc
V dc
V dc
V dc
Gate to source voltage
threshold
3403
3411
V
2.0
4.0
V dc
V
≥ V
GS
GS(TH)1
DS
= 1 mA dc
I
D
Gate current
Gate current
Drain current
V
V
= +20 V dc, bias condition C,
= 0
I
+ 100
- 100
nA dc
GS
DS
GSSF1
GSSR1
3411
3413
V
V
= -20 V dc, bias condition C,
= 0
I
nA dc
GS
DS
V
V
= 0, bias condition C
= 80 percent of rated V
I
DSS1
GS
DS
DS
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
25
25
25
50
µA dc
µA dc
µA dc
µA dc
Static drain to source on-
state resistance
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
3421
3421
4011
V
= 12 V dc, condition A
r
r
GS
DS(on)1
pulsed (see 4.5.1), I = I
D
D2
D1
0.027
0.065
0.100
0.450
ohm
ohm
ohm
ohm
Static drain to source on-
state resistance
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
V
= 12 V dc, condition A
GS
pulsed (see 4.5.1), I = I
DS(on)2
D
0.030
0.070
0.110
0.500
ohm
ohm
ohm
ohm
Forward voltage
Pulsed (see 4.5.1), I = I
V
SD
D
D1
V
= 0 V dc
GS
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
1.4
1.4
1.4
1.6
V
V
V
V
See footnotes at end of table.
12
MIL-PRF-19500/603J
TABLE I. Group A inspection - Continued.
MIL-STD-750
Inspection 1/
Subgroup 3
Symbol
Limits
Min Max
Unit
Method
Conditions
High temperature
operation:
T
C
= T = +125°C
J
Gate current
3411
3413
V
= +20 and -20 V dc
I
nA dc
± 200
GS
GSS2
bias condition C, V
= 0
DS
Drain current
V
V
= 0; bias condition C
= 100 percent of rated V
GS
DS
I
I
1.0
mA dc
mA dc
DSS2
DSS3
DS
0.25
V
V
= 80 percent of rated V
= 12 V dc
DS
GS
DS
Static drain to source
on-state resistance
3421
3404
r
DS(on)3
pulsed (see 4.5.1), I = I
D
D2
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
0.060
0.132
0.200
1.000
ohm
ohm
ohm
ohm
Gate to source voltage
(threshold)
V
V
1.0
V dc
V
≥ V
GS, I = 1 mA dc
GS(TH)2
GS(TH)3
DS
D
Low temperature
operation:
T
C
= T = -55°C
J
Gate to source voltage
(threshold)
3404
3475
5.0
V dc
V
≥ V
DS
GS, I = 1 mA dc
D
Subgroup 4
Forward transconductance
I
= rated I , V
D2 DD
= 15 V
g
FS
D
(see 4.5.1)
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
12
8
8
S
S
S
S
4
Switching time test
3472
I
= I , V
= 12 V dc
= 2.35Ω, V = 50 percent of
DD
D
D1 GS
R
G
rated V
DS
Turn-on delay time
t
d(on)
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
27
45
33
45
ns
ns
ns
ns
See footnotes at end of table.
13
MIL-PRF-19500/603J
TABLE I. Group A inspection - Continued.
MIL-STD-750
Inspection 1/
Symbol
Limits
Unit
Method
Conditions
Min
Max
Subgroup 4 - Continued
Rise time
t
r
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
100
190
140
190
ns
ns
ns
ns
t
d(off)
Turn-off delay time
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
75
ns
ns
ns
ns
170
140
190
t
f
Fall time
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
75
ns
ns
ns
ns
130
140
130
Subgroup 5
Safe operating area
test (high voltage)
3474
See figures 5, 6, 7, and 8
p
t
= 10 ms minimum
V
= 80 percent of maximum rated
DS
V
(V
≤ 200)
DS
DS,
Electrical measurements
Subgroup 6
See table I, subgroup 2
Not applicable
Subgroup 7
Gate charge
3471
Condition B
On-state gate charge
Q
g(on)
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
200
160
170
150
nC
nC
nC
nC
See footnotes at end of table.
14
MIL-PRF-19500/603J
TABLE I. Group A inspection - Continued.
MIL-STD-750
Inspection 1/
Symbol
Limits
Unit
Method
Conditions
Min
Max
Subgroup 7 - Continued
Gate to source charge
Q
Q
t
gs
gd
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
60
35
30
30
nC
nC
nC
nC
Gate to drain charge
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
75
65
60
75
nC
nC
nC
nC
Reverse recovery time
3473
di/dt ≤ 100 A/µs, V
≤ 30 V,
rr
DD
I
= I
D
D1
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
280
570
820
ns
ns
ns
ns
1,100
1/ For sampling plan, see MIL-PRF-19500.
2/ This test required for the following end-point measurements only:
Group B, subgroups 2 and 3 (JANTXV).
Group B, subgroups 3 and 4 (JANS).
Group C, subgroup 2 and 6.
Group E, subgroup 1.
15
MIL-PRF-19500/603J
TABLE II. Group D inspection.
Preirradiation limits
MIL-STD-750
Postirradiation limits
3/
Inspection
1/ 2/
Symbol
3/
F, G, and H
Unit
Method
Conditions
R
R
F, G, and H
Min
Max
Min
Max
Min
Max
Min
Max
Subgroup 1
Not applicable
Subgroup 2
T
C
= +25°C
Steady-state total
dose irradiation
1019
1019
V
V
= 12 V
= 0
GS
DS
(V
bias) 4/
GS
Steady-state total
dose irradiation
V
V
= 0
GS
DS
= 80
(V
bias) 4/
DS
percent of
rated V
DS
(pre-
irradiation)
End-point electricals
Breakdown voltage,
drain to source
3407
V
= 0;
V
BRDSS
GS
= 1 mA
I
D
bias cond. C
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
60
60
60
60
V dc
V dc
V dc
V dc
100
200
500
100
200
500
100
200
500
100
200
500
Gate to source
voltage
(threshold)
3403
V
V
≥ V
GS
GSth
DS
= 1 mA
I
D
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
2
2
2
2
4
4
4
4
2
2
2
2
4
4
4
4
2
2
2
2
4
4
4
4
1.25
1.25
1.25
1.25
4.50
4.50
4.50
4.50
V dc
V dc
V dc
V dc
Gate current
3411
3411
V
V
= 20 V
I
100
100
100
100
nA dc
GS
GSSF1
= 0
DS
bias cond. C
Gate current
V
V
= 20 V
= 0
I
-100
-100
-100
-100 nA dc
GS
DS
GSSR1
bias cond. C
See footnotes at end of table.
16
MIL-PRF-19500/603J
TABLE II. Group D inspection - Continued.
MIL-STD-750
Preirradiation limits
3/
F, G, and H
Postirradiation limits
3/
Inspection
1/ 2/
Symbol
Unit
Method
Conditions
R
R
F, G, and H
Min
Max
Mi
n
Max
Mi
n
Max
Min
Max
Subgroup 2 -
Continued
Drain current
3413
Bias cond. C
I
DSS
V
= 0
GS
V
= 80
DS
percent of
rated V
DS
(pre-
irradiation)
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
25
25
25
50
25
25
25
50
25
25
25
50
50
50
50
µA dc
µA dc
µA dc
µA dc
100
Static drain to
source on-state
voltage
3405
Condition A
V
DSon1
V
=12 V
GS
pulsed
see 4.5.1
I
= I
D
D2
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
0.81
1.365
1.6
0.81
1.365
1.6
0.81
1.365
1.6
1.2
1.89
2.48
4.2
V dc
V dc
V dc
V dc
3.15
3.15
3.15
Forward voltage
source drain
diode
4011
V
SD
V
= 0
D1
GS
= I
I
D
2N7394, 2N7394U
2N7268, 2N7268U
2N7269, 2N7269U
2N7270, 2N7270U
1.4
1.4
1.4
1.6
1.4
1.4
1.4
1.6
1.4
1.4
1.4
1.6
1.4
1.4
1.4
1.6
V dc
V dc
V dc
V dc
1/ For sampling plan, see MIL-PRF-19500. At the manufacturer’s option, group D samples need not be subjected
to the screening tests, and may be assembled in it’s qualified package or in any qualified package that the
manufacturer has data to correlate the performance to the designated package.
2/ Group D qualification may be performed anytime prior to lot formation. Wafers qualified to these group D QCI
requirements may be used for any other specification sheet utilizing the same die design.
* 3/ The F designation represent devices which pass end-points at both 100 k and 300 k rads (Si). The G
designation represents devices which pass 100 k, 300 k, and 500 k rad (Si) end-points. H must meet
end-points for 100 k, 300 k, 500 k and 1,000 k RAD (Si).
4/ Separate samples shall be pulled for each bias.
17
MIL-PRF-19500/603J
TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only.
Qualification and
MIL-STD-750
Inspection
large lot quality
conformance
inspection
Method
Conditions
Subgroup 1
45 devices
c = 0
Thermal shock
(temperature cycling)
1051
1071
Test condition G.
Hermetic seal
Fine leak
As applicable.
Gross leak
Electrical measurements
Subgroup 2 1/
See table I, subgroup 2.
45 devices
c = 0
Steady-state gate bias
Electrical measurements
Steady-state reverse bias
Electrical measurements
Subgroup 4
1042
1042
Condition B, 1,000 hours.
See table I, subgroup 2.
Condition A, 1,000 hours.
See table I, subgroup 2.
Sample size
N/A
Thermal impedance curves
Subgroup 5
See MIL-PRF-19500.
3 devices
c = 0
Barometric pressure
(2N7270, 2N7270U only)
1001
3476
Test condition C. For device type
2N7270, 2N7270U: V
= 500 V; I
DS (ISO)
< 0.25 mA.
Subgroup 10
22 devices
c = 0
Commutating diode for safe
operating area test procedure for
measuring dv/dt during reverse
recovery of power MOSFET
transistors or insulated gate
bipolar transistors
Test conditions shall be derived by the
manufacturer.
1/ A separate sample may be pulled for each test condition.
18
MIL-PRF-19500/603J
FIGURE 3. Thermal impedance curves.
19
MIL-PRF-19500/603J
2N7268, 2N7268U
2N7269, 2N7269U
FIGURE 4. Maximum drain current vs case temperature.
20
MIL-PRF-19500/603J
2N7270, 2N7270U
2N7394, 2N7394U
FIGURE 4. Maximum drain current vs case temperature - Continued.
21
MIL-PRF-19500/603J
2N7394, 2N7394U
Operation in this area limited by RDS(on)
1000
100
10
100µs
1ms
10ms
TC = 25oC
1
TJ = 150oC
Single Pulse
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
FIGURE 5. Safe operating area graph.
22
MIL-PRF-19500/603J
2N7268, 2N7268U
FIGURE 6. Safe operating area graph.
23
MIL-PRF-19500/603J
2N7269, 2N7269U
FIGURE 7. Safe operating area graph.
24
MIL-PRF-19500/603J
2N7270, 2N7270U
FIGURE 8. Safe operating area graph.
25
MIL-PRF-19500/603J
5. PACKAGING
5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order
(see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel
need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are
maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or
within the Military Service’s system commands. Packaging data retrieval is available from the managing Military
Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible
packaging activity.
6. NOTES
(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.
The notes specified in MIL-PRF-19500 are applicable to this specification.)
6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design
applications and logistic support of existing equipment.
6.2 Acquisition requirements. Acquisition documents should specify the following:
a. Title, number, and date of this specification.
b. Packaging requirements (see 5.1).
c. Lead finish (see 3.4.1).
d. Product assurance level and type designator.
*
6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are,
at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not
such products have actually been so listed by that date. The attention of the contractors is called to these
requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal
Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the
products covered by this specification. Information pertaining to qualification of products may be obtained from DLA
Land and Maritime, ATTN: VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail vqe.chief@dla.mil. An online
listing of products qualified to this specification may be found in the Qualified Products Database (QPD) at
https://assist.dla.mil .
6.4 Substitution information. Devices covered by this specification are substitutable for the manufacturer's and
user's Part or Identifying Number (PIN). This information in no way implies that manufacturer's PIN's are suitable for
the military PIN.
Preferred types
Commercial types (1)
TO254-AA
“U”
2N7394
2N7268
2N7269
2N7270
IRHM7054
IRHM7150
IRHM7250
IRHM7450
IRHN7054
IRHN7150
IRHN7250
IRHN7450
(1) IRH 7: 100k RAD (Si)
IRH 3: 300k RAD (Si)
IRH 4: 600k RAD (Si)
IRH 8: 1,000k RAD (Si)
26
MIL-PRF-19500/603J
6.5 JANC die versions. The JANHC and JANKC die versions of these devices are covered under specification
sheet MIL-PRF-19500/657.
6.6 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where
changes from the previous issue were made. This was done as a convenience only and the Government assumes
no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the
requirements of this document based on the entire content irrespective of the marginal notations and relationship to
the last previous issue.
Custodians:
Army - CR
Navy - EC
Air Force - 85
NASA - NA
DLA - CC
Preparing activity:
DLA - CC
(Project 5961-2013-006)
Review activities:
Navy - AS
Air Force - 19, 70
*
NOTE: The activities listed above were interested in this document as of the date of this document. Since
organizations and responsibilities can change, you should verify the currency of the information above using the
ASSIST Online database at https://assist.dla.mil/ .
27
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