LX5249CPW [MICROSEMI]

SCSI - Low Voltage Differential (LVD) ; SCSI - 低压差分( LVD )\n
LX5249CPW
型号: LX5249CPW
厂家: Microsemi    Microsemi
描述:

SCSI - Low Voltage Differential (LVD)
SCSI - 低压差分( LVD )\n

总线通信 驱动程序和接口 接口集成电路 光电二极管 信息通信管理
文件: 总6页 (文件大小:170K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
UltraMAXTM  
LX5248/LX5249  
9-LI N E LVD SCSI TE R M I N AT O R  
T H E I N F I N I T E P O W E R O F I N N O V A T I O N  
P R E L I M I N A R Y D A T A S H E E T  
DESCRIPTION  
KEY FEATURES  
2.5pF Typical Disabled Output  
Capacitance  
Fast Response, No External Capacitors  
Required  
5µA Supply Current In Disconnect Mode  
20mA Supply Current During Normal  
Operation  
Logic Command Disconnects All  
Termination Lines  
The LX5248/49 IC is a Low Voltage Dif-  
ferential (LVD) Terminator designed to  
comply with the LVD termination specifica-  
tion in the SPI-2 document. The LX5248/  
49 is designed specifically for LVD applica-  
tions. Because the LX5248/49 supports only  
LVD, it has lower output capacitance than  
multimode terminators such as the LX5240.  
The LX5248/49 Utilizes Linfinity’s  
UltraMAX Technology which delivers the  
ultimate in SCSI bus performance while  
saving component cost and board area.  
Elimination of the external capacitors also  
mitigates the need for a lengthy capacitor  
selection process. The individual high band-  
width drivers also maximize channel sepa-  
ration and reduces channel-to-channel noise  
and cross talk. The high-bandwidth  
UltraMAX architecture insures ULTRA-2 per-  
formance, while providing a clear migration  
path to ULTRA-3 and beyond.  
When The LX5248/49 Is Enabled, The  
Differential Sense (DIFFSENSE) Pin Sup-  
plies A Voltage Between 1.2V And 1.4V.  
In application, the terminator DIFFSENSE  
output is connected to the system  
DIFFSENSE line. If there are no single ended  
or HVD devices attached to the system the  
LVD output will be enabled. If the  
DIFFSENSE line is LOW, indicating a single  
ended device, the LX5248/49 output will be  
HiZ. If the DIFFSENSE line is HIGH, indi-  
cating a high voltage differential device the  
LX5248/49 output will be HiZ.  
The LX5248/49 IC Has A TTL Compat-  
ible DISCONNECT Pin. The LX5248/49 is  
active LOW. During sleep mode, power  
dissipationisreducedtoameager5µA, while  
also placing all outputs in a HI Z state. Also  
during sleep mode, the DIFFSENSE function  
is disabled and is placed in a HI Z state.  
Diffsense Line Driver  
Current Limit And Thermal Protection  
Compatible With The Pending SPI-2 LVD  
Specification  
Pin Compatible With Industry Standard  
Multi-Mode Terminators  
For UCC5240 Pin Compatible LVD ONLY  
Terminator (See LX5245/5246)  
NOTE: For current data & package dimensions, visit our web site: http://www.linfinity.com.  
PRODUCT HIGHLIGHT  
B U S V O L T A G E /  
V O D  
VOD = V(-) - V(+), Logic = 0  
NEGATED  
V(+)  
100mV  
0V  
V(-)  
-100mV  
LX5248/49  
LX5248/49  
PACKAGE ORDER INFORMATION  
Plastic SSOP  
36-pin  
Plastic TSSOP  
24-pin  
Plastic TSSOP  
TA (°C)  
0 to 70K  
DB  
PW  
PW  
28-pin  
LX5249CDBK  
LX5249CPWK  
LX5248CPW  
Note: All surface-mount packages are available in Tape & Reel.  
Append the letter "T" to part number. (i.e. LX5249CPWT)  
L I N F I N I T Y M I C R O E L E C T R O N I C S I N C .  
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570  
Copyright © 2001  
Rev. 0.6 10/00  
1
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5248/LX5249  
UltraMAX  
9-LI N E LVD SCSI TE R M I N AT O R  
P R E L I M I N A R Y D A T A S H E E T  
ABSOLUTE MAXIMUM RATINGS (Note 1)  
PACKAGE PIN OUTS  
TermPwr Voltage ..............................................................................................+6.5V  
Signal Line Voltage ...................................................................................0V to 6.5V  
Differential Voltage ...................................................................................0V to 6.5V  
Operating Junction Temperature  
Plastic (PW Package) ................................................................................... 150°C  
Storage Temperature Range ..............................................................-65°C to 150°C  
Lead Temperature (Soldering, 10 seconds) .................................................... 300°C  
1
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
VTERM  
N.C.  
2
HVD  
N.C.  
3
LVD  
N.C.  
4
SE  
1+  
5
9-  
1-  
6
9+  
2+  
7
8-  
2-  
8
8+  
HEATSINK/GND  
9
HEATSINK/GND  
HEATSINK/GND  
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with  
respect to Ground. Currents are positive into, negative out of the specified  
terminal.  
10/  
11/  
12/  
13/  
14/  
15/  
16/  
17/  
18/  
HEATSINK/GND  
HEATSINK/GND  
HEATSINK/GND  
3+  
7-  
3-  
7+  
4+  
THERMAL DATA  
6-  
4-  
6+  
5+  
5-  
DB PACKAGE:  
DIFF B  
DIFFSENSE  
MASTER/SLAVE  
DISCONNECT  
GND  
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA  
PW PACKAGE:  
50°C/W  
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA  
100°C/W  
LX5249C ("N.C." = No Internal Connection)  
DB PACKAGE (Top View)  
Junction Temperature Calculation: TJ = TA + (PD x θJA).  
The θJA numbers are guidelines for the thermal performance of the device/pc-board  
system. All of the above assume no ambient airflow.  
1+  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
VTERM  
1-  
2
N.C.  
3
2+  
9-  
4
2-  
9+  
MASTER / SLAVE FUNCTION TABLE  
5
3+  
8-  
6
3-  
8+  
MASTER /  
SLAVE  
DIFFSENSE  
Status  
Output  
Current  
7
4+  
7-  
8
4-  
7+  
9
5+  
5-  
6-  
L*  
H
HI Z  
1.3V  
1.3V  
0mA  
15mA Source  
15mA Source  
10/  
11/  
12/  
6+  
DISCONNECT  
GND  
DIFFSENSE  
MASTER/SLAVE  
Open (Pull-up)  
LX5249CPW ("N.C." = No Internal Connection)  
PW PACKAGE (Top View)  
* When in Low state, terminator will detect state of DIFFSENSE line.  
DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE  
N.C.  
VTERM  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
1+  
LVD  
2
LX5248/LX5249  
DISCONNECT  
Outputs  
Quiescent  
Current  
DIFFSENSE  
1-  
9-  
3
Status  
Type  
2+  
9+  
4
2-  
8-  
5
L
L < 0.5V  
Disable  
Enable  
Disable  
Disable  
Disable  
HiZ  
LVD  
HiZ  
HiZ  
HiZ  
2mA  
21mA  
2mA  
N.C.  
8+  
6
L
L
0.7V to 1.9V  
3+  
7
N.C.  
3-  
8
7-  
H > 2.4V  
4+  
9
7+  
10/  
11/  
12/  
13/  
14/  
4-  
6-  
H
X
X
10µA  
10µA  
5+  
5-  
6+  
Open  
DIFFB  
DISCONNECT  
GND  
DIFFSENSE  
MASTER/SLAVE  
LX5248CPW ("N.C." = No Internal Connection)  
PW PACKAGE (Top View)  
Copyright © 2001  
Rev. 0.6 1/01  
2
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5248/LX5249  
UltraMAX  
9-LI N E LVD SCSI TE R M I N AT O R  
P R E L I M I N A R Y D A T A S H E E T  
RECOMMENDED OPERATING CONDITIONS  
(Note 2)  
Recommended Operating Conditions  
Parameter  
Symbol  
Units  
Min.  
Typ.  
Max.  
Termpwr Voltage  
Signal Line Voltage  
VTERM  
3.0  
0
5.25  
5.0  
V
V
V
Disconnect Input Voltage  
0
VTERM  
Operating Junction Temperature Range  
LX5248 / LX5249  
0
70  
°C  
Note 2. Range over which the device is functional.  
ELECTRICAL CHARACTERISTICS  
(Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C TA 70°C. TermPwr = 3.3V,  
DISCONNECT: LX5248/49 = L. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient  
temperature.)  
LX5248 / 5249  
Parameter  
Symbol  
Test Conditions  
Units  
Min. Typ.  
Max.  
LVD Terminator Section  
TermPwr Supply Current  
LVD ICC All term lines = Open  
21  
5
25  
10  
mA  
µA  
V
mV  
DISCONNECT: LX5248/49 = H  
Common Mode Voltage  
VCM  
VFSB  
ZD  
1.125  
100  
100  
1.25  
112  
105  
200  
2.5  
0
1.375  
125  
110  
300  
Offset Voltage (Fail Safe Bias Voltage)  
Differential Terminator Impedance  
Common Mode Impedance  
Output Capacitance  
Open circuit between - and + (see Note 3)  
VOD = -1V to 1V  
ZCM  
CO  
ILEAK  
0V to 2.5V  
100  
DISCONNECT: LX5248/49 = H  
DISCONNECT: LX5248/49 = H, VLINE = 0 to 4V, TA=25°C  
DISCONNECT: LX5248/49 = H, VTERM = 0V, VLINE = 2.7V  
DIFFSENSE = 1.4V to 0V  
pF  
µA  
µA  
ms  
Output Leakage  
2
1
150  
Mode Change Delay  
tDF  
100  
DIFFSENSE Section  
DIFFSENSE Output Voltage  
DIFFSENSE Output Source Current  
DIFFSENSE Sink Current  
VDIFF  
IDIFF  
1.2  
5.0  
1.3  
1.4  
15.0  
200  
10  
V
DIFFSENSE = 0V  
mA  
µA  
µA  
ISINK (DIFF) VIN = 2.75V  
ISINK (DIFF) DISCONNECT: LX5248/49 = H, TA = 25°C  
DIFFSENSE Output Leakage  
DISCONNECT Section  
DISCONNECT Threshold  
Input Current  
VTH  
IIL  
0.8  
0.8  
2.0  
10  
V
µA  
DISCONNECT: LX5248/49 = 0V  
MASTER / SLAVE Section  
MASTER / SLAVE Threshold  
Input Current  
VTH (MS)  
IIL (MS)  
2.0  
10  
V
µA  
MASTER / SLAVE: LX5248/49 = 0V  
Note 3. Open circuit failsafe voltage.  
Copyright © 2001  
Rev. 0.6 1/01  
3
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5248/LX5249  
UltraMAX  
9-LI N E LVD SCSI TE R M I N AT O R  
P R E L I M I N A R Y D A T A S H E E T  
BLOCK DIAGRAM  
Power ON  
1 of 9  
1.07mA  
VTERMPWR  
Internal VREF  
1.30V  
HVD  
LVD (-)  
LVD  
SE  
ZD(-)  
52.5  
Zcm  
200  
LVD  
1.25V  
ZD(+)  
52.5  
HVD  
LVD (+)  
LVD  
SE  
10mA  
M/S  
DIFFSENSE  
1.07mA  
HVD  
Window  
Comp.  
SE  
LATCH  
HVD  
LVD  
SE  
LVD  
DIFF B  
Power ON  
& Mode  
Change  
Delay  
Power ON  
FIGURE 1 — LX5248 / 5249 Block Diagram  
Copyright © 2001  
Rev. 0.6 1/01  
4
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5248/LX5249  
UltraMAX  
9-LI N E LVD SCSI TE R M I N AT O R  
P R E L I M I N A R Y D A T A S H E E T  
FUNCTIONAL PIN DESCRIPTION  
Pin  
Designator  
Description  
1-, 2-, 3-, 4-, 5-, 6-, 8-, 8-, 9-/  
Negative signal termination lines.  
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+/ Positive signal termination lines.  
VTERM  
Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7µF  
low-ESR capacitor for every three terminator devices. It is absolutely necessary to connect this pin to  
the decoupling capacitor through a very low impedence (big traces on PCB). Keeping distances  
very short from the decoupling capacitors to the VTERM pin is also critical. The value of the  
decoupling capacitor is somewhat layout dependant and some applications may benefit from high-  
frequency decoupling with 0.1µF capacitors right at VTERM pin.  
DISCONNECT/  
GND/  
Enables / disables terminator. See Power Down Function Table for logic level per device.  
Terminator ground pin. Connect to ground.  
MASTER / SLAVE/  
Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the control-  
ling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see  
MASTER/SLAVE Function Table.  
DIFFSENSE/  
DIFFB/  
This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to detect the  
SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the  
MASTER/SLAVE pin. Please see DIFFSENSE and MASTER/SLAVE Function Tables. Internally  
connected to DIFFB pin through 20kOhm resistor.  
Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense  
pin when the device is a non-controlling terminator (MASTER/SLAVE pin is Low). An RC filter  
(20kOhm / 0.1µF) is not required on the LX5249, as it has an internal timer.  
SE/  
LVD/  
Single-ended output; when High, terminator is operating in SE mode.  
Low Voltage Differential output. When High, terminator is operating in LVD mode.  
High Voltage Differential output. When High, terminator is operating in HVD mode.  
HVD/  
HEATSINK/  
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink  
only, and not a true groung connection. It is recommended that these pins be connected to ground,  
but can be left floating.  
Copyright © 2001  
Rev. 0.6 1/01  
5
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7  
LX5248/LX5249  
UltraMAX  
9-LI N E LVD SCSI TE R M I N AT O R  
P R E L I M I N A R Y D A T A S H E E T  
APPLICATION SCHEMATIC  
H
O
S
T
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-
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1
1
-
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V
V
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a
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(
9
)
L
L
X
X
5
5
2
2
4
4
8
9
L
L
X
X
5
5
2
2
4
4
8
9
9
9
-
+
9
9
-
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D
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C
C
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D
D
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C
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N
N
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/
/
/
S
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M
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/
/
/
S
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D
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N
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N
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D
D
D
G
G
G
N
N
N
D
D
D
D
D
D
I
I
I
F
F
F
F
F
F
B
B
B
*
*
*
I
I
I
F
F
F
F
F
F
B
B
B
*
*
*
V
1
1
1
1
-
+
M
+
4
.
7
µ
F
4
.
7
µ
F
D
a
t
a
L
i
n
s
e
(
9
)
L
L
X
X
5
5
2
2
4
4
8
9
L
L
X
X
5
5
2
2
4
4
8
99  
9
-
+
9
9
-
+
D
M
G
D
D
D
I
F
F
S
E
N
S
E
V
1
1
1
1
-
+
M
+
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o
t
n
r
o
l
L
i
n
s
e
(
9
)
L
L
X
X
5
5
2
2
4
4
8
L
L
X
X
5
5
2
2
4
4
8
9
99  
9
-
+
9
9
-
+
D
M
G
D
D
D
I
F
F
S
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N
S
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*
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5
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p
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a
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e
.
FIGURE 2 — LX5248 / 5249 Application Schematic  
UltraMAX is a trademark of Linfinity Microelectronics Inc.  
PRELIMINARY DATA - Information contained in this document is pre-production data, and is proprietary to LinFinity. It may  
not modified in any way without the express written consent of LinFinity. Product referred to herein is offered in sample form  
only, and Linfinity reserves the right to change or discontinue this proposed product at any time.  
Copyright © 2001  
Rev. 0.6 1/01  
6

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