SG3561AM-TR [MICROSEMI]
Analog Circuit;型号: | SG3561AM-TR |
厂家: | Microsemi |
描述: | Analog Circuit 光电二极管 |
文件: | 总19页 (文件大小:830K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
N
OT RECOMMENDED FOR NEW DESIGN
SG3561A
CONTROLLER
P
OWER
FACTOR
D
A T A S H E E T
T
H E
I
N F I N I T E
P
O W E R O F
I N N O V A T I O N
KEY FEATURES
DESCRIPTION
This monolithic integrated circuit provides all the pole output stage for directing driving of the
necessary functions for designing an active power power MOSFET. In addition to the above, an
MICRO-POWER START-UP
MODE (250µA typ.)
LOW OPERATING CURRENT
CONSUMPTION
factor correction circuit in conjunction with off-
line power converters. Although the IC is
internal logic circuit detects the zero crossing of
the inductor current and maintains discontinuous
INTERNAL 1.5% REFERENCE
TOTEM POLE OUTPUT STAGE
AUTOMATIC CURRENT
LIMITING OF BOOST STAGE
DISCNUOUS MODE OF
OPITH NO
CAPS
NCOENSATION
RED
AVALE I& 14-PIN
PLASTIAND 8-PIN SOIC
PACKAGE
optimized for electronic ballast applications, it can current mode of operation such that it allows no
also be used in switched mode AC-DC power current gaps to appear. This type of operation
converters. Included in the 8-pin DIP package are; provides a higher P.F. correction, as well as
an under voltage lockout with a micropower start- lower harmonic distortion over the fixed
up with a 2V hysteresis, an internal temperature
compensated bandgap reference, a unity gain
stable error amplifier, one quadrant multiplier
stage, a current sense comparator and a totem
frequency discontinuous current mode. The
SG3561A is characterized for operation over the
ambient temperature range of -25°C to +85°C.
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
E 1562/1563 FOR NEW
NS
PRODUCT HIGHGHT
TYPICAL
A
PPLICATION OF THE SG3561
IN A
FLUORESCENT
L
AMP
B
ALLAST WITH
A
CTIVE
P
OW
F
ACTOR
C
ONTROL
7
T32
R11
560K
Core: PQ2625
L1 Ind: 450µH
12
0Ω
Gap:
48mil
C7
0.1µF
#22 - AWG
225V
D6
MR856
110K
R3
1/2W
D1
D2
D5
1N4935
1N4004 1N4004
85
R9
1MΩ
3
F
V
2.2
V
IDET
OUT
IN
R6
47Ω
AC+
C8
Q1
IRF730
C6
100µF
400V
7
120V
0.1µF
C4
0.22µF
2
1
MULT
IN
COMP
INV
3
AC-
R7
330Ω
R10
11K
4
C2
0.01µF
C.S.
GND
6
R13
2KΩ
C5
R8
1000pF 0.22Ω
PACKAGE ORDER INFO
Plastic DIP
8-Pin
Plastic DIP
14-Pin
Plastic SOIC
8-Pin
RoHS Compliant / Pb-free
Transition DC: 0440
M
N
DM
TA (°C)
RoHS Compliant / Pb-free Transition DC: 0503
-25 to 85
SG3561AM
SG3561AN
SG3561ADM
Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. SG3561AM-TR)
L
I N
F
I N I T Y
M
I C R O E L E C T R O N I C S
I N C .
Copyright © 1994
Rev. 1.2a,2005-03-09
1
11861 WESTERN
A
VENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
ABSOLUTE MAXIMUM RATINGS (Note 1)
PACKAGE PIN OUTS
Supply Voltage (VIN)...................................................................................... -0.3V to 28V
Peak Driver Output Current ................................................................................ ±500mA
Driver Output Clamping Diodes
VQ > VCC or VQ < -0.3V ....................................................................................... ±10mA
Detector Clamping Diodes
E.A. INV.
COMP.
MULT. INPUT
C.S.
1
2
3
4
8
7
6
5
VIN
VO
GROUND
IDET
M PACKAGE
op View)
VDET > 6V or VDET < 0.9V .................................................................................... ±10mA
Error Amp, Multiplier, and Comparator Input Voltages ...............................-0.3V to 6V
Detector Input Voltage (Note 2) ......................................................................0.95 to 6V
Operating Junction Temperature
Plastic (M, N and DM Packages) ......................................................................... 150°C
Storage Temperature Range......................................................................-65°C to 150°C
Peak Package Solder Reflow Temp. (40 seconds max. exposure).....................260°C (+0,-5)
1
3
4
5
6
7
4
13
12
11
10
9
C.
E.A.INV
N.C.
N.C.
VIN
VO
GROUND
IDET
COMP.
LT UT
N.C.
Note 1. Values beyond which damage may occur. All voltages are specified with respect to
ground, and all currents are positive into the specified terminal.
Note 2. With no limiting resistor.
8
MULT OUTPUT
C.S.
N PACKAGE
(Top View)
THERMAL DATA
M PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
N PACKAGE:
5°C/W
/W
1
2
3
4
8
7
6
5
E.A. INV.
COMP.
MULT. INPUT
C.S.
VIN
VO
GROUND
IDET
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
DM PACKAGE:
DM PACKAGE
(Top View)
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJ
165°C/W
RoHS / Pb-free 100% Matte Tin Lead Finish
Junction Temperature Calculation: TJ = TA + (PD x .
The θJA numbers are guidelines for the thermal perof thvice/pc-board
system. All of the above assume no ambient airflow.
Copyright © 1994
Rev. 1.2a
2
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
RECOMMENDED OPERATING CONDITIONS
(Note 3)
Recommended Operating Conditions
Parameter
Symbol
Units
Min.
Typ.
Max.
Supply Voltage Range
VIN
11
25
V
Peak Driver Output Current
3ꢀꢀ
mA
Operating Ambient Temperature Range:
SG3561A
TA
-25
85
°C
Note 3. Range over which the device is functional.
ELECTRICAL CHARACTERISTIC
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for the A with ≤ T85°C; VIN=12V. Low
duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to thnt temperat)
SG3561A
n. Typ.
Parameter
Symbol
Test Conditions
Units
Max.
Under-Voltage Lockout Section
Start Threshold Voltage
UV Lockout Hysteresis
9.2
1.6
1ꢀ
2.ꢀ
1ꢀ.8
2.4
V
V
Supply Current Section
Start-Up Supply Current
Operating Supply Current
Dynamic Operating Supply Current
VIN < VTH
VIN = 12V, Output Not g
IN = 12V, 5ꢀKHz,
ꢀ.25
6
ꢀ.5
12
15
mA
mA
mA
AVE
V
1ꢀ
Reference Section (Note 4)
Initial Accuracy
IREF = ꢀmA, TJ = 25
12V < V5V
ꢀ < I2mA
2.463
2.5ꢀ
ꢀ.1
ꢀ.1
2ꢀ
2.538
1ꢀ
1ꢀ
V
Line Regulation
mV
mV
mV
Load Regulation
Temperature Stability
Error Amplifier Section
Input Offset Voltage (Note 4)
Input Bias Current
-15
-2
6ꢀ
15
mV
µA
dB
-ꢀ.1
86
Large Signal Open Loop Voltage
Slew Rate
4)
ꢀ.6
86
v/µsec
dB
mA
mA
V
6ꢀ
2
Power Supply RejectioNote 4)
Output Source Cu
Output Sink Cur
OH = 3.5V
OL = 2.ꢀV
2
1.2
V
4
Output Voltage
Unity Gain Band
No Load on E.A. Output
1.ꢀ
57
MHz
°
Phase Margin
(Electrical Characteristics continued next page.)
Copyright © 1994
Rev. 1.2a
3
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
ELECTRICAL CHARACTERISTICS (Cont'd.)
SG3561A
Min. Typ.
Parameter
Symbol
Test Conditions
Units
Max.
Multiplier Section
M1 Input Voltage Range
M2 Input Voltage Range
Input Bias Current (M1)
Multiplier Gain (Note 5), (Note 4)
ꢀ
VREF
-2
2
VREF +1
2
V
V
µA
/V
/V
65
65
-ꢀ.
ꢀ.
ꢀ.78
V
M1 = 1V, VEAꢀ = 3.5V
VM1 = 2V, VEAꢀ = 3.5V
%/°C
V
Multiplier Gain Temperature Stability
Maximum Multiplier Output Voltage
V
M1 = 1V, VEAꢀ > 4V
M1 = 2V, VEAꢀ > 4V
V
V
Current Sense Comparator Section
Input Bias Current
Current Sense Delay to Output
ꢀV ≤ VCS ≤ 1.7V
E.A.OUT = 3.7V
1
1
2ꢀꢀ
5
5ꢀꢀ
µA
ns
Detect Section
Input Voltage Threshold
Hysteresis
1.3
175
1.6
V
mV
V
V
µA
mA
Input LO Clamp Voltage
Input HI Clamp Voltage
Input Current
I
I
DET = 1ꢀꢀµA
DET = 3mA
ꢀ.95
6.1
-1ꢀ
7.1
1ꢀ
3
1V ≤ VDET ≤ 6V
VDET < ꢀ.9V, VDET >
Input HI/LO Clamp Diode Current
Output Driver Section
Output High Voltage
Output Low Voltage
Output Rise Time
IL = -1ꢀmA, VIN = 1
IL = 1ꢀmN = 12V
CL = ꢀꢀpF
7
9
V
V
ꢀ.8
1ꢀꢀ
9ꢀ
1.5
2ꢀꢀ
2ꢀꢀ
ns
ns
Output Fall Time
CL ꢀꢀꢀp
Notes: 4. Because the reference is not brought out extey, these cifications are tested at probe only, and cannot be tested on the packaged
part. They are guaranteed by desigshown for illutive purposes only.
VMO
5. K =
(VM1) x (VEA0 - VREF
)
6. This parameter, although guaed in production.
Copyright © 1994
Rev. 1.2a
4
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
BLOCK DIAGRAM
/
PIN DESCRIPTIONS
*MULT
OUT
*VREF
UVLO
8
REF
VIN
2.5V
10V
(2V HYST)
_
+
VIN
Σ
VM0
VEAO
1
2
INV
COMP
VM1
CURRE
DETE
C
3
4
7
VO
MULT IN
C.S.
_
+
IDET
5
* Available only in
6
GND
FUNCTIONAL DESCRIPTION
Pin
#
Description
VIN
8
Input supply age.
≤ 8
≥ 10V
IIN ≤ 0.5mA VIN MAX < 25V
IIN ≤ 15mA
GND
INV
6
1
Input voltage always be the lowest potential of all the pins.
he Erromplifier. The output of the Boost converter should be resistively divided to 2.5V and
.
COMP
MULT
C.S.
2
3
4
ror Amplifier. A feedback compensation network is placed between this pin and the INV pin.
Input ltiplier stage. The full-wave rectified AC is divided to less than 2V and is connected to this pin.
Input to the PWM comparator. Current is sensed in the Boost stage MOSFET by a resistor in the source lead, and is
fed to this pin through a low-pass filter
IDET
5
A current driven logic input with internal clamp.
A second winding on the Boost inductor senses the flyback voltage associated with the zero crossing of the inductor
current and feeds it to the IDET pin through a limiting resistor. The logic circuit processes this signal, such that the
converter operates in a discontinuous conduction current mode, where there is no current gap between the switching
cycles.
VO
7
PWM output pin. A totem-pole output stage specially designed for direct driving the MOSFET.
Copyright © 1994
Rev. 1.2a
5
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
FIGURE INDEX
Application Information
FIGURE #
1. GENERAL APPLICATION CIRCUIT
2. START UP CIRCUITRY
3. START UP VOLTAGE
4. REFERENCE VOLTAGE vs. TEMPERATURE
5. TYPICAL COMPENSATION CIRCUIT
6. MULTIPLIER CIRCUIT
7. CURRENT SENSE CIRCUIT
8.
IDETECT INPUT CIRCUIT
9. TYPICAL START UP CIRCUIT USING DIAC
10. IDETECT LOGIC CIRCUIT
11. TYPICAL APPLICATION WITH 12ꢀV INPUT
12. INDUCTOR CURRENT
13. CURRENT DETECT EXAMPLE
Typical Applications
FIGURE #
14. TYPICAL APPLICATION OF THE SG3561A IN AN 8ꢀW
FLUORESCENT LAMP BALLAST WITH ACTIVE POWER FACTOR
CONTROL - 120V
15. TYPICAL APPLICATION OF THE SG3561A IN AN 8ꢀ
FLUORESCENT LAMP BALLAST WITH ACTIVE POWFACTO
CONTROL - 220V
16. TYPICAL APPLICATION OF THE SG3561A IN AN 8ꢀW
FLUORESCENT LAMP BALLAST WITH AWER FACT
CONTROL - 277V\
17. TYPICAL APPLICATION OF THE
FLUORESCENT LAMP BALLAST WIACTOR
CONTROL - 277OST AP
Copyright © 1994
Rev. 1.2a
6
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
HV BUS
FUNCTIONAL DESCRIPTION
The operation of the circuit is best described by referring to the
diagram in Figure 1.
R3
D5
L1
The multiplier stage generates an output voltage (VM0) from
the rectified waveform of the AC input (VM1) and the amplitude
of the error amplifier output (VEA). This voltage controls the peak
inductorcurrentbyturningthepowerMOSFEToffatathreshold,
where the current sense voltage (VCS) reaches a given nominal
value. This causes the power MOSFET to latch-off until the
current in the inductor drops to zero. Once this happens, the
secondary winding of the inductor changes its voltage polarity,
and gets detected by an internal comparator stage. The polarity
of the windings are chosen such that a low IDET voltage turns on
the power MOSFET and maintains operation until the above
process repeats itself. An external trigger voltage to the IDET is
required to start-up the converter until the auxiliary winding of
the inductor takes over the operation.
C3
6.7V
INTERNAL
CIRCUIT
BIASING
RA
1.25V
R
R5
NP
DC
OUTPUT
RECTIFIED
OUTPUT
FIGURE 2 — START UP CIRCUITRY
NS
R4
VCC
capacitor C3 is first charged by the current through
3. Once this voltage exceeds 10V, then the IC starts
g, requiring more supply current than R3 can provide.
auses the energy stored in the capacitor to supply the IC
with the operating current until the bootstrap winding on L1
takes over the power to maintain operation.
R9
R1
REF
2.5V
10V
8V
VM1
VEA
VMO
INV
ERROR AMP
R2
COMP
G3
G2
1.3V
R6
R8
G1
VDS
C3
VC3
DISCHARGE
GND
VSTART (TYP 10V)
VHYST
(TYP 2V)
FIGPLICATICIRCUIT
UNDERVOLTA
The purpose of tge lockout is to perform two
functions: 1) to maina low quiescent current during
power-up, 2) to guarantee that the IC is fully functional before
the output stage is activated. To realize this, a micropower
comparator with a start-up threshold of 10V and a built-in
hysteresis of 2V is incorporated. This comparator acts as a switch
for the pre-regulator stage, which supplies a stable bias to the
internal circuitry of the IC. Figure 2 shows a simplified schematic
of this section, as well as the external components required, in-
order to generate bootstraping voltage from the secondary
winding of inductor. The operation of the circuitry is as follows.
BOOTSTRAP
WINDING
RT & CT TIME CONSTANT
t
FIGURE 3 — START UP VOLTAGE
RA
RA
RC
VSTART = 1.25
+ 1
VHYST = 1.25
RB ||RC
Copyright © 1994
Rev. 1.2a
7
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
VOLTAGE REFERENCE
MULTIPLIER
The voltage reference is a low drift bandgap design which
provides a stable +2.5V output with ±1.5% initial tolerance. This
pin is internally connected to the non-inverting input of error
amplifierandisonlyavailableina14-pinpackage. Itcanprovide
up to 2mA of current for powering any external circuitries and
is not internally current limited.
The SG3561A features a one quadrant multiplier stage having
two inputs: one is internally driven by a DC voltage (this being
the difference of E.A. output and VREF (M2)), and the other (M1)
is available for external connection. The output is internally tied
to an input of the PWM comparator. he rectified AC input is
typically divided down to less thaconnected to the
"M1" input by a resistor dividerput of the multiplier
which is a function oboth inprols inductor peak
current during each oper.
The multiplier is mnear if thut is limited to less
than 1V and the E.A. ouis kept below 3.5V (under all
specified load and line cons)The output clamps to a
maximum valuypically e E.A. output is higher than
2.500
2.495
2.490
2.485
2.480
4V and VM1
MULT.
OUTPUT
E.A.
OUTPUT
2
2.475
2.470
M0
VEA
IN
-55
-35
-15
5
25
45
65
85
105
125
M2
EF
Σ
Temperature - (°C)
FIGURE 4 — REFERENCE VOLTAGE vs. TEMPERATURE
1
R2
ERROR AMPLIFIER
M1
3
The error amplifier is an internally compensated Pnput stage
with access to the inverting input and output pinhe N.It
is internally connected to the voltage reference d ila
only in a 14-pin package. The amplifier is designeor an op
loop gain of 85dB, along with a typical idth of 1MHd
57 degrees of phase margine amut bias current
(2µA max.) results in a DC errIn order to
minimize this effect, the current flust be much
greater than the biaAs an a 1% error in
output, the curret 200µe error amp output
is provided fosation the feedback loop.
This compenst a capacitor connected
between this pput pin. The compensation
capacitor is deswidth such that it adequately
rejects the low frwhich is present at the output
4
C.S.
INPUT
FIGURE 6 — MULTIPLIER CIRCUIT
VM0
K =
where:
VMO
VM1
K
≡ Gain
VM1 (VEA - VREF
)
≡ Mult. Output
≡ Mult. Input
≡ E.A. Output
VEA
CURRENT SENSE COMPARATOR / PWM LATCH
Current Sense comparator is configured as a PNP input
differential stage with one input internally tied to the multiplier
output and the other available for current sensing. Current is
converted to voltage using an external sense resistor in a series
with the power MOSFET (Q1). When voltage across this resistor
exceeds the threshold set by the multiplier output, the current
sense comparator terminates the gate drive to Q1, as well as
resetting the PWM latch. The latch ensures that the output
remains in a low state once the switch current falls back to zero.
An offset is built into current sense input to ensure that the
output remains in a low state when the load is removed from the
output of the converter. This offset is guaranteed to be higher
than the multiplier offset during the above condition.
voltage.
VO
R9
I9
1
1
BW =
2π R9 C4
IBIAS
2
R10
VREF
FIGURE 5 — TYPICAL COMPENSATION CIRCUIT
Copyright © 1994
Rev. 1.2a
8
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
CURRENT SENSE COMPARATOR / PWM LATCH (continued)
Sense resistor R8 is designed according to the following
VZ
formula:
VM0
IL MAX
R8 ≤
where:
K
≡ Gain
R4
IDET
0V
VMO ≡ Mult. Output under
min. line condition
VM1 ≡ Mult. Input
5
VEA ≡ E.A. Output
IDET CP
TO
TO
PIN 7
Q1
R7
FLIPFLOP
(1.3V T
VOFFSET
4
R
FIGURE 8 — INT CIRCUIT
R8
C5
7
Since the iver is inhibited during the power-on
e, an eriggesignal is required to start-up the
coter befe IDET ding takes over the operation. The
triggnal caed either from the second stage of the
converte. the ballast voltage generator), or if stand alone
operation esired from a circuit as shown in Figure 9.
nally, signal should be low enough that the voltage
detector winding is allowed to dominate during the
peration.
VMO
R7 and C5 form a low pass filter to eliminate the
leading edge current spike.
FIGURE 7 — CURRENT SENSE CIRCUIT
PWM DRIVER STAGE
quations below describe the selection of R4 and R5 in
10.
The SG3561A output driver is designed for direct ving of
power MOSFETs. It isa totempolestagewith ±0.5eakcurrent
capability. This typically results in a 100 nanosecd rise
times into a 1000pF capacitive load. Additionatput
held low during the under voltage condition to ensure that
power MOSFET remains in the off sta
2500 VWP ≥ R4 ≥ 400VWP
where VWP ≡ Peak detector
voltage
VTR
1.6
R5 = 0.8 R4
VTR ≡ Trigger voltage
VTR
D7
R11
TO
VO
CURRENT DETECT LOGIC
RES R5
R12
C7
The function of "cuct logihe operating
state of the boto ethe output driver
accordingly. e dowward slope of the
inductor curritoring the voltage across a
FIGURE 9 — TYPICAL START UP CIRCUIT USING DIAC
separate windto the detector input (IDET
)
VW
pin. Once the is to zero, the sensed voltage
reverses, setting a low-level, thus enabling the
output driver. Since egative voltage, a level shifter as
shown in Figure 8 is provided to prevent the IDET pin from going
below the ground. The maximum current drawn from this pin
must be limited to less than 3mA.
TRIGGER
SIGNAL
R4
I
DET 5
VTR
R5
0V
A high level voltage occurs when the inductor discharges.
Referring to Figure 9, once the C.S. comparator inhibits the
output driver and resets the flip-flop, the inductor voltage
reverses and sets the IDET pin to a high level. This ensures the
reset instruction of the current sense comparator and reduces its
noise susceptibility. An internal zener diode with maximum
current capability of 3mA limits the positive voltage swing to 7
volts typically.
VTH
VDM
7
4
C.S.
COMP
FIGURE 10 — IDETECT LOGIC CIRCUIT
Copyright © 1994
Rev. 1.2a
9
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
TYPICAL APPLICATION
The application circuit shown in Figure 11 uses the SG3561A as
the controller to implement a boost type power factor regulator.
The IC controls the regulator, such that the inductor current is
always operating in a discontinuous conduction mode with no
current gaps. This mode of operation has several advantages
over the fixed frequency discontinuous conduction mode: 1)
The switching frequency adjusts itself to the AC line envelope,
causing a sinusoidal current draw, 2) Since there is no current
gap between the switching cycles, the inductor voltage does not
oscillate, causing less radiated noise, 3) The lower peak inductor
current causes less power dissipation in the power MOSFET.
A set of formulas have been derived specifically for this
mode, and are used throughout the design procedure:
The following are specifications for the boost converter:
Input Voltage Range
Output Voltage
Output Power
Efficiency
Power Factor
-
-
-
30V RMS
DC
% at fload
t full load
< 10% at full load
Total Harmonic Distor
R11
560K
Core: PQ2625
L1 Ind: 450µH
Gap: 48mil
R
7
5
300
0.1µF
#22 - AWG 62T
225V
D6
MR856
R4
5T
110K
R3
1/2W
D1
D2
D5
1N4
1N4004 1N4004
5
IDET
R9
1MΩ
C3
68µF
V
R1
2.2M
R6
47Ω
AC+
C8
Q1
IRF730
C6
100µF
400V
7
C1
1µF
OUT
120V
C4
0.22µF
2
1
MULT
IN
COMP
INV
3
AC-
R
R7
330Ω
R10
11K
D3
4
C.S.
1N4004 4
GND
6
R13
2KΩ
C5
R8
1000pF 0.22Ω
FURE 11 — TYPICAL APPLICATION WITH 12ꢀV INPUT
OUTPUT VOL
INDUCTOR PEAK CURRENT
Since the convpe topology, it requires the
output voltage to er than the input voltage. It is
recommended to chooss voltage at least 15% higher than the
maximum input voltage.
It can be shown by referring to Figure 12 that the inductor peak
current is always twice the average input current.
Inductor Peak
Current Envelope
IL
V ≥ 1.15 130 √2 = 211 Volts
*
O
Average
AC Input Current
TON TOFF
FIGURE 12 — INDUCTOR CURRENT
Copyright © 1994
Rev. 1.2a
10
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
INDUCTOR DESIGN (continued)
Assume: PCU = 1.6W (2% of total output)
INDUCTOR PEAK CURRENT (continued)
IIN(t)
= ΣAVE [I (t)]
L
2
450 10-6 (2.4)2
1.724 10-8
*
*
*
= 3.21 10-12 m5
*
1
(IL) (T)
2
IL
2
Kg =
IIN
=
0.15
1.6
T
ILP
2
Step 2: Choose a core with highthe one calculated
IINpeak = IP =
ILP
in Step 1.
AW AE2
Kg/core = k
= Inductor peak current at peak input voltage.
Maximum peak input current can be calculated by using:
2PO
where:
k
A
ding coeft (typ. k=0.4)
≡ Bwindow area
AW ≡ Effecarea
IP
=
ηVP
Mean lh per turn
where:
η
≡ Converter efficiency
VP ≡ Peak AC input voltage
Kg TDK PQ2625:
= mm2
W = 8mm2
56.2mm
assuming: η = 95%, PO = 80W, VPmin = 100√2 = 141
80
2
*
IP=
= 1.2A
(47.7) (118)2
56.2
(.95) (141)
Kg 4
(mm)5 = 4.7 10-12 m5
*
ILP/min AC = 2 1.2 = 2.4A
*
Determine number of turns.
INDUCTOR DESIGN
L ILP
N =
The most important part of the circuit is to design the energ
storage element. To do this, we use the followination to
B AE
450 10-6 2.4
0.15 118 10-6
*
*
calculate the inductance value:
N =
= 61 turns
- VP
ηV
T VP2
OVO
*
AW
*
where: η ≡ Efficien
VO ≡ Output DC Voltage
L1 =
47.7
4 PO
AWIRE = k
= 0.4
= 0.31mm2
= 480mil2
N
61
VInpuage
T period
wer
choose #22 AWG with r = 0.0165Ω/feet resistance.
RW = N
I
r
*
*
w
230 -
R
W = 0.185Ω
.95
(120
L1 =
= 448µH
Step 4: Calculate air gap.
µO N2 AE
Once the induwe can either use the area
product methog (based on copper losses
method), for selecre. In this example, we apply
the Kg approach using ollowing steps:
Ig
=
L
4π 10-7 (61)2 118 10-6
*
*
*
*
Iq =
= 0.122cm = 48 mil
450 10-6
*
Step 1: Calculate Kg using
VS
VO
Step 5: NS ≈ NP
2
2
L1ILP
B
Ω
PCU
15
230
Kg =
NS = 61
= 4T where: VS ≡ secondary voltage
where:
L1 ≡ Required inductance
NS may be adjusted to account for the drop in start-up
capacitor.
Ω
≡ 1.724 10-8
m
*
B
≡ Maximum flux density
ILP ≡ Maximum peak inductor current
PCU ≡ Maximum copper dissipation
Copyright © 1994
Rev. 1.2a
11
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
POWER MOSFET SELECTION
The voltage rating of MOSFET and rectifier must be higher than
the maximum value of the output voltage.
The values of R7 and C4 may be optimized further based on
each specific application. Additionally R13 can be used to
adjust the overall loop gain in order to maintain regulation at
the minimum input voltage.
VDS ≥ 1.2VO MAX
VDS ≥ 282V
The RMS current can be approximated by multiplying the RMS
current at the peak of the line by 0.7.
ERROR AMPLIFIER COMPONENT N
The values of R9 and arcalcbased n the operating
output voltage. The vf C5 is y scted to reject the
120Hz ripple associah the outut voltage. Lack of
adequate ripple rejection ses input current distortion;
however, toomuctionwaslowloopresponseand
a high voltagduring the turn-on.
IRMS = 0.7 ILP √D/3
D ≡ On-time duty cycle
ILP
D = 0.39 at VAC = 100V
ILPI = 2.4A
IRMS = (0.7) (2.4) (√.39/3) = 0.61A
R9
V
VREF
=
D
PDC
IRMS
RDS
≤
2
IRMS/triangle = ILP √D/3
R9
R10
30
-1 = 91
PDC ≡ allowable power dissipation
1
0.61
uming 9 = 1MΩ
Then: R10 = 11K
RDS
≤
= 1.6Ω
choose IRF730 with RDS = 1Ω and VDS = 400V.
ut voltages higher than 250V, safety regulations may
wo ¼W resistors to be placed in series.
CURRENT SENSE AND MULTIPLIER COMPONENT TION
Assuming a 40dB rejection at 120Hz:
1
Resistors R1 and R2 are selected such that the pevoltag
input (pin 3) is 1V at the maximum line voltag
Gain =
Gain/120Hz ≤ 0.01
2π f R9 C5
100
R1
R2
C5 ≥
= VAC PEAK -1
2π(120)(106)
R1
C5 ≥ 0.133µf
choose C5 = 0.22µf
1
= 183
if R1 =
12K
R2
ThevalueofRedusiingequations:
1
BW =
=
= 0.72Hz
2π R9 C5
2π (106)(.22 10-6)
*
V
M0 = k VM
ximum voltage at M1 input
er min. line condition
INPUT RECTIFIER AND CAPACITOR SELECTION
The current through each diode is a half-wave rectified sine
wave. The maximum current happens at minimum line with a
peak value of 1.2A.
VM0 = (0.75) 0.58
VMO 0.58
2.4
R8 =
=
=
= 0.24Ω
choose R8 = 0.22Ω
ILP
2.4
IPEAK
1.2
IAVE
=
=
= 0.38A
π
π
To eliminate the turn-on current spike, a low pass filter with a
high corner frequency must be designed such that:
choose 1N4004 with 1A rating.
PDISS = (IAVE) (V ) = 0.38 0.9 = 0.344W
Turn-on
Spike
R7C4 ≥ 1.6T
*
F
if T = 100nsec
TJ = TA + PD x θJA
assuming θJA = 65°C/W for 1/8"
lead length.
R7C4 ≥ 0.16µsec
T
assuming C4 = 1000pF
R7 ≥ 160Ω
TJ = 80 + (.344)(65) = 102°C
Copyright © 1994
Rev. 1.2a
12
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
INPUT RECTIFIER AND CAPACITOR SELECTION (continued)
Assuming ϕ is the percentage of allowable input current ripple,
assuming ∆T = 2ms
C1 can be calculated using the following equations:
15 10-3
2
10-3
*
*
*
C3 (∆T) ≥
= 17µf
2 PO
1.8V
REFF
=
η IP2
choose C3 = 68µF.
1
C1 ≥
fSW ≡ Switching frequency
of inductor current
OUTPUT CAPACITOR ELECTION
ϕ 2π REFF fSW
There are mainly two s for seoutput capacitor:
A large enough capacitncmaintain a low ripple voltage, and
a low ESR value in order to nt igh power dissipation due
to RMS current
The outpnce can be approximated from the
fowing eq
at peak input voltage.
if ϕ = 3%
2
80
*
REFF
=
= 117Ω
(.95)(1.2)2
1
C1 ≥
= 0.9µF
(.03)(2π)(117)(50000)
C6
where: IDC ≡ DC output current
∆V ≡ Output ripple
2π fLIN
choose 1µF, 250V capacitor.
230
=
0.348A
BIAS SUPPLY COMPONENT SELECTION
ing 5% peak to peak ripple,
A bleeding resistor (R3) off of either output voltage or capaci
C1 can be selected such that it provides sufficient start-up curre
for the IC, as well as charging the start-up capacito
0.348
= 81µF
2π (60) (11.5)
choose C6 = 100µF.
VP MIN
R3 =
IST
VP MIN
≡ Stap nt
≡ Peak voltage
in. AC line
IST
140
R3 =
= 280K
CURRENT DETECT COMPONENT SELECTION
0.5 10-3
*
VIN RMS iput
The values of R4 and R5 can be calculated using the following
equations:
VIN MAX
PR3
=
≤ 0.25W
R3
2
R3 ≥ 4VIN MAX
400VWP ≥ R4 ≥ 2500VWP
280K ≥ R3 ≥
ose R3 0K
VTR
1.6
R5 = 0.8R4
The start-up osen such that it supplies
power to the on the bootstrap winding
exceeds the starypically around 10 volts). C3
must also be designw ripple voltage at twice the line
frequency.
where:
VWP ≡ Maximum detector winding voltage
VTR ≡ Trigger voltage
I
C3 (∆VR) ≥
C3 (∆T) ≥
C3 (∆VR) ≥
I
≡ Operating current
2 fLINE ∆VR
fLINE ≡ Line frequency
∆Vr ≡ Ripple voltage
∆T ≡ Time allowed for bootstrap
winding to reach start-up
threshold
I∆T
∆VH
15 10-3
*
=62µF
2
60 2
*
*
Copyright © 1994
Rev. 1.2a
13
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
APPLICATION INFORMATION
CURRENT DETECT COMPONENT SELECTION (continued)
Assuming VWP = 15V and peak trigger voltage from the start-up
circuitry is 7V, the values R4 and R5 using above formulas are:
6KΩ ≤ R4 ≤ 37.5KΩ
choose R4 = 22K
choose R5 = 51K
7
R5 = 0.8 (22)
-1 = 59.4KΩ
1.6
VZ
TRIGGER
SIGNAL
VTR
0V
R5
R4
0V
VWP
VTH
FIGURE 13 — CURRENT DETECT EXAMPL
Copyright © 1994
Rev. 1.2a
14
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
TYPICAL APPLICATIONS
120V
Pin numbers are for 8-pn dip package.
D7
HT32
R11
560K
Core: PQ2625
L1 Ind: 450µH
R12
300Ω
Gap: 48mil
C7
0.1µF
R5
39K
#22 - AWG 62T
V
1
2
M
3
4
R4
22K
5T
110K
1/2W
R3
D1
D2
D5
1N4935
1N4004 1N4004
8
VIN
5
IDET
MΩ
C3
68µF
25V
R1
2.2M
AC+
C8
Q1
IRF730
C6
100µF
400V
C1
1µF
OUT
120V
0.1µF
0
1
MULT
IN
COMP
V
3
AC-
R2
12K
R7
330Ω
R10
11K
D3
D4
C2
0.01µF
C.S
1N4004 1N4004
R
2KΩ
C5
R8
3300pF 0.22Ω
FIGURE 14 — ICAL APPLICATION OF THE SG3561A IN AN 8ꢀW
FLUORESCENT MP BALITH ACTIVE POWER FACTOR CONTROL.
Electrical
Specification
120VAC Input 230VDC 80W Output
Ref.
Component
Manuf.
Ref.
Component
Manuf.
IC
L1
SG3561AM
PQ262Core
IRF7
1
1
M
HT
2.2M
Linfinity
TDK
I.R.
Motorola
Motorola
Motorola
TECCOR
C1
C2
C3
C4
C5
C6
C7
C8
1µF/250V
0.01µF/50V
68µF/25V
0.22µF/50V
3300pF/50V
100µF/400V
0.1µF/50V
0.1µF/50V
Q1
D1-D4
D5
D6
D7
R1
R2
12KΩ
R3
R4
110K, ½W
22K
R5
R6
R7
51K
47Ω
330Ω
R8
0.22Ω, ½W - Carbon type
1MΩ, 1% Res
11KΩ, 1% Res
560KΩ
R9
R10
R11
R12
R13
300Ω
2KΩ
Copyright © 1994
Rev. 1.2a
15
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
TYPICAL APPLICATIONS
220V
Pin numbers are for 8-pn dip package.
D7
HT32
R11
560K
Core: PQ2620
L1 Ind: 1.2mH
R12
300Ω
Gap: 48mil
C7
0.1µF
R5
39K
#24 - AWG 80T
V
1
2
M
22K
3
4
5
6
4T
7T
220K
1/2W
R3
D1
D2
D5
1N4935
1N4004 1N4004
8
VIN
5
IDET
MΩ
1%
R1
2.2M
C3
68µF
25V
AC+
C8
Q1
IRF830
C6
47µF
450V
C1
0.22µF
600V
OUT
220V
0.1µF
0
1
MUL
COMP
V
3
IN
AC-
R2
12K
R7
330Ω
R10
6.19K
1%
D3
D4
C2
0.01µF
C.
1N4004 1N4004
D
R8
1Ω
1/2W
R
OPEN
C5
3300pF
FIGURE 15 — CL APPLICATIOF THE SG3561A IN AN 8ꢀW
FLUORESCENT MP BALLWITH ACTIVE POWER FACTOR CONTROL.
Electrical
Specification
220VAC Input — 400VDC 80W Output
Ref.
Component
Manuf.
Ref.
Component
Manuf.
IC
L1
SG3561A
PQ262/Core
IRF8
1
1
M
H
2.2
Linfinity
TDK
C1
C2
C3
C4
C5
C6
C7
C8
0.22µF/600V
0.01µF/50V
68µF/25V
0.22µF/50V
3300pF/50V
47µF/450V
0.1µF/50V
0.1µF/50V
Q1
D1-D4
D5
D6
D7
R1
I.R.
Motorola
Motorola
Motorola
Teccor
R2
12KΩ
220K, ½W
22K
R3
R4
R5
R6
39K
47Ω
R7
330Ω
R8
1Ω, ½W - Carbon type
1MΩ, 1% Res
2.7MΩ
R9
R10
R11
R12
R13
560KΩ
300Ω
2KΩ
Copyright © 1994
Rev. 1.2a
16
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
TYPICAL APPLICATIONS
277V
Pin numbers are for 8-pn dip package.
D7
HT32
R11
1.5M
Core: PQ2620
L1 Ind: 1.2mH
R12
300Ω
Gap: 48mil
C7
0.1µF
R5
22K
#24 - AWG 80T
1
2
M
R4
3
4
5
6
3T
15T
22K
260K
1W
R3
D1
D2
D5
1N4935
1N4007 1N4007
R9
Ω
C6
47µF
315V
8
VIN
5
IDET
R1
2.2M
C3
68µF
25V
AC+
C8
Q1
IRFBE42
C1
0.22µF
600V
OUT
277V
0.1µF
0
1
MULT
COMP
V
C9
47µF
315V
3
IN
AC-
R2
5.1K
R7
330Ω
R10
11.3K
1%
D3
D4
C.S
1N4007 1N4007
D
C2
0.047µF
R8
0.51Ω
1/2W
R
OPEN
C5
3300pF
FIGURE 16 — CL APPLICATIOF THE SG3561A IN AN 8ꢀW
FLUORESCENT MP BALLWITH ACTIVE POWER FACTOR CONTROL.
Electrical
Specification
277VAC Input — 485VDC 80W Output
Ref.
Component
Manuf.
Ref.
Component
Manuf.
IC
L1
SG3561A
Linfinity
TDK
C1
C2
C3
C4
C5
0.22µF/600V
0.047µF/50V
68µF/25V
0.22µF/50V
3300pF/50V
PQ26201 Core
IRFB
1
1
M
H
2.2
Q1
D1-D4
D5
D6
D7
R1
I.R.
Motorola
Motorola
Motorola
TECCOR
C6, C9 47µF/315V
C7
C8
0.1µF/50V
0.1µF/50V
R2
5.1KΩ
260KΩ, 1W
22KΩ
R3
R4
R5
R6
22KΩ
47Ω
R7
330Ω
R8
0.51Ω, ½W - Carbon type
2.2MΩ, 1% Res
11.3KΩ, 1% Res
1.5KΩ
R9
R10
R11
R12
R13
300Ω
Copyright © 1994
Rev. 1.2a
17
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
TYPICAL APPLICATIONS
277V - Buck Boost Application
Pin numbers are for 8-pn dip package.
5V
0
-
Core: PQ2620
L1 Ind: 1.2mH
Gap: 48mil
R5
22K
230V
DC
MUR480 or
BYW96D
#24 - AWG 80T
+
1
2
R4
3
4
5
6
4
1%
4T
7T
R16
499K
1%
22K
150K
2W
R3
D1
D2
D5
1N4935
VCC
1N4007 1N4007
R13
99K
1%
8
VIN
5
IDET
R1
2.2M
1%
VC
R15
499K
1%
C3
68µF
25V
R6
22Ω
IC2
lm35n
AC+
C9
IC1
Q
IR
7
C1
0.22µF
600V
OUT
277V
0.1µF
2
1
MULT
IN
COMP
INV
R9
3
AC-
0.22
R11
R2
7.5K
1%
R
330Ω
12.7K
1%
D3
D4
4
C2
0.033µF
C7
C.S.
R10
130K
1N4007 1N4007
GND
6
R12
12.7K
1%
R
0.22
1/2W
C8
0.033µF
0.033µF
FIGURE 17 — TYPIAPPLICE SG3561A IN AN 8ꢀW
FLUORESCENT LBALLAST WITH ATIVE POWER FACTOR CONTROL.
Electrical
Specification
90-265VAC Input — 30VD/ 80W Output
Ref.
Component
Manuf.
Ref.
Component
M
IC
IC2
L1
Q1
D1-D4
D5
D6
R1
R2
R3
SG3561A
LM358N
Linfinity
C1
C2
C3
C4
C5
C6
0.22µF/600V
0.033µF/50V
68µF/25V
0.22µF/50V
3300pF/50V
100µF/400V
PQ262Core
IRFP
1
1
B
2.
7.5K
150K, 2
22kΩ
TDK
I.R.
Motorola
Motorola
C7, C8 0.033µF/50V
C9 0.1µF/50V
R4
R5
R6
22K
22Ω
R7
330Ω
0.22Ω, ½W
20K
R8
R9
R10
R11
R12
130K
12.7K, 1%
12.7K, 1%
R13, 14 499K, 350V
R15, 16 499K, 350V
Copyright © 1994
Rev. 1.2a
18
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG3561A
P O W E R F A C T O R C O N T R O L L E R
N O T R E C O M M E N D E D F O R N E W D E S I G N S
TYPICAL APPLICATIONS
90 - 265V
Pin numbers are for 8-pn dip package.
D7
HT32
R11
1.5M
Core: PQ2620
L1 Ind: 1.2mH
R12
300Ω
Gap: 48mil
C7
0.1µF
R5
22K
#24 - AWG 80T
1
2
MR
R4
3
4
5
6
3T
15T
22K
130K
1W
R3
D1
D2
D5
1N4935
1N4007 1N4007
R9
Ω
C6
47µF
315V
R1
2.2M
1%
8
VIN
5
IDET
C3
68µF
25V
AC+
C8
Q1
IRFBE42
C1
0.47µF
600V
OUT
90-265V
0.1µF
0
C9
47µF
315V
1
MUL
COMP
V
3
IN
AC-
R2
6.49K
1%
R10
12.7K
1%
R7
330Ω
D3
D4
C.
1N4007 1N4007
D
C2
0.047µF
R8
0.51Ω
1/2W
R
100Ω
C5
1000pF
FIGURE 18 — TYPIAPPLICE SG3561A IN AN 8ꢀW
FLUORESCENT LBALLAST WITH ATIVE POWER FACTOR CONTROL.
Electrical
Specification
90-265VAC Input — 32VD/ 80W Output
Ref.
Component
Manuf.
Ref.
Component
M
IC
L1
SG3561A
Linfinity
TDK
C1
C2
C3
C4
C5
0.47µF/600V
0.047µF/50V
68µF/25V
0.22µF/50V
1000pF/50V
PQ2620/H7C1 Core
IRFBE42
1N
1
M
H
2.
6.49
Q1
D1-D4
D5
D6
D7
R1
R2
R3
R4
I.R.
Motorola
Motorola
Motorola
TECCOR
C6, C9 47µF/315V
C7
C8
0.1µF/50V
0.1µF/50V
130K,
22kΩ
R5
R6
22K
22Ω
R7
330Ω
R8
0.51Ω, ½W - Carbon type
2.2MΩ, 1% Res
12.7KΩ, 1% Res
1.5KΩ
R9
R10
R11
R12
R13
300Ω
100Ω
Copyright © 1994
Rev. 1.2a
19
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