WS512K32NV-70HMA [MICROSEMI]
SRAM Module, 512KX32, 70ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66;型号: | WS512K32NV-70HMA |
厂家: | Microsemi |
描述: | SRAM Module, 512KX32, 70ns, CMOS, CPGA66, 1.185 X 1.185 INCH, CERAMIC, HIP-66 静态存储器 内存集成电路 |
文件: | 总8页 (文件大小:378K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
WS512K32V-XXX
White Electronic Designs
ADVANCED*
512Kx32 SRAM 3.3V MODULE
FEATURES
Access Times of 70, 85, 100, 120ns
TTL Compatible Inputs and Outputs
Packaging
Low Voltage Operation:
• 3.3V ± 10% Power Supply
Low Power CMOS
• 66-pin, PGA Type, 1.185 inch square, Hermetic
Ceramic HIP (Package 401)
• 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880
inch), 4.57mm (0.180") high (Package 510).
Designed to fit JEDEC 68 lead 0.990" CQFJ
footprint
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
WS512K32V-XG2TX - 8 grams typical
WS512K32V-XHX - 13 grams typical
Organized as 512Kx32; User Configurable as
1024Kx16 or 2Mx8
Commercial, Industrial and Military Temperature
Ranges
* This product is under development, is not qualified or characterized and is subject to
change or cancellation without notice.
PIN CONFIGURATION FOR WS512K32NV-XHX
Top View
Pin Description
1
12
23
34
45
56
I/O0-31
A0-18
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
I/O8
I/O9
I/O10
A13
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A6
VCC
CS4#
WE4#
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
WE1-4
#
I/O14
I/O13
I/O12
OE#
A18
CS1-4
OE#
VCC
#
Output Enable
Power Supply
Ground
GND
NC
Not Connected
A14
A7
A15
A11
NC
A4
A1
Block Diagram
A16
A12
WE1#
I/O7
A8
A5
A2
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
OE#
A0-18
A17
VCC
A9
WE3#
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
CS1#
NC
I/O6
I/O16
I/O17
I/O18
512K x 8
512K x 8
512K x 8
512K x 8
I/O0
I/O1
I/O2
I/O5
8
8
8
8
I/O3
I/O4
I/O0-7
I/O8-15
I/O16-23
I/O24-31
11
22
33
44
55
66
February 2000
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
FIGURE 2 – PIN CONFIGURATION FOR WS512K32V-XG2TX
Top View Pin Description
I/O0-31
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
A0-18
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60 I/O16
WE1-4
#
I/O0 10
I/O1 11
I/O2 12
I/O3 13
I/O4 14
I/O5 15
I/O6 16
I/O7 17
GND 18
I/O8 19
I/O9 20
I/O10 21
I/O11 22
I/O12 23
I/O13 24
I/O14 25
I/O15 26
CS1-4
OE#
VCC
#
59 I/O17
58 I/O18
57 I/O19
56 I/O20
55 I/O21
54 I/O22
53 I/O23
52 GND
51 I/O24
50 I/O25
49 I/O26
48 I/O27
47 I/O28
46 I/O29
45 I/O30
44 I/O31
Output Enable
Power Supply
Ground
GND
NC
Not Connected
Block Diagram
WE
1
#
CS
1
#
WE
2
#
CS
2
#
WE
3
#
CS
3
#
4 4
WE # CS #
OE#
A
0-18
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
512K x 8
512K x 8
512K x 8
512K x 8
8
8
8
8
I/O0-7
I/O8-15
I/O16-23
I/O24-31
The WEDC 68 lead G2T CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2T has the TCE
and lead inspection advantage
of the CQFP form.
0.940"
TYP
February 2000
Rev. 2
2
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
CS#
H
L
L
L
OE#
X
L
H
X
WE#
X
H
H
L
Mode
Standby
Read
Out Disable
Write
Data I/O
High Z
Data Out
High Z
Power
Standby
Active
Active
Active
Parameter
Symbol
TA
Min
-55
-65
-0.5
Max
+125
+150
VCC +0.5
150
Unit
°C
°C
V
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
TSTG
VG
Data In
TJ
°C
V
VCC
-0.5
4.6
RECOMMENDED OPERATING CONDITIONS
CAPACITANCE
TA = +25°C
Parameter
Symbol
VCC
VIH
Min
3.0
Max
3.6
Unit
V
Parameter
OE# capacitance
WE1-4# capacitance
HIP (PGA)
Symbol
COE
Conditions
VIN = 0V, f = 1.0 MHz 50 pF
Max Unit
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temperature (Mil)
2.2
VCC + 0.3
+0.8
V
CWE
VIN = 0V, f = 1.0 MHz
pF
VIL
-0.3
-0.5
V
20
15
TA
+125
°C
CQFP G2U
CS# capacitance
Data# I/O capacitance
Address input capacitance
CCS
CI/O
CAD
VIN = 0V, f = 1.0 MHz 20 pF
VI/O = 0V, f = 1.0 MHz 20 pF
VIN = 0V, f = 1.0 MHz 50 pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Sym
Conditions
Units
Min
Max
10
Input Leakage Current
Output Leakage Current
Operating Supply Current
Standby Current
ILI
ILO
VCC = 3.6, VIN = GND to VCC
μA
μA
mA
mA
V
CS# = VIH, OE# = VIH, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 3.6
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 3.6
IOL = 2.1mA, VCC = 3.0
10
ICC x 32
ISB
100
2.0
0.4
Output Low Voltage
Output High Voltage
VOL
VOH
IOH = -1.0mA, VCC = 3.0
2.4
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V.
February 2000
Rev. 2
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
AC CHARACTERISTICS
VCC = 3.3V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-70
-85
-100
-120
Units
Read Cycle
Min
Max
Min
Max
Min
Max
Min
Max
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tRC
tAA
70
85
100
120
ns
ns
ns
ns
ns
ns
ns
ns
ns
70
85
100
120
tOH
tACS
tOE
5
5
5
5
70
35
85
40
100
50
120
60
1
tCLZ
10
5
10
5
10
5
10
5
1
tOLZ
tCHZ
tOHZ
1
25
25
25
25
35
35
35
35
1
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 3.3V, GND = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
-70 -85
-100
-120
Units
Write Cycle
Min
70
60
60
30
50
0
Max
Min
85
75
75
30
50
0
Max
Min
100
80
80
40
60
0
Max
Min
120
100
100
40
60
0
Max
Write Cycle Time
tWC
tCW
tAW
tDW
tWP
tAS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
tAH
tOW
tWHZ
tDH
5
5
5
5
5
5
5
5
1
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
1
25
25
35
35
0
0
0
0
1. This parameter is guaranteed by design but not tested.
FIGURE 3 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Input Pulse Levels
Typ
Unit
V
IOL
VIL = 0, VIH = 2.5
Current Source
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
5
1.5
1.5
ns
V
V
V
Z
≈
1.5V
D.U.T.
(Bipolar Supply)
NOTES:
C
eff = 50 pf
VZ is programmable from -2V to +7V.
I
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL
.
IOH
Current Source
I
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
February 2000
Rev. 2
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
TIMING WAVEFORM – READ CYCLE
tRC
ADDRESS
tAA
tRC
CS#
ADDRESS
DATA I/O
tAA
tCHZ
tACS
tCLZ
tOH
OE#
PREVIOUS DATA VALID
DATA VALID
tOE
tOLZ
tOHZ
READ CYCLE 1 (CS# = OE# = V , WE# = V
IL IH
)
DATA I/O
DATA VALID
HIGH IMPEDANCE
READ CYCLE 2 (WE# = V
)
IH
WRITE CYCLE – WE# CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
CS#
WE#
tAS
tWP
tOW
tDH
tWHZ
tDW
DATA I/O
DATA VALID
WRITE CYCLE 1, WE# CONTROLLED
WRITE CYCLE – CS# CONTROLLED
tWC
ADDRESS
CS#
tAW
tAH
tAS
tCW
tWP
WE#
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 2, CS# CONTROLLED
February 2000
Rev. 2
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
PACKAGE 401: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)
30.1 (1.185) 0.38 (0.015) Sꢀ
PIN 1 IDENTIFIER
SꢀUARE PAD
ON BOTTOM
25.4 (1.0) TYP
6.22 (0.245)
MAX
3.81 (0.150)
0.13 (0.005)
1.27 (0.050) 0.1 (0.005)
0.76 (0.030) 0.1 (0.005)
2.54 (0.100)
TYP
1.27 (0.050) TYP DIA
15.24 (0.600) TYP
25.4 (1.0) TYP
0.46 (0.018) 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
February 2000
Rev. 2
6
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
PACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T)
25.15 (0.990) 0.26 (0.010) Sꢀ
4.57 (0.180) MAX
22.36 (0.880) 0.26 (0.010) Sꢀ
0.27 (0.011) 0.04 (0.002)
Pin 1
0.25 (0.010) REF
R 0.25
(0.010)
24.03 (0.946)
0.26 (0.010)
0.19 (0.007)
0.06 (0.002)
1° / 7°
1.0 (0.040)
0.127 (0.005)
23.87
(0.940) REF
DETAIL A
1.27
(0.050)
TYP
SEE DETAIL "A"
0.38 (0.015) 0.05 (0.002)
20.3 (0.800) REF
The WEDC 68 lead G2T CQFP
fills the same fit and function as
the JEDEC 68 lead CQFJ or 68
PLCC. But the G2T has the TCE
and lead inspection advantage
of the CQFP form.
0.940"
TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
February 2000
Rev. 2
7
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS512K32V-XXX
White Electronic Designs
ADVANCED
ORDERING INFORMATION
W S 512K 32 X V - XXX X X X
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
DEVICE GRADE:
M = Military
= Industrial
C = Commercial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
I
PACKAGE TYPE:
H = Ceramic Hex In Line Package, HIP (Package 401)
G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509)
ACCESS TIME (ns)
Low Voltage Supply 3.3V ± 10%
IMPROVEMENT MARK:
N = No Connect at pin 21 and 39 in HIP for Upgrades
ORGANIZATION, 512Kx32
User configurable as 1Mx16 or 2Mx8
SRAM
WHITE ELECTRONIC DESIGNS CORP.
February 2000
Rev. 2
8
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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