WSF2816-39HIMA [MICROSEMI]
Memory Circuit, 512KX16, CMOS, CPGA66, HIP-66;型号: | WSF2816-39HIMA |
厂家: | Microsemi |
描述: | Memory Circuit, 512KX16, CMOS, CPGA66, HIP-66 静态存储器 内存集成电路 |
文件: | 总11页 (文件大小:980K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
WSF2816-39XX
128Kx16 SRAM / 512Kx16 NOR FLASH MODULE
Built-in Decoupling Caps and Multiple Ground Pins for Low
FEATURES
Access Times of 35ns (SRAM) and 90ns (FLASH)
Noise Operation
Weight:
Packaging
• WSF2816-39G2UX - 8 grams typical
• WSF2816-39H1X - 13 grams typical
• 66 pin, PGA Type, 1.075" square HIP, Hermetic Ceramic
HIP (Package 400)
• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880") square
(Package 510) 3.56mm (0.140") height. Designed to fit
JEDEC 68 lead 0.990” CQFJ footprint (FIGURE 2)
FLASH MEMORY FEATURES
100,000 Erase/Program Cycles Minimum
Sector Architecture
128Kx16 5V SRAM
• 8 equal size sectors of 64K bytes each
512Kx16 5V NOR FLASH
• Any combination of sectors can be concurrently erased.
Also supports full chip erase
Organized as 128Kx16 of SRAM and 512Kx16 of Flash
Memory with separate Data Buses
5 Volt Programming
Both blocks of memory are User Configurable as 256Kx8
Low Power CMOS
Embedded Erase and Program Algorithms
Hardware Write Protection
Commercial, Industrial and Military Temperature Ranges
TTL Compatible Inputs and Outputs
Note: For Flash programming information and waveforms refer to Flash Programming 4M5
Application Note AN0037.
FIGURE1 – PIN CONFIGURATION
FOR WSF2816-39H1X
PIN DESCRIPTION
FD0-15
SD0-15
A0-18
Flash Data Inputs/Outputs
SRAM Data Inputs/Outputs
Address Inputs
TOP VIEW
SWE1-2
#
SRAM Write Enable
SRAM Chip Selects
Output Enable
1
12
23
34
45
56
SCS1-2
#
SD8
SD9
SD10
A13
A14
A15
A16
A18
SD0
SD1
SD2
SWE2#
SCS2#
GND
SD11
A10
SD15
SD14
SD13
SD12
OE#
FD8
FD9
FD10
A6
VCC
FCS2#
FWE2#
FD11
A3
FD15
FD14
FD13
FD12
A0
OE#
VCC
Power Supply
GND
NC
Ground
Not Connected
FWE1-2
#
Flash Write Enable
Flash Chip Select
FCS1-2
#
A7
BLOCK DIAGRAM
A11
A17
NC
A4
A1
SWE1# SCS1# SWE2# SCS2# FWE1# FCS1# FWE2# FCS2#
A12
SWE1#
SD7
A8
A5
A2
OE#
A0-16
VCC
A9
FWE1#
FCS1#
GND
FD3
FD7
FD6
FD5
FD4
128K x 8
SRAM
128K x 8
SRAM
512K x 8
FLASH
512K x 8
FLASH
SCS1#
NC
SD6
FD0
FD1
FD2
SD5
8
8
8
8
SD3
SD4
11
22
33
44
55
66
FD0-7
FD8-15
SD8-15
SD0-7
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
FIGURE 2 – PIN CONFIGURATION FOR
WSF2816-39G2UX
PIN DESCRIPTION
FD0-15
SD0-15
A0-18
Flash Data Inputs/Outputs
SRAM Data Inputs/Outputs
Address Inputs
SWE1-2#
SCS1-2#
OE#
SRAM Write Enable
SRAM Chip Selects
Output Enable
9
8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
VCC
Power Supply
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
GND
SD8
FD0
FD1
FD2
FD3
FD4
FD5
FD6
FD7
GND
FD8
FD9
FD10
FD11
FD12
FD13
FD14
FD15
GND
Ground
NC
Not Connected
FWE1-2#
FCS1-2#
Flash Write Enable
Flash Chip Select
SD9
SD10
SD11
SD12
SD13
SD14
SD15
BLOCK DIAGRAM
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
SWE1# SCS1# SWE2# SCS2# FWE1# FCS1# FWE2# FCS2#
OE#
A0-16
128K x 8
SRAM
128K x 8
SRAM
512K x 8
FLASH
512K x 8
FLASH
8
8
8
8
FD0-7
FD8-15
SD8-15
SD0-7
The Microsemi 68 lead G2U CQFP fills the same fit and function as the
JEDEC 68 lead CQFJ or 68 PLCC. But the G2U has the TCE and lead
inspection advantage of the CQFP form.
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
2
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
ABSOLUTE MAXIMUM RATINGS
SRAM TRUTH TABLE
Parameter
Symbol
TA
Min
-55
Max
+125
+150
7.0
Unit
°C
°C
V
SCS#
OE#
X
SWE#
Mode
Standby
Read
Data I/O
High Z
Power
Standby
Active
Operating Temperature (Mil.)
Storage Temperature
Signal Voltage Relative to GND
Supply Voltage
H
L
L
L
X
H
H
L
TSTG
VG
-65
L
Data Out
High Z
-0.5
-0.5
H
Read
Active
VCC
7.0
V
X
Write
Data In
Active
NOTE: Auto select mode that require high voltage (VID) is not available. Flash and SRAM
share same address bus and would damage SRAM inputs.
Parameter
CAPACITANCE
Flash Data Retention
20 years
TA = +25°C
Flash Endurance (write/erase cycles)
100,000 min
NOTES: 1. Stresses above the absolute maximum rating may cause permanent damage to the
device. Extended operation at the maximum levels may degrade performance and
affect reliability.
Test
Symbol
COE
Condition
Max Unit
OE# Capacitance
WE# Capacitance
CS# Capacitance
VIN = 0V, f = 1.0MHz
VIN = 0V, f = 1.0MHz
VIN = 0V, f = 1.0MHz
VIN = 0V, f = 1.0MHz
VIN = 0V, f = 1.0MHz
50
20
20
20
50
pF
pF
pF
pF
pF
CWE
CCS
Data I/O Capacitance
CI/O
Address Line Capacitance
CAD
RECOMMENDED OPERATING CONDITIONS
This parameter is guaranteed by design but not tested.
Parameter
Symbol
VCC
Min
4.5
2.2
-0.5
-55
-40
0
Max
5.5
Unit
V
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp. (Mil., Q)
Operating Temp. (Ind.)
Operating Temp. (Com.)
VIH
VCC + 0.3
+0.8
V
VIL
V
TA
+125
°C
°C
°C
TA
TA
+85
+70
DC CHARACTERISTICS – CMOS COMPATIBLE
Parameter
Symbol
ILI
Conditions
VCC = VCC MAX, VIN = GND to VCC
Min
Max
10
Unit
Input Leakage Current
Output Leakage Current
μA
μA
mA
mA
V
ILO
SCS# = FCS# = VIH, OE# = VIH, VOUT = GND to VCC
FCS# = VIL, OE# = FCS# = VIH, f = 5MHz, VCC = VCC MAX
FCS# = SCS# = VCC ± 0.5V, OE# = VIH, f = 5MHz, VCC = VCC MAX
IOL = 8.0mA, VCC = VCC MIN
10
SRAM Operating Supply Current x 16 Mode
Standby Current
ICCx16
ISB
325
20
SRAM Output Low Voltage
VOL
0.4
SRAM Output High Voltage
Flash VCC Active Current for Read (1, 2)
Flash VCC Active Current for Program or Erase (2, 3)
Flash Output Low Voltage
VOH
ICC1
ICC2
VOL
IOH = -4.0mA, VCC = VCC MIN
2.4
V
FCS# = VIL, OE# = SCS# = VIH
120
140
0.45
mA
mA
V
FCS# = VIL, OE# = SCS# = VIH
IOL = 8.0mA, VCC = VCC MIN
Flash Output High Voltage
VOH1
VOH2
VLKO
IOH = -2.5 mA, VCC = VCC MIN
0.85 x VCC
VCC -0.4
3.2
V
Flash Output High Voltage
IOH = -100 μA, VCC = VCC MIN
V
Flash Low VCC Lock Out Voltage
4.2
V
NOTES:
1. The ICC current listed includes both the DC operating current and the frequency dependent component (@ 5 MHz).
The frequency component typically is less than 4mA/MHz, with OE# at VIH
2. Maximum current specifications are tested with VCC = VCC MAX
3. ICC active while Embedded Algorithm (program or erase) is in progress.
.
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
SRAM AC CHARACTERISTICS
SRAM AC CHARACTERISTICS
Parameter
-35
Parameter
-35
Symbol
Unit
Symbol
Unit
Min
Max
Min
35
25
25
20
25
0
Max
Read Cycle
Write Cycle
Read Cycle Time
tRC
tAA
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
Write Cycle Time
tWC
tCW
tAW
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Access Time
35
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tOH
tACS
tOE
0
35
20
tDW
tWP
tAS
1
tCLZ
3
0
Address Setup Time
1
tOLZ
Address Hold Time
tAH
0
1
tCHZ
20
20
Output Active from End of Write
Write Enable to Output in High Z
Data Hold from Write Time
tOW1
tWHZ1
tDH
4
1
tOHZ
20
0
1. This parameter is guaranteed by design but not tested.
1. This parameter is guaranteed by design but not tested.
FIGURE 3 – AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
Input Pulse Levels
Input Rise and Fall
V
IL = 0, VIH = 3.0
V
ns
V
IOL
5
Current Source
Input and Output Reference Level
Output Timing Reference Level
1.5
1.5
V
Notes: VZ is programmable from -2V to +7V.
I
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75Ω.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
D.U.T.
Ceff = 50 pf
VZ ≈ 1.5V
(Bipolar Supply)
V
I
.
IOH
Current Source
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
FIGURE 4 – SRAM TIMING WAVEFORM — READ CYCLE
tRC
ADDRESS
tAA
tRC
SCS#
ADDRESS
DATA I/O
tAA
tCHZ
tACS
tCLZ
tOH
SOE#
PREVIOUS DATA VALID
DATA VALID
tOE
tOLZ
tOHZ
READ CYCLE 1 (SCS# = OE# = V , SWE# = V
IL IH
)
DATA I/O
DATA VALID
HIGH IMPEDANCE
READ CYCLE 2 (SWE# = V
IH
)
FIGURE 5 – SRAM WRITE CYCLE — SWE# CONTROLLED
tWC
ADDRESS
tAW
tAH
tCW
SCS#
tAS
tWP
SWE#
tOW
tWHZ
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 1, SWE# CONTROLLED
FIGURE 6 – SRAM WRITE CYCLE — SCS# CONTROLLED
tWC
ADDRESS
tAW
tAH
tAS
tCW
SCS#
tWP
SWE#
tDW
tDH
DATA I/O
DATA VALID
WRITE CYCLE 2, SCS# CONTROLLED
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
5
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FWE# CONTROLLED
-90
Parameter
Symbol
Unit
Min
90
0
Max
Write Cycle Time
tAVAV
tELWL
tWLWH
tAVWL
tWC
tCS
tWP
tAS
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
45
0
ns
ns
Data Setup Time
tDVWH
tWHDX
tWLAX
tWHEH
tWHWL
tWHWH1
tWHWH2
tGHWL
tDS
45
0
ns
Data Hold Time
tDH
tAH
tCH
tWPH
ns
Address Hold Time
45
0
ns
Chip Select Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
ns
20
ns
300
15
μs
sec
μs
μs
sec
ns
Read Recovery Time Before Write
0
VCC Set-up Time
tVCS
50
Chip Programming Time
Output Enable Setup Time
Output Enable Hold Time (1)
Chip Erase Time
11
64
tOES
tOEH
0
10
ns
sec
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH1 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data# Polling.
FLASH AC CHARACTERISTICS – READ ONLY OPERATIONS
-90
Parameter
Symbol
Unit
Min
90
Max
Read Cycle Time
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
ns
ns
ns
ns
ns
ns
ns
Address Access Time
90
90
35
20
20
Chip Select Access Time
OE# to Output Valid
Chip Select to Output High Z (1)
OE# High to Output High Z (1)
Output Hold from Address, CS# or OE# Change, whichever is first
1. Guaranteed by design, not tested.
tDF
tOH
0
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
6
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
FLASH AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, FCS# CONTROLLED
-90
Parameter
Symbol
Unit
Min
90
0
Max
Write Cycle Time
tAVAV
tWLEL
tELEH
tWC
tWS
tCP
ns
ns
FWE# Setup Time
FCS# Pulse Width
45
0
ns
Address Setup Time
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
45
0
ns
Data Hold Time
tDH
tAH
tWH
tCPH
ns
Address Hold Time
45
0
ns
FWE# Hold From FWE# High
FCS# Pulse Width High
Duration Of Byte Programming Operation (1)
Duration Of Erase Operation (2)
Read Recovery Before Write
Chip Programming Time
Chip Erase Time (3)
tEHWH
tEHEL
ns
20
ns
tWHWH1
tWHWH2
tGHEL
300
15
μs
sec
ns
0
11
64
sec
sec
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH1 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
7
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
PACKAGE 400 – 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) 0.25 (0.010) Sꢀ
PIN 1 IDENTIFIER
SꢀUARE PAD
ON BOTTOM
25.4 (1.0) TYP
4.60 (0.181)
MAX
3.81 (0.150)
0.13 (0.005)
0.76 (0.030) 0.13 (0.005)
15.24 (0.600) TYP
25.4 (1.0) TYP
2.54 (0.100)
TYP
1.27 (0.050) TYP DIA
0.46 (0.018) 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
8
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
PACKAGE 510 – 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) Sꢀ
3.56 (0.140) MAX
22.36 (0.880) 0.25 (0.010) Sꢀ
0.254 (0.010)
+ 0.051 (0.002)
- 0.025 (0.001)
0.254 (0.010) TYP
R 0.127
24.0 (0.946)
(0.005)
0.53 (0.021)
0.18 (0.007)
0.25 (0.010)
MIN
1°/ 7°
1.01 (0.040)
0.13 (0.005)
DETAIL A
1.27 (0.050) TYP
0.38 (0.015)
0.05 (0.002)
SEE DETAIL “A”
20.32 (0.800) TYP
The Microsemi 68 lead G2U CQFP fills the same
fit and function as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2U has the TCE and lead
inspection advantage of the CQFP form.
24.0 (0.946) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
9
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
ORDERING INFORMATION
W S F 2816 - 39 X X X
MICROSEMI CORPORATION
SRAM
NOR FLASH
2Mbit of SRAM and 8Mbit of FLASH
Organization: 128K x 16 SRAM and
512K x 16 Flash
ACCESS TIME (ns)
39 = 35ns SRAM and 90ns FLASH
PACKAGE TYPE:
H1 = 1.075" sq. Ceramic Hex In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
DEVICE GRADE:
M = Military Screened
I = Industrial
-55°C to +125°C
-40°C to +85°C
0°C to +70°C
C = Commercial
LEAD FINISH:
Blank = Gold plated leads
A = Solder dip leads
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
10
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
WSF2816-39XX
Document Title
128Kx16 SRAM / 512Kx16 NOR FLASH MODULE
Revision History
Rev # History
Release Date Status
Rev 7
Changes (Pg. 1-16)
August 2011
Final
7.1 Change document layout from White Electronic Designs to Microsemi
7.2 Add document Revision History page
Rev 8
Changes (Pg. 1, 3, 4, 6, 7, 13)
May 2012
Final
8.1 Add NOR to doc title
8.2 Add 5V to 512Kx32 SRAM bullet
8.3 Add NOR to 512Kx32 5V Flash bullet
8.4 Add minimum to 100,000 Erase/Program Cycles bullet
8.5 Delete 5V ± 10% Supply from 5 Volt Programming bullet
8.6 Delete Junction Temperature row from Absolute Maximum Ratings chart
8.7 Add operating temp for Mil., Ind. and Com. to Recommended Operating
Conditions chart
8.9 Change VCC = 5.5 to VCC = VCC MAX in ILI, ICCx16 and ISB; change SCS# to
FCS# in ILO; change VCC = 5.5 to VCC = VCC MAX in ICCx16 and ISB; change VIH
to VCC ± 0.5V in ISB; change VCC = 4.5 to VCC = VCC MIN in VOL, VOH, VOH1 and
VOH2 in the DC Characteristics chart
8.10 Delete waveforms diagrams from data sheet
8.11 Add NOR to Flash and add "27 = 25ns SRAM and 70ns FLASH" to Access
Time in Ordering Information chart
Microsemi Corporation reserves the right to change products or specifications without notice.
May 2012 © 2012 Microsemi Corporation. All rights reserved.
Rev. 8
11
Microsemi Corporation • (602) 437-1520 • www.microsemi.com
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