MIC4425CN [MIC]

Dual 3A-Peak Low-Side MOSFET Driver Bipolar/CMOS/DMOS Process; 双路3A峰值低侧MOSFET驱动器双极/ CMOS / DMOS工艺


型号：	MIC4425CN
厂家：	MIC GROUP RECTIFIERS
描述：	Dual 3A-Peak Low-Side MOSFET Driver Bipolar/CMOS/DMOS Process 双路3A峰值低侧MOSFET驱动器双极/ CMOS / DMOS工艺驱动器接口集成电路光电二极管 CD
文件：	总13页 (文件大小：219K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MIC4423/4424/4425

Micrel, Inc.

MIC4423/4424/4425

Dual 3A-Peak Low-Side MOSFET Driver

Bipolar/CMOS/DMOS Process

General Description

Features

The MIC4423/4424/4425 family are highly reliable BiCMOS/

DMOS buffer/driver/MOSFET drivers. They are higher out-

put current versions of the MIC4426/4427/4428, which are

improved versions of the MIC426/427/428. All three families

are pin-compatible. The MIC4423/4424/4425 drivers are ca-

pable of giving reliable service in more demanding electrical

environments than their predecessors. They will not latch

under any conditions within their power and voltage ratings.

They can survive up to 5V of noise spiking, of either polarity,

on the ground pin. They can accept, without either damage

or logic upset, up to half an amp of reverse current (either

polarity) forced back into their outputs.

•

Reliable, low-power bipolar/CMOS/DMOS construction

Latch-up protected to >500mA reverse current

Logic input withstands swing to –5V

High 3A-peak output current

Wide 4.5V to 18V operating range

Drives 1800pF capacitance in 25ns

Short <40ns typical delay time

Delay times consistent with in supply voltage change

Matched rise and fall times

TTL logic input independent of supply voltage

Low equivalent 6pF input capacitance

Low supply current

3.5mA with logic-1 input

350µA with logic-0 input

Low 3.5Ω typical output impedance

Output voltage swings within 25mV of ground or V_S.

‘426/7/8-, ‘1426/7/8-, ‘4426/7/8-compatible pinout

Inverting, noninverting, and differential conﬁgurations

TheMIC4423/4424/4425seriesdriversareeasiertouse,more

ﬂexible in operation, and more forgiving than other CMOS

or bipolar drivers currently available. Their BiCMOS/DMOS

construction dissipates minimum power and provides rail-to-

rail voltage swings.

•

Primarily intended for driving power MOSFETs, the

MIC4423/4424/4425driversaresuitablefordrivingotherloads

(capacitive, resistive, or inductive) which require low-imped-

ance, high peak currents, and fast switching times. Heavily

loadedclocklines,coaxialcables,orpiezoelectrictransducers

are some examples. The only known limitation on loading is

that total power dissipated in the driver must be kept within

the maximum power dissipation limits of the package.

Note: See MIC4123/4124/4125 for high power and narrow

pulse applications.

Functional Diagram

V_S

Integrated Component Count:

4 Resistors

4 Capacitors

52 Transistors

INVERTING

0.6mA

0.1mA

OUTA

INA

2kΩ

NONINVERTING

INVERTING

0.6mA

0.1mA

OUTB

INB

2kΩ

NONINVERTING

GND

Ground Unused Inputs

Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

July 2005

MIC4423/4424/4425

Micrel, Inc.

Ordering Information

Part Number

Temperatre

Range

Package

Conﬁguration

Standard

Pb-Free

MIC4423CWM

MIC4423BWM

MIC4423BM

MIC4423CN

MIC4423BN

MIC4424CWM

MIC4424BWM

MIC4424BM

MIC4424CN

MIC4424BN

MIC4425CWM

MIC4425BWM

MIC4425BM

MIC4425CN

MIC4425BN

MIC4423ZWM

MIC4423YWM

MIC4423YM

MIC4423ZN

MIC4423YN

MIC4424ZWM

MIC4424YWM

MIC4424YM

MIC4424ZN

MIC4424YN

MIC4425ZWM

MIC4425YWM

MIC4425YM

Contact Factory

MIC4425YN

0°C to +70°C

–40°C to +85°C

0°C to +70°C

16-pin Wide SOIC

8-pin SOIC

Dual Inverting

8-pin Plastic DIP

16-pin Wide SOIC

8-pin SOIC

Dual Inverting

–40°C to +85°C

0°C to +70°C

Dual Inverting

Dual Non-Inverting

Inverting + Non-Inverting

–40°C to +85°C

0°C to +70°C

8-pin Plastic DIP

16-pin Wide SOIC

8-pin SOIC

–40°C to +85°C

0°C to +70°C

–40°C to +85°C

0°C to +70°C

8-pin Plastic DIP

–40°C to +85°C

Pin Conﬁguration

Driver Conﬁguration

MIC4423xWM

MIC4423xN/M

INA

14 OUTA

15 OUTA

10 OUTB

11 OUTB

INA 2

INB 7

INA 2

INB 4

7 OUTA

5 OUTB

OUTA

WM Package Note:

GND

INB

Duplicate GND, VS, OUTA,

and OUTB pins must be

externally connected together.

OUTB

8-pin DIP (N)

8-pin SOIC (M)

MIC4423xWM

14 OUTA

MIC4424xN/M

INA 2

7 OUTA

15 OUTA

10 OUTB

11 OUTB

INA

16 NC

15 OUTA

14 OUTA

13 VS

INB 7

INB 4

5 OUTB

GND

12 VS

MIC4425xN/M

MIC4423xWM

14 OUTA

11 OUTB

10 OUTB

INA 2

7 OUTA

INB

15 OUTA

10 OUTB

11 OUTB

9 NC

INB 4

5 OUTB

INB 7

16-pin Wide SOIC (WM)

Pin Description

Pin Number

Pin Name

Pin Function

DIP, SOIC

Wide SOIC

2 / 4

2 / 7

INA/B

GND

V_S

Control Input

4, 5

Ground: Duplicate pins must be externally connected together.

12, 13

Supply Input: Duplicate pins must be externally connected together.

Output: Duplicate pins must be externally connected together.

not connected

7 / 5

1, 8

14, 15 / 10, 11

1, 3, 6, 8, 9, 16

OUTA/B

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

Absolute Maximum Ratings (Note 1)

Operating Ratings (Note 2)

Supply Voltage ........................................................... +22V

Input Voltage .................................. V_S+ 0.3V to GND – 5V

Junction Temperature................................................150°C

Storage Temperature Range ......................–65°C to 150°C

Lead Temperature (10 sec.) ......................................300°C

ESD Susceptability, Note 3 ..................................... 1000V

Supply Voltage (V_S) ......................................+4.5V to +18V

Temperature Range

C Version....................................................0°C to +70°C

B Version ................................................–40°C to +85°C

Package Thermal Resistance

DIP θ_JA............................................................. 130°C/W

DIP θ_JC............................................................... 42°C/W

Wide-SOIC θ_JA................................................. 120°C/W

Wide-SOIC θ_JC................................................... 75°C/W

SOIC θ_JA........................................................... 120°C/W

SOIC θ_JC............................................................ 75°C/W

MIC4423/4424/4425 Electrical Characteristics ^{(Note 5)}

4.5V ≤ V_S≤ 18V; T_A= 25°C, bold values indicate –40°C ≤ T_A≤ +85°C; unless noted.

Symbol

Input

V_IH

Parameter

Conditions

Min

2.4

Typ

Max

0.8

Units

Logic 1 Input Voltage

Logic 0 Input Voltage

Input Current

V_IL

I_IN

0V ≤ V_IN≤ V_S

–1

–10

µA

Output

V_OH

High Output Voltage

V_S–0.025

V_OL

Low Output Voltage

0.025

R_O

Output Resistance HI State

I_OUT= 10mA, V_S= 18V

2.8

3.7

3.5

4.3

V_IN= 0.8V, I_OUT= 10mA, V_S= 18V

I_OUT= 10mA, V_S= 18V

Output Resistance LO State

Peak Output Current

V_IN= 2.4V, I_OUT= 10mA, V_S= 18V

I_PK

Latch-Up Protection

>500

Withstand Reverse Current

Switching Time (Note 4)

t_R

Rise Time

test Figure 1, C_L= 1800pF

test Fﬁgure 1, C_L= 1800pF

test Figure 1, C_L= 1800pF

test Figure 1

t_F

Fall Time

t_D1

t_D2

Delay Tlme

Delay Time

Pulse Width

100

t_PW

400

Power Supply

I_S

Power Supply Current

V_IN= 3.0V (both inputs)

V_IN= 0.0V (both inputs)

1.5

2.5

3.5

I_S

0.15

0.2

0.25

0.3

Note 1. Exceeding the absolute maximum rating may damage the device.

Note 2. The device is not guaranteed to function outside its operating rating.

Note 3. Devices are ESD sensitive. Handling precautions recommended. ESD tested to human body model, 1.5k in series with 100pF.

Note 4. Switching times guaranteed by design.

Note 5. Speciﬁcation for packaged product only.

July 2005

MIC4423/4424/4425

Micrel, Inc.

Test Circuit

V_S= 18V

0.1µF

4.7µF

0.1µF

4.7µF

OUTA

1800pF

OUTA

1800pF

INA

INB

INA

INB

MIC4423

MIC4424

OUTB

1800pF

OUTB

1800pF

90%

2.5V

t_PW≥ 0.5µs

2.5V

t_PW≥ 0.5µs

INPUT

10%

t_PW

t_D1

t_F

t_R

t_D1

t_F

t_D2

t_R

t_D2

V_S

V _S

90%

OUTPUT

10%

OUTPUT

10%

Figure 1a. Inverting Driver Switching Time

Figure 1b. Noninverting Driver Switching Time

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

Typical Characteristic Curves

Rise Time vs.

Supply Voltage

Fall Time vs.

Supply Voltage

Rise Time

vs. Capacitive Load

100

4700pF

1800pF

3300pF

1800pF

3300pF

2200pF

1000pF

12V

1000pF

2200pF

18V

470pF

10 12 14 16 18

V_SUPPLY(V)

10 12 14 16 18

V_SUPPLY(V)

100

1000

10000

C_LOAD(pF)

Rise and Fall Time

vs. Temperature

Fall Time vs.

Capacitive Load

Propagation Delay vs.

Input Amplitude

100

V_S= 18V

C_LOAD= 1800pF

V_S= 18V

C_LOAD= 1800pF

T_F

T_D2

T_D1

12V

T_R

18V

-75

-30

105 150

100

1000

10000

10 12

JUNCTION TEMPERATURE (˚C)

C_LOAD(pF)

INPUT (V)

Supply Current vs.

Capacitive Load

Supply Current

vs. Frequency

Supply Current vs.

Capacitive Load

100

V_SUPPLY= 12V

V_SUPPLY= 18V

10000pF

2MHz

500kHz

100kHz

500kHz

20kHz

1000pF

100pF

3300pF

20kHz

100kHz

100

1000

100

1000

C_LOAD(pF)

10000

100

1000

C_LOAD(pF)

10000

FREQUENCY (kHz)

Supply Current

vs. Frequency

Supply Current

vs. Frequency

Supply Current vs.

Capacitive Load

100

V_SUPPLY= 12V

V_SUPPLY= 5V

10000pF

4700pF

2200pF

1000pF

100pF

10000pF

2MHz

1000pF

100pF

3300pF

100kHz

1000

500kHz

100

FREQUENCY (kHz)

1000

100

10000

100

FREQUENCY (kHz)

1000

C_LOAD(pF)

July 2005

MIC4423/4424/4425

Micrel, Inc.

Quiescent Sypply Current

vs. Voltage

Delay Time vs.

Supply Voltage

Delay Time

vs. Temperature

T_J= 25˚C

C_LOAD= 2200pF

C_LOAD= 2200 pF

BOTH INPUTS=1

BOTH INPUTS =0

T_D2

T_D1

T_D2

T_D1

0.1

0.01

10 12 14 16 18

V_SUPPLY(V)

10 12 14 16 18

V_SUPPLY(V)

-55 -25

35 65 95 125

TEMPERATURE (˚C)

Output Resistance (Output

High) vs. Supply Voltage

Quiescent Current

vs. Temperature

Output Resistance (Output

Low) vs. Supply Voltage

1.4

1.2

1.0

0.8

0.6

0.4

0.2

V_S= 10V

125˚C

25˚C

INPUTS= 1

125˚C

25˚C

INPUTS= 0

-55 -25

35 65 95 125

10 12 14 16 18

V_SUPPLY(V)

10 12 14 16 18

V_SUPPLY(V)

TEMPERATURE (˚C)

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

requires attention to the ground path. Two things other than

the driver affect the rate at which it is possible to turn a load

off: The adequacy of the grounding available for the driver,

and the inductance of the leads from the driver to the load.

The latter will be discussed in a separate section.

Application Information

Although the MIC4423/24/25 drivers have been speciﬁcally

constructed to operate reliably under any practical circum-

stances, there are nonetheless details of usage which will

provide better operation of the device.

Best practice for a ground path is obviously a well laid out

ground plane. However, this is not always practical, and a

poorly-laidoutgroundplanecanbeworsethannone.Attention

to the paths taken by return currents even in a ground plane

is essential. In general, the leads from the driver to its load,

the driver to the power supply, and the driver to whatever is

driving it should all be as low in resistance and inductance

as possible. Of the three paths, the ground lead from the

driver to the logic driving it is most sensitive to resistance or

inductance, andgroundcurrentfromtheloadarewhatismost

likely to cause disruption. Thus, these ground paths should

be arranged so that they never share a land, or do so for as

short a distance as is practical.

Supply Bypassing

Charging and discharging large capacitive loads quickly

requires large currents. For example, charging 2000pF from

0 to 15 volts in 20ns requires a constant current of 1.5A. In

practice, the charging current is not constant, and will usually

peak at around 3A. In order to charge the capacitor, the driver

must be capable of drawing this much current, this quickly,

from the system power supply. In turn, this means that as far

as the driver is concerned, the system power supply, as seen

by the driver, must have a VERY low impedance.

As a practical matter, this means that the power supply bus

must be capacitively bypassed at the driver with at least

100X the load capacitance in order to achieve optimum

driving speed. It also implies that the bypassing capacitor

must have very low internal inductance and resistance at

all frequencies of interest. Generally, this means using two

capacitors, one a high-performance low ESR ﬁlm, the other

a low internal resistance ceramic, as together the valleys in

theirtwoimpedancecurvesallowadequateperformanceover

a broad enough band to get the job done. PLEASE NOTE

that many ﬁlm capacitors can be sufﬁciently inductive as to

beuselessforthisservice. Likewise, manymultilayerceramic

capacitors have unacceptably high internal resistance. Use

capacitors intended for high pulse current service (in-house

weuseWIMA™ﬁlmcapacitorsandAVXRamguard™ceram-

ics; several other manufacturers of equivalent devices also

exist). The high pulse current demands of capacitive drivers

also mean that the bypass capacitors must be mounted

very close to the driver in order to prevent the effects of lead

inductance or PCB land inductance from nullifying what you

are trying to accomplish. For optimum results the sum of the

lengths of the leads and the lands from the capacitor body to

the driver body should total 2.5cm or less.

To illustrate what can happen, consider the following: The

inductance of a 2cm long land, 1.59mm (0.062") wide on a

PCB with no ground plane is approximately 45nH. Assum-

ing a dl/dt of 0.3A/ns (which will allow a current of 3A to ﬂow

after 10ns, and is thus slightly slow for our purposes) a volt-

age of 13.5 Volts will develop along this land in response to

our postulated ∆Ι. For a 1cm land, (approximately 15nH) 4.5

Volts is developed. Either way, anyone using TTL-level input

signals to the driver will ﬁnd that the response of their driver

has been seriously degraded by a common ground path for

input to and output from the driver of the given dimensions.

Note that this is before accounting for any resistive drops in

the circuit. The resistive drop in a 1.59mm (0.062") land of

2oz. Copper carrying 3A will be about 4mV/cm (10mV/in) at

DC, and the resistance will increase with frequency as skin

effect comes into play.

The problem is most obvious in inverting drivers where the

input and output currents are in phase so that any attempt

to raise the driver’s input voltage (in order to turn the driver’s

load off) is countered by the voltage developed on the com-

mon ground path as the driver attempts to do what it was

supposed to. It takes very little common ground path, under

these circumstances, to alter circuit operation drastically.

Bypasscapacitance,anditsclosemountingtothedriverserves

two purposes. Not only does it allow optimum performance

from the driver, it minimizes the amount of lead length radiat-

ing at high frequency during switching, (due to the large Δ I)

thus minimizing the amount of EMI later available for system

disruption and subsequent cleanup. It should also be noted

that the actual frequency of the EMI produced by a driver is

not the clock frequency at which it is driven, but is related to

the highest rate of change of current produced during switch-

ing, a frequency generally one or two orders of magnitude

higher,andthusmoredifﬁculttoﬁlterifyouletitpermeateyour

system. Good bypassing practice is essential to proper

operation of high speed driver ICs.

Output Lead Inductance

The same descriptions just given for PCB land inductance

apply equally well for the output leads from a driver to its load,

except that commonly the load is located much further away

from the driver than the driver’s ground bus.

Generally, the best way to treat the output lead inductance

problem, when distances greater than 4cm (2") are involved,

requires treating the output leads as a transmission line. Un-

fortunately, asboththeoutputimpedanceofthedriverandthe

input impedance of the MOSFET gate are at least an order of

magnitude lower than the impedance of common coax, using

coax is seldom a cost-effective solution. A twisted pair works

about as well, is generally lower in cost, and allows use of a

wider variety of connectors. The second wire of the twisted

pair should carry common from as close as possible to the

Grounding

Both proper bypassing and proper grounding are necessary

for optimum driver operation. Bypassing capacitance only

allows a driver to turn the load ON. Eventually (except in rare

circumstances) it is also necessary to turn the load OFF. This

July 2005

MIC4423/4424/4425

Micrel, Inc.

ground pin of the driver directly to the ground terminal of the ible with TTLsignals, or with CMOS powered from any supply

load. Do not use a twisted pair where the second wire in the voltage between 3V and 15V.

pair is the output of the other driver, as this will not provide a

The MIC4423/24/25 drivers can also be driven directly by the

complete current path for either driver. Likewise, do not use

SG1524/25/26/27, TL494/95, TL594/95, NE5560/61/62/68,

a twisted triad with two outputs and a common return unless

TSC170, MIC38C42, and similar switch mode power supply

both of the loads to be driver are mounted extremely close

ICs. Byrelocatingthemainswitchdrivefunctionintothedriver

to each other, and you can guarantee that they will never be

rather than using the somewhat limited drive capabilities of a

switching at the same time.

PWM IC. The PWM IC runs cooler, which generally improves

Foroutputleadsonaprintedcircuit,thegeneralruleistomake its performance and longevity, and the main switches switch

them as short and as wide as possible. The lands should also faster, which reduces switching losses and increase system

be treated as transmission lines: i.e. minimize sharp bends, efﬁciency.

or narrowings in the land, as these will cause ringing. For a

The input protection circuitry of the MIC4423/24/25, in addi-

rough estimate, on a 1.59mm (0.062") thick G-10 PCB a pair

tion to providing 2kV or more of ESD protection, also works to

of opposing lands each 2.36mm (0.093") wide translates to a

preventlatchuporlogicupsetduetoringingorvoltagespiking

characteristicimpedanceofabout50Ω.Halfthatwidthsufﬁces

on the logic input terminal. In most CMOS devices when the

on a 0.787mm (0.031") thick board. For accurate impedance

logicinputrisesabovethepowersupplyterminal,ordescends

matching with a MIC4423/24/25 driver, on a 1.59mm (0.062")

below the ground terminal, the device can be destroyed or

board a land width of 42.75mm (1.683") would be required,

rendered inoperable until the power supply is cycled OFF

due to the low impedance of the driver and (usually) its load.

and ON. The MIC4423/24/25 drivers have been designed to

This is obviously impractical under most circumstances.

prevent this. Input voltages excursions as great as 5V below

Generally the tradeoff point between lands and wires comes

ground will not alter the operation of the device. Input excur-

whenlandsnarrowerthan3.18mm(0.125")wouldberequired

sions above the power supply voltage will result in the excess

on a 1.59mm (0.062") board.

voltage being conducted to the power supply terminal of the

To obtain minimum delay between the driver and the load, it IC. Because the excess voltage is simply conducted to the

is considered best to locate the driver as close as possible to power terminal, if the input to the driver is left in a high state

the load (using adequate bypassing). Using matching trans- when the power supply to the driver is turned off, currents as

formers at both ends of a piece of coax, or several matched high as 30mA can be conducted through the driver from the

lengths of coax between the driver and the load, works in input terminal to its power supply terminal. This may overload

theory, but is not optimum.

the output of whatever is driving the driver, and may cause

other devices that share the driver’s power supply, as well as

the driver, to operate when they are assumed to be off, but

it will not harm the driver itself. Excessive input voltage will

also slow the driver down, and result in much longer internal

propagation delays within the drivers. T_D2, for example, may

increase to several hundred nanoseconds. In general, while

the driver will accept this sort of misuse without damage,

proper termination of the line feeding the driver so that line

spiking and ringing are minimized, will always result in faster

and more reliable operation of the device, leave less EMI to

be ﬁltered elsewhere, be less stressful to other components

in the circuit, and leave less chance of unintended modes of

operation.

Driving at Controlled Rates

Occasionally there are situations where a controlled rise or

fall time (which may be considerably longer than the normal

rise or fall time of the driver’s output) is desired for a load. In

such cases it is still prudent to employ best possible practice

in terms of bypassing, grounding and PCB layout, and then

reduce the switching speed of the load (NOT the driver) by

adding a noninductive series resistor of appropriate value

between the output of the driver and the load. For situations

where only rise or only fall should be slowed, the resistor can

be paralleled with a fast diode so that switching in the other

direction remains fast. Due to the Schmitt-trigger action of the

driver’s input it is not possible to slow the rate of rise (or fall)

of the driver’s input signal to achieve slowing of the output.

Power Dissipation

CMOS circuits usually permit the user to ignore power dis-

sipation. Logic families such as 4000 series and 74Cxxx have

outputs which can only source or sink a few milliamps of cur-

rent, and even shorting the output of the device to ground or

V_CCmay not damage the device. CMOS drivers, on the other

hand, are intended to source or sink severalAmps of current.

This is necessary in order to drive large capacitive loads at

frequencies into the megahertz range. Package power dis-

sipation of driver ICs can easily be exceeded when driving

large loads at high frequencies. Care must therefore be paid

to device dissipation when operating in this domain.

Input Stage

The input stage of the MIC4423/24/25 consists of a single-

MOSFET class A stage with an input capacitance of ≤38pF.

This capacitance represents the maximum load from the

driver that will be seen by its controlling logic. The drain load

on the input MOSFET is a –2mA current source. Thus, the

quiescent current drawn by the driver varies, depending on

the logic state of the input.

Following the input stage is a buffer stage which provides

~400mV of hysteresis for the input, to prevent oscillations

when slowly-changing input signals are used or when noise

is present on the input. Input voltage switching threshold is

approximately 1.5V which makes the driver directly compat-

The Supply Current vs Frequency and Supply Current vs

Load characteristic curves furnished with this data sheet

aid in estimating power dissipation in the driver. Operating

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

frequency, power supply voltage, and load all affect power However, in this instance the R_Orequired may be either the on

dissipation.

resistance of the driver when its output is in the high state, or

its on resistance when the driver is in the low state, depending

on how the inductor is connected, and this is still only half the

story. For the part of the cycle when the inductor is forcing

current through the driver, dissipation is best described as

Given the power dissipation in the device, and the thermal

resistance of the package, junction operating temperature

for any ambient is easy to calculate. For example, the ther-

mal resistance of the 8-pin plastic DIP package, from the

datasheet, is 150°C/W. In a 25°C ambient, then, using a

maximum junction temperature of 150°C, this package will

dissipate 960mW.

P_L2= I V_D(1 – D)

where V_Dis the forward drop of the clamp diode in the driver

(generally around 0.7V). The two parts of the load dissipation

Accuratepowerdissipationnumberscanbeobtainedbysum- must be summed in to produce P_L

ming the three sources of power dissipation in the device:

P_L= P_L1+ P_L2

• Load power dissipation (P_L)

• Quiescent power dissipation (P_Q)

Quiescent Power Dissipation

Quiescent power dissipation (P_Q, as described in the input

• Transition power dissipation (P_T)

section) depends on whether the input is high or low. A low

input will result in a maximum current drain (per driver) of

≤0.2mA; a logic high will result in a current drain of ≤2.0mA.

Quiescent power can therefore be found from:

Calculation of load power dissipation differs depending on

whether the load is capacitive, resistive or inductive.

Resistive Load Power Dissipation

Dissipation caused by a resistive load can be calculated as:

P_Q= V_S[D I_H+ (1 – D) I_L]

where:

P_L= I²R_OD

where:

I_H= quiescent current with input high

I_L= quiescent current with input low

D = fraction of time input is high (duty cycle)

V_S= power supply voltage

I = the current drawn by the load

R_O= the output resistance of the driver when the

output is high, at the power supply voltage used

(See characteristic curves)

Transition Power Dissipation

D = fraction of time the load is conducting (duty cycle)

Transition power is dissipated in the driver each time its

output changes state, because during the transition, for a

very brief interval, both the N- and P-channel MOSFETs in

the output totem-pole are ON simultaneously, and a current

is conducted through them from V_Sto ground. The transition

power dissipation is approximately:

Capacitive Load Power Dissipation

Dissipation caused by a capacitive load is simply the energy

placed in, or removed from, the load capacitance by the

driver. The energy stored in a capacitor is described by the

equation:

P_T= f V_S(A•s)

E = 1/2 C V²

where (A•s) is a time-current factor derived from Figure 2.

Asthisenergyislostinthedrivereachtimetheloadischarged

or discharged, for power dissipation calculations the 1/2 is Total power (PD) then, as previously described is just

removed. This equation also shows that it is good practice

P_D= P_L+ P_Q+P_T

not to place more voltage in the capacitor than is necessary,

as dissipation increases as the square of the voltage applied

to the capacitor. For a driver with a capacitive load:

Examples show the relative magnitude for each term.

EXAMPLE 1: A MIC4423 operating on a 12V supply driving

two capacitive loads of 3000pF each, operating at 250kHz,

with a duty cycle of 50%, in a maximum ambient of 60°C.

P_L= f C (V_S)²

where:

First calculate load power loss:

f = Operating Frequency

C = Load Capacitance

V_S= Driver Supply Voltage

P_L= f x C x (V_S)²

P_L= 250,000 x (3 x 10^–9+ 3 x 10^–9) x 12²

= 0.2160W

Inductive Load Power Dissipation

Then transition power loss:

For inductive loads the situation is more complicated. For

the part of the cycle in which the driver is actively forcing

current into the inductor, the situation is the same as it is in

the resistive case:

P_T= f x V_Sx (A•s)

= 250,000 • 12 • 2.2 x 10^–9= 6.6mW

P_L1= I²R_OD

July 2005

MIC4423/4424/4425

Micrel, Inc.

Then quiescent power loss:

then:

P_Q= V_Sx [D x I_H+ (1 – D) x I_L]

P_D= 0.174 + 0.025 + 0.0150

= 0.213W

= 12 x [(0.5 x 0.0035) + (0.5 x 0.0003)]

= 0.0228W

In a ceramic package with an θ_JAof 100°C/W, this amount of

power results in a junction temperature given the maximum

40°C ambient of:

Total power dissipation, then, is:

P_D= 0.2160 + 0.0066 + 0.0228

= 0.2454W

(0.213 x 100) + 40 = 61.4°C

Assuming an SOIC package, with an θ_JAof 120°C/W, this will The actual junction temperature will be lower than calculated

result in the junction running at:

both because duty cycle is less than 100% and because the

graph lists R_DS(on)at a T_Jof 125°C and the R_DS(on)at 61°C T_J

will be somewhat lower.

0.2454 x 120 = 29.4°C

above ambient, which, given a maximum ambient tempera-

ture of 60°C, will result in a maximum junction temperature

of 89.4°C.

Deﬁnitions

C_L= Load Capacitance in Farads.

D = Duty Cycle expressed as the fraction of time the input

to the driver is high.

EXAMPLE 2: A MIC4424 operating on a 15V input, with one

driver driving a 50Ω resistive load at 1MHz, with a duty cycle

of 67%, and the other driver quiescent, in a maximum ambi-

ent temperature of 40°C:

f = Operating Frequency of the driver in Hertz

I_H= Power supply current drawn by a driver when both

inputs are high and neither output is loaded.

P_L= I²x R_Ox D

First, I_Omust be determined.

I_L= Power supply current drawn by a driver when both

inputs are low and neither output is loaded.

I_O= V_S/ (R_O+ R_LOAD

)

I_D= Output current from a driver in Amps.

Given R_Ofrom the characteristic curves then,

P_D= Total power dissipated in a driver in Watts.

I_O= 15 / (3.3 + 50)

P_L= Power dissipated in the driver due to the driver’s

load in Watts.

P_Q= Power dissipated in a quiescent driver in Watts.

I_O= 0.281A

and:

P_L= (0.281)²x 3.3 x 0.67

= 0.174W

P_T= F x V_Sx (A•s)/2

P_T= Power dissipated in a driver when the output

changes states (“shoot-through current”) in Watts.

NOTE: The “shoot-through” current from a dual

transition (once up, once down) for both drivers is

stated in the graph on the following page in ampere-

nanoseconds. This ﬁgure must be multiplied by the

number of repetitions per second (frequency to ﬁnd

Watts).

(because only one side is operating)

= (1,000,000 x 15 x 3.3 x 10^–9) / 2

= 0.025 W

and:

R_O= Output resistance of a driver in Ohms.

V_S= Power supply voltage to the IC in Volts.

P_Q= 15 x [(0.67 x 0.00125) + (0.33 x 0.000125) +

(1 x 0.000125)]

(this assumes that the unused side of the driver has its input

grounded, which is more efﬁcient)

= 0.015W

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

Crossover

Energy Loss

10^-8

10^-9

10^-10

0 2 4 6 8 10 12 14 16 18

V_IN

NOTE: THE VALUES ON THIS GRAPH REPRESENT THE LOSS SEEN BY BOTH

DRIVERS IN A PACKAGE DURING ONE COMPLETE CYCLE. FOR A SINGLE

DRIVER DIVIDE THE STATED VALUES BY 2. FOR A SINGLE TRANSITION OF A

SINGLE DRIVER, DIVIDE THE STATED VALUE BY 4.

Figure 2.

1250

1000

SOIC

750

PDIP

500

250

100 125 150

AMBIENT TEMPERATURE (°C)

July 2005

MIC4423/4424/4425

Micrel, Inc.

Package Information

PIN 1

DIMENSIONS:

INCH (MM)

0.380 (9.65)

0.370 (9.40)

0.255 (6.48)

0.245 (6.22)

0.135 (3.43)

0.125 (3.18)

0.300 (7.62)

0.013 (0.330)

0.010 (0.254)

0.380 (9.65)

0.320 (8.13)

0.018 (0.57)

0.100 (2.54)

0.130 (3.30)

0.0375 (0.952)

8-Pin Plastic DIP (N)

8-Pin SOIC (M)

MIC4423/4424/4425

July 2005

MIC4423/4424/4425

Micrel, Inc.

PIN 1

DIMENSIONS:

INCHES (MM)

0.301 (7.645)

0.297 (7.544)

0.027 (0.686)

0.031 (0.787)

0.297 (7.544)

0.293 (7.442)

0.103 (2.616)

0.099 (2.515)

0.050 (1.270) 0.016 (0.046)

TYP TYP

0.022 (0.559)

0.018 (0.457)

TYP

0.015

(0.381)

TYP

0.330 (8.382)

0.326 (8.280)

0.015

(0.381)

MIN

0.409 (10.389)

0.405 (10.287)

10 TYP

0.094 (2.388)

0.090 (2.286)

SEATING

PLANE

0.032 (0.813) TYP

0.408 (10.363)

0.404 (10.262)

16-Pin Wide SOIC (WM)

MICREL INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com

This information furnished by Micrel in this data sheet is believed to be accurate and reliable. However no responsibility is assumed by Micrel for its use.

Micrel reserves the right to change circuitry and speciﬁcations at any time without notiﬁcation to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into

the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a signiﬁcant injury to the user. A Purchaser’s

use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify

Micrel for any damages resulting from such use or sale.

July 2005

MIC4423/4424/4425

MIC4425CN [MIC]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E