LP2951CD-5.0 [MOTOROLA]
FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.45V DROPOUT, PDSO8, PLASTIC, SO-8;型号: | LP2951CD-5.0 |
厂家: | MOTOROLA |
描述: | FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.45V DROPOUT, PDSO8, PLASTIC, SO-8 光电二极管 输出元件 调节器 |
文件: | 总16页 (文件大小:251K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Order this document by LP2950/D
MICROPOWER
LOW DROPOUT
VOLTAGE REGULATORS
The LP2950 and LP2951 are micropower voltage regulators that are
specifically designed to maintain proper regulation with an extremely low
input–to–output voltage differential. These devices feature a very low
quiescent bias current of 75 µA and are capable of supplying output currents
in excess of 100 mA. Internal current and thermal limiting protection is
provided.
Z SUFFIX
PLASTIC PACKAGE
CASE 29
The LP2951 has three additional features. The first is the Error Output
that can be used to signal external circuitry of an out of regulation condition,
or as a microprocessor power–on reset. The second feature allows the
output voltage to be preset to 5.0 V, 3.3 V or 3.0 V output (depending on the
version) or programmed from 1.25 V to 29 V. It consists of a pinned out
resistor divider along with direct access to the Error Amplifier feedback input.
The third feature is a Shutdown input that allows a logic level signal to
turn–off or turn–on the regulator output.
(TO–226AA/TO–92)
Pin: 1. Output
1
2
2. Ground
3
3. Input
DT SUFFIX
Due to the low input–to–output voltage differential and bias current
specifications, these devices are ideally suited for battery powered
computer, consumer, and industrial equipment where an extension of
useful battery life is desirable. The LP2950 is available in the three pin case
29 and DPAK packages, and the LP2951 is available in the eight pin
dual–in–line, SO–8 and Micro–8 surface mount packages. The ‘A’ suffix
devices feature an initial output voltage tolerance ±0.5%.
PLASTIC PACKAGE
1
CASE 369A
(DPAK)
3
Pin: 1. Input
2. Ground
1
2
3
3. Output
LP2950 and LP2951 Features:
(Top View)
• Low Quiescent Bias Current of 75 µA
• Low Input–to–Output Voltage Differential of 50 mV at 100 µA and
Heatsink surface (shown as terminal 4 in
case outline drawing) is connected to Pin 2.
380 mV at 100 mA
• 5.0 V, 3.3 V or 3.0 V ±0.5% Allows Use as a Regulator or Reference
• Extremely Tight Line and Load Regulation
D SUFFIX
PLASTIC PACKAGE
8
CASE 751
(SO–8)
• Requires Only a 1.0 µF Output Capacitor for Stability
• Internal Current and Thermal Limiting
1
LP2951 Additional Features:
N SUFFIX
PLASTIC PACKAGE
• Error Output Signals an Out of Regulation Condition
• Output Programmable from 1.25 V to 29 V
• Logic Level Shutdown Input
CASE 626
8
1
DM SUFFIX
8
PLASTIC PACKAGE
CASE 846A
1
(Micro–8)
1
2
3
4
8
7
6
5
Output
Input
Sense
Shutdown
Gnd
Feedback
V
Tap
O
Error Output
(See Following Page for Ordering Information.)
(Top View)
Motorola, Inc. 1996
Rev 4
LP2950 LP2951
ORDERING INFORMATION
Operating
Temperature Range
Device
Type
Package
LP2950CZ–**
LP2950ACZ–**
TO–92/TO–226AA
Fixed Voltage
(3.0, 3.3 or 5.0 V)
LP2950CDT–**
LP2950ACDT–**
DPAK
SO–8
LP2951CD
LP2951ACD
Adjustable or
5.0 V Fixed
LP2951CD–**
LP2951ACD–**
Adjustable or Fixed
(3.0, 3.3 V)
T = –40° to +125°C
J
LP2951CN
LP2951ACN
Adjustable or
5.0 V Fixed
Plastic
LP2951CN–**
LP2951ACN–**
Adjustable or Fixed
(3.0, 3.3 V)
LP2951CDM
LP2951ACDM
Adjustable or
5.0 V Fixed
Micro–8
LP2951CDM–**
LP2951ACDM–**
Adjustable or Fixed
(3.0, 3.3 V)
** = Voltage option of 3.0, 3.3 or 5.0 V.
DEVICE TYPE/NOMINAL OUTPUT VOLTAGE
Device No. (±1%)
Device No. (±0.5%)
Nominal Voltage
LP2950CX–5.0
LP2950CX–3.3
LP2950CX–3.0
LP2951CX
LP2950CX–3.3
LP2951CX–3.0
LP2950ACX–5.0
LP2950ACX–3.3
LP2950ACX–3.0
LP2951ACX
LP2951ACX–3.3
LP2951ACX–3.0
5.0
3.3
3.0
Adjustable or 5.0
Adjustable or 3.3
Adjustable or 3.0
X = Package suffix.
Representative Block Diagrams
Input
3
Output
5.0 V/100 mA
1
1.0 µF
Battery or
Unregulated DC
182 k
60 k
Error Amplifier
1.23 V
Reference
LP2950CZ–5.0
Gnd
2
5.0 V/100 mA
Input
8
Output
Sense
182 k
2
1
Battery or
Unregulated DC
1.0
µ
F
V
6
Tap
O
60 k
330 k
7
Feedback
Error
Amplifier
Shutdown
From
3
60 k
50 k
75 mV/
60 mV
CMOS/TTL
Error
Output
To CMOS/TTL
5
Error Detection
Comparator
1.23 V
Reference
LP2951CD or CN
Gnd
4
This device contains 34 active transistors.
2
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
MAXIMUM RATINGS (T = 25°C, unless otherwise noted.)
A
Rating
Symbol
Value
Unit
Input Voltage
V
CC
30
Vdc
Power Dissipation and Thermal Characteristics
Maximum Power Dissipation
P
Internally Limited
W
D
Case 751(SO–8) D Suffix
Thermal Resistance, Junction–to–Ambient
Thermal Resistance, Junction–to–Case
Case 369A (DPAK) DT Suffix [Note 1]
Thermal Resistance, Junction–to–Ambient
Thermal Resistance, Junction–to–Case
Case 29 (TO–226AA/TO–92) Z Suffix
Thermal Resistance, Junction–to–Ambient
Thermal Resistance, Junction–to–Case
Case 626 N Suffix
R
R
180
45
°C/W
°C/W
θJA
θJC
R
θJA
R
θJC
92
6.0
°C/W
°C/W
R
θJA
R
θJC
160
83
°C/W
°C/W
Thermal Resistance, Junction–to–Ambient
Case 846A (Micro–8) DM Suffix
R
105
°C/W
θJA
Thermal Resistance, Junction–to–Ambient
R
240
°C/W
θJA
Feedback Input Voltage
V
fb
–1.5 to +30
Vdc
Shutdown Input Voltage
V
–0.3 to +30
–0.3 to +30
–40 to +125
–65 to +150
Vdc
Vdc
°C
sd
Error Comparator Output Voltage
Operating Junction Temperature
Storage Temperature Range
V
err
T
J
T
stg
°C
NOTE: 1. The Junction–to–Ambient Thermal Resistance is determined by PC board copper area
per Figure 26.
2. ESD data available upon request.
ELECTRICAL CHARACTERISTICS (V = V + 1.0 V, I = 100 µA, C = 1.0 µF, T = 25°C [Note 1], unless otherwise
in
O
O
O
J
noted.)
Characteristic
Output Voltage, 5.0 V Versions
= 6.0 V, I = 100 µA, T = 25°C
Symbol
Min
Typ
Max
Unit
V
O
V
O
V
O
V
V
in
O
J
LP2950C–5.0/LP2951C
LP2950AC–5.0/LP2951AC
4.950
4.975
5.000
5.000
5.050
5.025
T = –40 to +125°C
J
LP2950C–5.0/LP2951C
4.900
4.940
–
–
5.100
5.060
LP2950AC–5.0/LP2951AC
V
in
= 6.0 to 30 V, I = 100 µA to 100 mA, T = –40 to +125°C
O J
LP2950C–5.0/LP2951C
LP2950AC–5.0/LP2951AC
4.880
4.925
–
–
5.120
5.075
Output Voltage, 3.3 V Versions
= 4.3 V, I = 100 µA, T = 25°C
V
V
in
O
J
LP2950C–3.3/LP2951C–3.3
LP2950AC–3.3/LP2951AC–3.3
3.267
3.284
3.300
3.300
3.333
3.317
T = –40 to +125°C
J
LP2950C–3.3/LP2951C–3.3
3.234
3.260
–
–
3.366
3.340
LP2950AC–3.3/LP2951AC–3.3
V
in
= 4.3 to 30 V, I = 100 µA to 100 mA, T = –40 to +125°C
O J
LP2950C–3.3/LP2951C–3.3
LP2950AC–3.3/LP2951AC–3.3
3.221
3.254
–
–
3.379
3.346
Output Voltage, 3.0 V Versions
= 4.0 V, I = 100 µA, T = 25°C
V
V
in
O
J
LP2950C–3.0/LP2951C–3.0
LP2950AC–3.0/LP2951AC–3.0
2.970
2.985
3.000
3.000
3.030
3.015
T = –40 to +125°C
J
LP2950C–3.0/LP2951C–3.0
LP2950AC–3.0/LP2951AC–3.0
2.940
2.964
–
–
3.060
3.036
V
in
= 4.0 to 30 V, I = 100 µA to 100 mA, T = –40 to +125°C
O J
LP2950C–3.0/LP2951C–3.0
LP2950AC–3.0/LP2951AC–3.0
2.928
2.958
–
–
3.072
3.042
3
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
ELECTRICAL CHARACTERISTICS (continued) (V = V + 1.0 V, I = 100 µA, C = 1.0 µF, T = 25°C [Note 1], unless otherwise
in
O
O
O
J
noted.)
Characteristic
+1.0 V to 30 V) [Note 2]
Symbol
Min
Typ
Max
Unit
Line Regulation (V = V
in
Reg
%
O(nom)
line
LP2950C–XX/LP2951C/LP2951C–XX
LP2950AC–XX/LP2951AC/LP2951AC–XX
–
–
0.08
0.04
0.20
0.10
Load Regulation (I = 100 µA to 100 mA)
Reg
%
O
load
LP2950C–XX/LP2951C/LP2951C–XX
LP2950AC–XX/LP2951AC/LP2951AC–XX
–
–
0.13
0.05
0.20
0.10
Dropout Voltage
V – V
I
mV
O
I
O
I
O
= 100 µA
= 100 mA
–
–
30
350
80
450
Supply Bias Current
I
CC
I
O
I
O
= 100 µA
= 100 mA
–
–
93
4.0
120
12
µA
mA
Dropout Supply Bias Current (V = V
in
O
– 0.5 V,
I
–
110
170
µA
O(nom)
CCdropout
I
= 100 µA) [Note 2]
Current Limit (V Shorted to Ground)
O
I
–
–
220
300
mA
%/W
Limit
Reg
Thermal Regulation
0.05
0.20
thermal
Output Noise Voltage (10 Hz to 100 kHz) [Note 3]
V
n
µVrms
C
C
= 1.0 µF
= 100 µF
–
–
126
56
–
–
L
L
LP2951A/LP2951AC ONLY
Reference Voltage (T = 25°C)
LP2951C/LP2951C–XX
LP2951AC/LP2951AC–XX
V
V
V
V
J
ref
1.210
1.220
1.235
1.235
1.260
1.250
Reference Voltage (T = –40 to +125°C)
V
ref
J
LP2951C/LP2951C–XX
LP2951AC/LP2951AC–XX
1.200
1.200
–
–
1.270
1.260
Reference Voltage (T = –40 to +125°C)
V
ref
J
I
O
= 100 µA to 100 mA, V = 23 to 30 V
in
LP2951C/LP2951C–XX
LP2951AC/LP2951AC–XX
1.185
1.190
–
–
1.285
1.270
Feedback Pin Bias Current
ERROR COMPARATOR
Output Leakage Current (V
I
–
15
40
nA
FB
= 30 V)
I
–
–
0.01
150
45
1.0
250
–
µA
mV
mV
mV
mV
OH
lkg
Output Low Voltage (V = 4.5 V, I
in
= 400 µA)
V
V
OL
OL
Upper Threshold Voltage (V = 6.0 V)
in
40
–
thu
Lower Threshold Voltage (V = 6.0 V)
in
V
60
95
–
thl
hy
Hysteresis (V = 6.0 V)
in
V
–
15
SHUTDOWN INPUT
Input Logic Voltage
V
shtdn
V
Logic “0” (Regulator “On”)
Logic “1” (Regulator “Off”)
0
2.0
–
–
0.7
30
Shutdown Pin Input Current
I
µA
µA
shtdn
V
shtdn
V
shtdn
= 2.4 V
= 30 V
–
–
35
450
50
600
Regulator Output Current in Shutdown Mode
(V = 30 V, V = 2.0 V, V = 0, Pin 6 Connected to Pin 7)
I
off
–
3.0
10
in
shtdn
O
NOTES: 1. Low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
2. V is the part number voltage option.
O(nom)
3. Noise tests on the LP2951 are made with a 0.01 µF capacitor connected across Pins 7 and 1.
4
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
DEFINITIONS
Dropout Voltage – The input/output voltage differential at
Output Noise Voltage – The rms ac voltage at the output,
with constant load and no input ripple, measured over a
specified frequency range.
Leakage Current – Current drawn through a bipolar
transistor collector–base junction, under a specified collector
voltage, when the transistor is “off”.
Upper Threshold Voltage – Voltage applied to the
comparator input terminal, below the reference voltage
which is applied to the other comparator input terminal,
which causes the comparator output to change state from a
logic “0” to “1”.
Lower Threshold Voltage – Voltage applied to the
comparator input terminal, below the reference voltage
which is applied to the other comparator input terminal,
which causes the comparator output to change state from a
logic “1” to “0”.
which the regulator output no longer maintains regulation
against further reductions in input voltage. Measured when
the output drops 100 mV below its nominal value (which is
measured at 1.0 V differential), dropout voltage is affected by
junction temperature, load current and minimum input supply
requirements.
Line Regulation – The change in output voltage for a
change in input voltage. The measurement is made under
conditions of low dissipation or by using pulse techniques
such that average chip temperature is not significantly
affected.
Load Regulation – The change in output voltage for a
change in load current at constant chip temperature.
Maximum Power Dissipation – The maximum total
device dissipation for which the regulator will operate within
specifications.
Hysteresis – The difference between Lower Threshold
voltage and Upper Threshold voltage.
Bias Current – Current which is used to operate the
regulator chip and is not delivered to the load.
Figure 1. Quiescent Current
Figure 2. Dropout Characteristics
10
6.0
LP2951C
5.0
4.0
3.0
2.0
T
= 25°C
A
R
= 50 k
L
L
1.0
0.1
R
= 50
Ω
1.0
0
0.01
0.1
1.0
10
100
0
1.0
2.0
3.0
4.0
5.0
6.0
I , LOAD CURRENT (mA)
L
V
, INPUT VOLTAGE (V)
in
Figure 3. Input Current
Figure 4. Output Voltage versus Temperature
250
5.00
200
150
100
50
4.99
4.98
4.97
4.96
4.95
0.1 mA Load Current
No Load
LP2951C
0
0
5.0
10
15
20
25
– 50
0
50
100
150
V
, INPUT VOLTAGE (V)
T , AMBIENT TEMPERATURE (°C)
in
A
5
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
Figure 5. Dropout Voltage versus
Output Current
Figure 6. Dropout Voltage versus Temperature
400
350
550
500
55
50
T
= 25°C
A
300
250
200
150
100
450
400
350
300
45
40
35
30
R
= 50
L
R
= 50 k
50
0
L
0.1
1.0
10
100
– 50
0
50
T, TEMPERATURE (°C)
100
150
I
, OUTPUT CURRENT (mA)
O
Figure 7. Error Comparator Output
Figure 8. Line Transient Response
5.0
4.0
8.0
7.5
7.0
6.5
6.0
5.5
V
in
LP2951C
= 330 k
R
L
4.0
3.0
2.0
1.0
0
2.0
T
= 25°C
A
V
Decreasing
in
0
V
out
V
Increasing
in
– 2.0
– 4.0
– 6.0
T
= 25°C
= 1.0 µF
= 1.0 mA
= 5.0 V
A
C
L
I
L
V
O
4.70
4.74
4.78
4.82
4.86
4.90
0
100
200
300
400
500
600
700
800
V
, INPUT VOLTAGE (V)
t, TIME (µs)
in
Figure 9. LP2951 Enable Transient
Figure 10. Load Transient Response
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
200
150
100
50
C
= 1.0 µF
C
= 1.0 µF
= 5.0 V
L
L
400
200
0
V
out
= 25°C
T
A
V
out
C
= 10 µF
L
T
= 25°C
= 10 mA
= 8.0 V
A
I
V
V
L
in
– 200
– 400
I
Load
= 5.0 V
out
0
Shutdown Input
200
–1.0
– 50
–100
0
100
300
400
0
50
100
150
200
t, TIME (ms)
250
300
350
400
t, TIME (µs)
6
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
Figure 11. Ripple Rejection
Figure 12. Output Noise
80
60
40
4.0
3.0
I = 100 mA
L
T
= 25°C
= 5.0 V
A
C
= 1.0 µF
V
L
O
LP2951C
I = 0.1 mA
L
2.0
1.0
0
T
= 25°C
= 1.0 µF
= 6.0 V
A
C
= 100 µF
20
0
L
C
V
L
in
V
= 5.0 V
out
1.0
1.0 k
f, FREQUENCY (Hz)
100
1.0 k
f, FREQUENCY (Hz)
10
100
10 k
100 k
10 k
100 k
Figure 13. Shutdown Threshold Voltage
versus Temperature
Figure 14. Maximum Rated
Output Current
1.8
1.6
100
4.0
T
= 25°C
A
80
60
40
20
0
2.0
T
= 75°C
A
0
1.4
1.2
Output “Off”
Output “On”
– 2.0
– 4.0
– 6.0
1.0
0.8
LP2951CN
5.0
– 40 – 20
0
20
40
60
80
100 120 140 160
0
10
15
V , INPUT VOLTAGE (V)
in
20
25
30
35
40
t, TEMPERATURE (
°C)
7
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
APPLICATIONS INFORMATION
Introduction
The LP2950/LP2951 regulators are designed with
internal current limiting and thermal shutdown making them
user–friendly. Typical application circuits for the LP2950 and
LP2951 are shown in Figures 17 through 25.
These regulators are not internally compensated and thus
require a 1.0 µF (or greater) capacitance between the
LP2950/LP2951 output terminal and ground for stability.
Most types of aluminum, tantalum or multilayer ceramic will
perform adequately. Solid tantalums or appropriate
multilayer ceramic capacitors are recommended for
operation below 25°C.
When operated in the shutdown mode, the error
comparator output will go high if it has been pulled up to an
external supply. To avoid this invalid response, the error
comparator output should be pulled up to V
Figure 15).
(see
out
Figure 15. ERROR Output Timing
5.0 V
4.70 V
4.75 V
Output
Voltage
At lower values of output current, less output capacitance
is required for output stability. The capacitor can be reduced
to 0.33 µF for currents less than 10 mA, or 0.1 µF for currents
below 1.0 mA. Using the 8–pin versions at voltages less than
5.0 V operates the error amplifier at lower values of gain, so
that more output capacitance is needed for stability. For the
worst case operating condition of a 100 mA load at 1.23 V
output (Output Pin 1 connected to the feedback Pin 7) a
minimum capacitance of 3.3 µF is recommended.
Pull–Up
to Ext
Not
Valid
Not
Valid
ERROR
Pull–Up
to V
out
4.75 V + V
dropout
4.70 V + V
dropout
The LP2950 will remain stable and in regulation when
operated with no output load. When setting the output voltage
of the LP2951 with external resistors, the resistance values
should be chosen to draw a minimum of 1.0 µA.
A bypass capacitor is recommended across the
LP2950/LP2951 input to ground if more than 4 inches of
wire connects the input to either a battery or power supply
filter capacitor.
Input capacitance at the LP2951 Feedback Pin 7 can
create a pole, causing instability if high value external
resistors are used to set the output voltage. Adding a 100 pF
capacitor between the Output Pin 1 and the Feedback Pin 7
and increasing the output filter capacitor to at least 3.3 µF will
stabilize the feedback loop.
Input
Voltage
1.3 V
1.3 V
Programming the Output Voltage (LP2951)
The LP2951CX may be pin–strapped for 5.0 V using its
internal voltage divider by tying Pin 1 (output) to Pin 2 (sense)
and Pin 7 (feedback) to Pin 6 (5.0 V tap). Alternatively, it may
be programmed for any output voltage between its 1.235
reference voltage and its 30 V maximum rating. An external
pair of resistors is required, as shown in Figure 16.
Figure 16. Adjustable Regulator
V
in
Error Detection Comparator
The comparator switches to a positive logic low whenever
the LP2951 output voltage falls more than approximately
5.0% out of regulation. This value is the comparator’s
designed–in offset voltage of 60 mV divided by the 1.235 V
internal reference. As shown in the representative block
diagram. This trip level remains 5.0% below normal
regardless of the value of regulated output voltage. For
example, the error flag trip level is 4.75 V for a normal 5.0 V
regulated output, or 9.50 V for a 10 V output voltage.
Figure 1 is a timing diagram which shows the ERROR
signal and the regulated output voltage as the input voltage to
the LP2951 is ramped up and down. The ERROR signal
becomes valid (low) at about 1.3 V input. It goes high when
100 k
5
8
V
in
1
Error
Output
V
out
Error
V
out
1.23 to 30 V
2
NC
NC
SNS
R1
Shutdown
Input
3
6
0.01 µF
SD
Gnd
V
T
O
3.3 µF
FB
4
7
R
2
the input reaches about 5.0 V (V
exceeds about 4.75 V).
out
Since the LP2951’s dropout voltage is dependent upon the
load current (refer to the curve in the Typical Performance
Characteristics), the input voltage trip point will vary with load
current. The output voltage trip point does not vary with load.
The error comparator output is an open collector which
requires an external pull–up resistor. This resistor may be
returned to the output or some other voltage within the
system. The resistance value should be chosen to be
consistent with the 400 µA sink capability of the error
comparator. A value between 100 k and 1.0 MΩ is suggested.
No pull–up resistance is required if this output is unused.
The complete equation for the output voltage is:
(
)
V
1
R1 R2
I
R1
out
ref
FB
where V is the nominal 1.235 V reference voltage and I
ref FB
is the feedback pin bias current, nominally –20 nA. The
minimum recommended load current of 1.0 µA forces an
upper limit of 1.2 MΩ on the value of R2, if the regulator must
work with no load. I
which may be eliminated at room temperature by adjusting
R1. For better accuracy, choosing R2 = 100 k reduces this
will produce a 2% typical error in V
FB
out
8
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
error to 0.17% while increasing the resistor program current
to 12 µA. Since the LP2951 typically draws 75 µA at no load
with Pin 2 open circuited, the extra 12 µA of current drawn is
often a worthwhile tradeoff for eliminating the need to set
output voltage in test.
Figure 17. 1.0 A Regulator with 1.2 V Dropout
Unregulated
Input
MTB23P06E
1.0 µF
10 k
0.01 µF
Output Noise
In many applications it is desirable to reduce the noise
present at the output. Reducing the regulator bandwidth by
increasing the size of the output capacitor is the only method
for reducing noise on the 3 lead LP2950. However,
increasing the capacitor from 1.0 µF to 220 µF only
decreases the noise from 430 µV to 160 µVrms for a 100 kHz
bandwidth at the 5.0 V output.
Noise can be reduced fourfold by a bypass capacitor
across R1, since it reduces the high frequency gain from 4 to
unity. Pick
V
out
5.0 V
0 to 1.0 A
±
1.0%
8
V
in
1
2
5
3
Error
Output
V
Error
out
SNS
LP2951CN
6
Shutdown
Input
SD
V
T
O
220 µF
Gnd
4
FB
7
1
C
Bypass
0.002
1.0 M
µF
2 R1 x 200 Hz
or about 0.01 µF. When doing this, the output capacitor
must be increased to 3.3 µF to maintain stability. These
changes reduce the output noise from 430 µV to 126 µVrms
for a 100 kHz bandwidth at 5.0 V output. With bypass
capacitor added, noise no longer scales with output voltage
so that improvements are more dramatic at higher output
voltages.
2.0 k
9
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
TYPICAL APPLICATIONS
Figure 18. Lithium Ion Battery Cell Charger
Figure 19. Low Drift Current Sink
+V = 2.0 to 30 V
Unregulated Input
6.0 to 10 Vdc
I
L
I
= 1.23/R
Load
L
8
V
1N4001
330 pF
4.2 V ± 0.025 V
in
1
2
5
Error
V
NC
out
8
0.1 µF
2.0 M
1.0%
NC
NC
SNS
V
in
1
Error
Output
5
3
LP2951CN
V
0.1 µF
Error
out
3
6
SD
V
T
O
2
6
SNS
806 k
1.0%
Lithium Ion
Rechargeable
Cell
Gnd
4
FB
2.2
µF
LP2951CN
Shutdown
Input
7
SD
V
T
O
50 k
Gnd
4
FB
7
Gnd
1.0 µF
R
Figure 20. Latch Off When Error Flag Occurs
Figure 21. 5.0 V Regulator with 2.5 V Sleep Function
+V
in
+V
in
CMOS
Gate
*Sleep
Input
8
470 k
470 k
V
8
in
47 k
Error
1
2
5
3
V
V
out
Error
out
V
2N3906
V
2N3906
out
in
1
2
470 k
5
V
out
Error
Output
NC
NC
SNS
LP2951CN
Reset
NC
NC
SNS
200 k
100 k
6
LP2951CN
R1
R2
SD
V
T
O
Shutdown
Input
3
6
3.3 µF
Normally
Closed
SD
V
T
O
Gnd
4
FB
1.0 µF
100 pF
7
Gnd
4
FB
7
100 k
Error flag occurs when V is too low to
in
maintain V , or if V
out out
excessive load current.
is reduced by
10
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
Figure 22. Regulator with Early Warning and Auxiliary Output
+V
in
8
V
D2
in
1
2
Memory
V+
5
3
V
Error
out
D1
1.0 µF
20
3.6 V
NiCad
SNS
LP2951CN
#1
6
NC
SD
V
T
O
Gnd
4
FB
7
Early Warning
Reset
27 k
All diodes are 1N4148.
D3
Early Warning flag on low input voltage.
µP
2.7 M
Main output latches off at lower input
voltages.
D4
V
DD
Q1
2N3906
8
Battery backup on auxiliary output.
330 k
V
in
1
2
5
3
Operation: Regulator #1’s V
programmed one diode drop above 5.0 V.
is
out
V
Error
out
Main
Output
Its error flag becomes active when V < 5.7
V. When V drops below 5.3 V, the error
in
flag of regulator #2 becomes active and via
in
SNS
LP2951CN
#2
1.0 µF
Q1 latches the main output “off”. When V
6
in
SD
V
T
O
again exceeds 5.7 V, regulator #1 is back in
regulation and the early warning signal
rises, unlatching regulator #2 via D3.
Gnd
4
FB
7
Figure 23. 2.0 A Low Dropout Regulator
+V
in
Current Limit
Section
0.05
470
680
2N3906
1000 µF
2N3906
MJE2955
.33 µF
10 k
4.7 M
8
V
in
1
2
Error
Flag
5
3
V
Error
out
V
@ 2.0 A
NC
NC
47
SNS
out
LP2951CN
220
6
4.7
Tant
µF
SD
V
T
O
100 µF
R1
Gnd
4
FB
20 k
.01 µF
7
R2
0.033 µF
V
= 1.25V (1.0 + R1/R2)
out
For 5.0 V output, use internal resistors. Wire Pin 6 to 7,
and wire Pin 2 to +V Bus.
out
11
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
Figure 24. Open Circuit Detector for
4.0 to 20 mA Current Loop
+5.0 V
4.7 k
Output*
1
2
5
4
20 mA
NC
8
V
in
1
4
5
3
V
Error
out
2
NC
NC
SNS
LP2951CN
* High for
< 3.5 mA
6
I
L
NC
SD
V
T
O
0.1 µF
1N4001
Gnd
4
FB
7
1N457
1N457
1N457
360
Figure 25. Low Battery Disconnect
31.6 k
6.0 V Lead–Acid
Battery
100 k
2N3906
NC
8
V
in
1
2
5
3
V
Main V+
Error
out
1
MC34164P–5
2
SNS
Memory V+
3
LP2951CN
1.0 µF
6
20
SD
V
T
NC
O
NiCad Backup
Battery
Gnd
4
FB
7
NC
Figure 26. DPAK Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
100
90
80
70
60
50
40
2.4
P
for T = 50
A
°
C
D(max)
Free Air
Mounted
Vertically
2.0
1.6
1.2
0.8
0.4
0
2.0 oz. Copper
L
Minimum
Size Pad
L
R
θ
JA
0
5.0
10
15
20
25
30
L, LENGTH OF COPPER (mm)
12
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
OUTLINE DIMENSIONS
Z SUFFIX
PLASTIC PACKAGE
CASE 29–04
(TO–226AA/TO–92)
ISSUE AD
NOTES:
A
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
B
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
R
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
P
L
F
SEATING
PLANE
K
INCHES
MIN
MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
N
P
MAX
0.205
0.210
0.165
0.022
0.019
0.055
0.105
0.020
–––
MIN
4.45
4.32
3.18
0.41
0.41
1.15
2.42
0.39
12.70
6.35
2.04
–––
MAX
5.20
5.33
4.19
0.55
0.48
1.39
2.66
0.50
–––
0.175
0.170
0.125
0.016
0.016
0.045
0.095
0.015
0.500
0.250
0.080
–––
D
X X
G
J
H
V
C
–––
–––
SECTION X–X
0.105
0.100
–––
2.66
2.54
–––
1
N
R
V
0.115
0.135
2.93
3.43
N
–––
–––
DT SUFFIX
PLASTIC PACKAGE
CASE 369A–13
(DPAK)
ISSUE Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
SEATING
PLANE
–T–
2. CONTROLLING DIMENSION: INCH.
C
B
R
INCHES
MILLIMETERS
E
V
DIM
A
B
C
D
E
MIN
MAX
0.250
0.265
0.094
0.035
0.040
0.047
MIN
5.97
6.35
2.19
0.69
0.84
0.94
MAX
6.35
6.73
2.38
0.88
1.01
1.19
0.235
0.250
0.086
0.027
0.033
0.037
4
2
Z
A
K
S
F
1
3
G
H
J
K
L
0.180 BSC
4.58 BSC
U
0.034
0.018
0.102
0.040
0.023
0.114
0.87
0.46
2.60
1.01
0.58
2.89
0.090 BSC
2.29 BSC
F
J
R
S
U
V
0.175
0.020
0.020
0.030
0.138
0.215
0.050
–––
0.050
–––
4.45
0.51
0.51
0.77
3.51
5.46
1.27
–––
1.27
–––
L
H
D 2 PL
0.13 (0.005)
Z
M
G
T
13
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
8
5
4
–B–
1
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
H
J
MIN
9.40
6.10
3.94
0.38
1.02
MAX
10.16
6.60
4.45
0.51
1.78
MIN
MAX
0.370
0.240
0.155
0.015
0.040
0.400
0.260
0.175
0.020
0.070
F
NOTE 2
–A–
L
2.54 BSC
0.100 BSC
1.27
0.30
3.43
0.030
0.008
0.115
0.050
0.012
0.135
0.76
0.20
2.92
K
L
C
7.62 BSC
0.300 BSC
–
–
0.76
10
1.01
°
10
0.040
°
M
N
J
0.030
–T–
SEATING
PLANE
N
M
D
K
G
H
M
M
M
0.13 (0.005)
A
B
T
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
NOTES:
D
A
E
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
8
5
M
M
0.25
B
H
1
4
h X 45
MILLIMETERS
B
C
e
DIM
A
A1
B
C
D
E
e
H
h
MIN
1.35
0.10
0.35
0.18
4.80
3.80
MAX
1.75
0.25
0.49
0.25
5.00
4.00
A
SEATING
PLANE
L
1.27 BSC
0.10
5.80
0.25
0.40
0
6.20
0.50
1.25
7
A1
B
L
M
S
S
0.25
C
B
A
14
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
OUTLINE DIMENSIONS
DM SUFFIX
PLASTIC PACKAGE
CASE 846A–02
(Micro–8)
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–A–
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
–B–
K
MILLIMETERS
INCHES
PIN 1 ID
G
DIM
A
B
C
D
MIN
2.90
2.90
–––
MAX
3.10
3.10
1.10
0.40
MIN
MAX
0.122
0.122
0.043
0.016
D 8 PL
0.114
0.114
–––
M
S
S
0.08 (0.003)
T
B
A
0.25
0.010
G
H
J
K
L
0.65 BSC
0.026 BSC
0.05
0.13
4.75
0.40
0.15
0.23
5.05
0.70
0.002
0.005
0.187
0.016
0.006
0.009
0.199
0.028
SEATING
PLANE
–T–
0.038 (0.0015)
C
L
J
H
15
MOTOROLA ANALOG IC DEVICE DATA
LP2950 LP2951
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
LP2950/D
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