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MC10H181PWDS [MOTOROLA]

Arithmetic Logic Unit, ECL, PDIP24;
MC10H181PWDS
型号： MC10H181PWDS
厂家： MOTOROLA    MOTOROLA
描述：

Arithmetic Logic Unit, ECL, PDIP24
文件： 总5页 (文件大小：163K)
中文：  中文翻译
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SEMICONDUCTOR TECHNICAL DATA  
The MC10H181 is a high–speed arithmetic logic unit capable of performing  
16 logic operations and 16 arithmetic operations on two four–bit words. Full  
internal carry is incorporated for ripple through operation.  
Arithmetic logic operations are selected by applying the appropriate binary  
word to the select inputs (S0 through S3) as indicated in the tables of  
L SUFFIX  
CERAMIC PACKAGE  
CASE 758–02  
arithmetic/logic functions. Group carry propagate (P ) and carry generate (G )  
G
G
are provided to allow fast operations on very long words using a second order  
look–ahead. The internal carry is enabled by applying a low level voltage to the  
mode control input (M).  
P SUFFIX  
PLASTIC PACKAGE  
CASE 724–03  
When used with the MC10H179, full–carry look–ahead, as a second order  
look–ahead block, the MC10H181 provides high–speed arithmetic operations  
on very long words.  
This 10H part is a functional/pinout duplication of the standard MECL 10K  
family part with 100% improvement in propagation delay and no increase in  
power supply current.  
FN SUFFIX  
PLCC  
CASE 776–02  
•
Improved Noise Margin, 150 mV (Over Operating Voltage and  
Temperature Range)  
DIP  
•
Voltage Compensated  
• MECL 10K – Compatible  
PIN ASSIGNMENT  
MAXIMUM RATINGS  
V
V
CC2  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CC1  
Characteristic  
Symbol  
Rating  
Unit  
Vdc  
Vdc  
mA  
Power Supply (V  
= 0)  
V
EE  
–8.0 to 0  
M
C
F0  
2
CC  
Input Voltage (V  
= 0)  
V
I
0 to V  
50  
CC  
EE  
F1  
3
N
Output Current— Continuous  
— Surge  
I
out  
A0  
B0  
G
G
4
100  
Operating Temperature Range  
T
A
0 to +75  
°C  
C
5
N + 4  
Storage Temperature Range— Plastic  
— Ceramic  
T
stg  
–55 to +150  
–55 to +165  
°C  
°C  
B1  
A1  
S1  
A2  
S2  
S0  
S3  
F3  
6
F2  
7
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,  
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed  
circuitboardandtransverseair flowgreaterthan500Ifpmismaintained. Outputsareterminatedthrough  
a 50–ohm resistor to –2.0 volts.  
P
8
G
B3  
A3  
B2  
9
10  
11  
12  
FUNCTION SELECT TABLE  
Logic Functions  
M is High C = D.C.  
F
Arithmetic Operation  
M is Low C is low  
LOGIC DIAGRAM  
Function Select  
S3 S2 S1 S0  
n
V
F
EE  
13  
15  
17  
14  
L
L
L
L
L
L
L
H
L
F = A  
F = A + B  
F = A + B  
F = Logical “1”  
F = A • B  
F = B  
F = A  
F = A plus (A • B)  
F = A plus (A • B)  
F = A times 2  
Pin assignment is for Dual–in–Line Package.  
For PLCC pin assignment, see the Pin Conversion  
Tables on page 6–11 of the Motorola MECL Data  
Book (DL122/D).  
L
L
H
H
L
L
L
H
L
L
H
H
H
H
L
F = (A + B) plus 0  
F = (A + B) plus (A • B)  
F = A plus B  
S0 S1 S2 S3  
L
L
H
L
F0  
F1  
F2  
F3  
2
3
21  
20  
18  
19  
16  
11  
10  
9
A0  
B0  
A1  
B1  
A2  
B2  
A3  
B3  
L
H
H
L
F = A  
B
L
H
L
F = A + B  
F = A plus (A + B)  
F = (A + B) plus 0  
F = A minus B minus 1  
F = (A + B) plus (A • B)  
F = A plus (A + B)  
F = minus 1 (two’s complement)  
F = (A • B) minus 1  
F = (A • B) minus 1  
F = A minus 1  
H
H
H
H
H
H
H
H
F = A • B  
7
6
4
8
L
L
H
L
F = A  
F = B  
B
L
H
H
L
L
H
L
F = A + B  
F = Logical “0”  
F = A • B  
G
G
H
H
H
H
P
G
L
H
L
22  
23  
C
n
M
H
H
F = A • B  
C
5
n+4  
H
F = A  
9/96  
REV 6  
Motorola, Inc. 1996  
MC10H181  
S3 13  
S2 15  
S1 17  
S0 14  
LOGIC DIAGRAM  
2 F0  
B0 20  
A0 21  
3 F1  
B1 19  
A1 18  
7 F2  
B2 11  
A2 16  
6 F3  
8 P  
B3 9  
G
A3 10  
4 G  
5 C  
G
n+4  
C
22  
n
M 23  
V
V
V
=
=
=
Pin 1  
Pin 24  
Pin 12  
CC1  
CC2  
EE  
MOTOROLA  
2–276  
MC10H181  
ELECTRICAL CHARACTERISTICS (V  
EE  
= –5.2 V ±5.0%) (See Note)  
0°  
+25°  
+75°  
Characteristic  
Symbol  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Power Supply Current  
I
—
159  
—
145  
—
159  
mA  
E
Input Current High  
Pin 22  
Pins 14,23  
Pins 13,15,17  
Pins 10,16,18,21  
Pins 9,11,19,20  
I
µA  
inH  
—
—
—
—
—
720  
405  
515  
475  
465  
—
—
—
—
—
450  
255  
320  
300  
275  
—
—
—
—
—
450  
255  
320  
300  
275  
Input Current Low  
Pins 9–11, 13–22  
I
0.5  
—
0.5  
—
0.3  
—
µA  
inL  
High Output Voltage  
Low Output Voltage  
High Input Voltage  
Low Input Voltage  
V
–1.02  
–1.95  
–1.17  
–1.95  
–0.84  
–1.63  
–0.84  
–1.48  
–0.98  
–1.95  
–1.13  
–1.95  
–0.81  
–1.63  
–0.81  
–1.48  
–0.92  
–1.95  
–1.07  
–1.95  
–0.735  
–1.60  
Vdc  
Vdc  
Vdc  
Vdc  
OH  
V
OL  
V
–0.735  
–1.45  
IH  
V
IL  
NOTE:  
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket  
or mounted on a printed circuit board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts.  
AC PARAMETERS  
AC Switching Characteristics  
0°C  
+25°C  
+75°C  
Characteristic  
Propagation Delay  
Symbol  
Input  
Output  
Min  
Max  
Min  
Max  
Min  
Max  
Unit  
Conditions  
t+ +, t– –  
t+, t–  
C
n
C
C
A0,A1,A2,A3  
A0,A1,A2,A3  
0.7  
0.6  
2.0  
2.0  
0.7  
0.6  
2.0  
2.0  
0.7  
0.7  
2.2  
2.2  
ns  
ns  
n+4  
Rise Time, Fall Time  
C
n
n+4  
Propagation Delay  
t+ +, t+ –,  
t– +, t– –  
t+, t–  
C
n
F1  
F1  
F1  
A0  
ns  
C
n
1.0  
0.7  
3.0  
2.2  
1.0  
0.7  
3.0  
2.2  
1.2  
0.7  
3.3  
2.4  
Rise Time, Fall Time  
Propagation Delay  
C
n
t+ +, t+ –,  
t– +, t– –  
t+, t–  
A1  
A1  
A1  
F1  
F1  
F1  
ns  
1.5  
0.7  
3.7  
2.0  
1.5  
0.7  
3.7  
2.0  
1.6  
0.7  
4.0  
2.2  
Rise Time, Fall Time  
Propagation Delay  
Rise Time, Fall Time  
t+ +, t– –  
t+, t–  
A1  
A1  
P
S0,S3  
S0,S3  
1.5  
0.9  
3.7  
2.4  
1.5  
0.9  
3.7  
2.4  
1.6  
0.9  
4.0  
2.6  
ns  
ns  
G
P
G
Propagation Delay  
Rise Time, Fall Time  
t+ +, t– –  
t+, t–  
A1  
A1  
G
G
G
A0,A2,A3,C  
n
1.5  
0.7  
3.7  
2.2  
1.5  
0.7  
3.7  
2.2  
1.6  
0.7  
3.9  
2.4  
ns  
ns  
G
A0,A2,A3,C  
n
Propagation Delay  
Rise Time, Fall Time  
t+ –, t– +  
t+, t–  
A1  
A1  
C
A0,A2,A3,C  
n
1.5  
0.5  
3.6  
2.0  
1.5  
0.5  
3.6  
2.0  
1.6  
0.5  
3.9  
2.2  
ns  
ns  
n+4  
C
A0,A2,A3,C  
n+4  
n
Propagation Delay  
Rise Time, Fall Time  
t+ +, t– +  
t+, t–  
B1  
B1  
F1  
F
S3,C  
n
2.0  
0.7  
4.5  
2.3  
2.0  
0.7  
4.5  
2.3  
2.1  
0.7  
4.8  
2.5  
ns  
ns  
S3,C  
n
Propagation Delay  
Rise Time, Fall Time  
t+ +, t– –  
t+, t–  
B1  
B1  
P
S0,A1  
S0,A1  
1.5  
0.7  
3.8  
2.2  
1.5  
0.7  
3.8  
2.2  
1.6  
0.7  
4.0  
2.4  
ns  
ns  
G
P
G
Propagation Delay  
Rise Time, Fall Time  
t+ +, t– –  
t+, t–  
B1  
B1  
G
G
G
S3,C  
n
1.5  
0.7  
3.7  
2.2  
1.5  
0.7  
3.7  
2.2  
1.6  
0.7  
4.0  
2.4  
ns  
ns  
G
S3,C  
n
Propagation Delay  
Rise Time, Fall Time  
t+ –, t– +  
t+, t–  
B1  
B1  
C
S3,C  
n
2.0  
0.5  
4.0  
2.0  
2.0  
0.5  
4.0  
2.2  
2.1  
0.5  
4.3  
2.2  
ns  
ns  
n+4  
C
S3,C  
n+4  
n
Propagation Delay  
Rise Time, Fall Time  
t+ +, t+ –  
t+, t–  
M
M
F1  
F1  
—
—
1.5  
0.8  
4.2  
2.3  
1.5  
0.8  
4.2  
2.3  
1.6  
0.8  
4.5  
2.5  
ns  
ns  
Propagation Delay  
Rise Time, Fall Time  
t+ –, t– +  
t+, t–  
S1  
S1  
F1  
F1  
A1,B1  
A1,B1  
1.5  
0.7  
4.5  
2.0  
1.5  
0.7  
4.5  
2.0  
1.6  
0.7  
4.8  
2.2  
ns  
ns  
Propagation Delay  
Rise Time, Fall Time  
t– +, t+ –  
t+, t–  
S1  
S1  
P
A3,B3  
A3,B3  
1.5  
0.7  
4.0  
2.0  
1.5  
0.7  
4.0  
2.2  
1.6  
0.7  
4.3  
2.4  
ns  
ns  
G
P
G
Propagation Delay  
Rise Time, Fall Time  
t+ –, t– +  
t+, t–  
S1  
S1  
C
A3,B3  
A3,B3  
1.5  
0.7  
4.1  
2.2  
1.5  
0.7  
4.1  
2.2  
1.6  
0.7  
4.4  
2.4  
ns  
ns  
n+4  
C
n+4  
Propagation Delay  
Rise Time, Fall Time  
t+ –, t– +  
t+, t–  
S1  
S1  
G
G
G
A3,B3  
A3,B3  
1.3  
0.5  
4.5  
3.2  
1.3  
0.5  
4.5  
3.2  
1.4  
0.5  
4.8  
3.4  
ns  
ns  
G
† Logic high level (+1.11 Vdc) applied to pins listed. All other  
input pins are left floating or tied to +0.31 Vdc.  
V
= V  
= +2.0 Vdc, V  
= –3.2 Vdc  
CC1  
CC2  
EE  
2–277  
MOTOROLA  
MC10H181  
OUTLINE DIMENSIONS  
FN SUFFIX  
PLASTIC PLCC PACKAGE  
CASE 776–02  
ISSUE D  
M
S
S
0.007 (0.180)  
T
L–M  
N
B
Y BRK  
D
–N–  
M
S
S
0.007 (0.180)  
T
L–M  
N
U
Z
–M–  
–L–  
W
D
S
S
S
0.010 (0.250)  
T
L–M  
N
X
G1  
V
28  
1
VIEW D–D  
M
S
S
S
A
0.007 (0.180)  
0.007 (0.180)  
T
L–M  
L–M  
N
M
S
S
0.007 (0.180)  
T
L–M  
N
H
Z
M
S
T
N
R
K1  
C
E
0.004 (0.100)  
SEATING  
PLANE  
G
K
–T–  
VIEW S  
J
M
S
S
0.007 (0.180)  
T
L–M  
N
F
G1  
S
S
S
0.010 (0.250)  
T
L–M  
N
VIEW S  
NOTES:  
INCHES  
MILLIMETERS  
1. DATUMS –L–, –M–, AND –N– DETERMINED  
WHERE TOP OF LEAD SHOULDER EXITS  
PLASTIC BODY AT MOLD PARTING LINE.  
2. DIMENSION G1, TRUE POSITION TO BE  
MEASURED AT DATUM –T–, SEATING PLANE.  
3. DIMENSIONS R AND U DO NOT INCLUDE  
MOLD FLASH. ALLOWABLE MOLD FLASH IS  
0.010 (0.250) PER SIDE.  
DIM  
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1  
K1  
MIN  
MAX  
0.495  
0.495  
0.180  
0.110  
0.019  
MIN  
12.32  
12.32  
4.20  
MAX  
12.57  
12.57  
4.57  
0.485  
0.485  
0.165  
0.090  
0.013  
2.29  
2.79  
0.33  
0.48  
0.050 BSC  
1.27 BSC  
4. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
0.026  
0.020  
0.025  
0.450  
0.450  
0.042  
0.042  
0.042  
–––  
0.032  
–––  
–––  
0.456  
0.456  
0.048  
0.048  
0.056  
0.020  
10  
0.66  
0.51  
0.64  
11.43  
11.43  
1.07  
1.07  
1.07  
–––  
0.81  
–––  
–––  
11.58  
11.58  
1.21  
1.21  
1.42  
0.50  
10  
5. CONTROLLING DIMENSION: INCH.  
6. THE PACKAGE TOP MAY BE SMALLER THAN  
THE PACKAGE BOTTOM BY UP TO 0.012  
(0.300). DIMENSIONS R AND U ARE  
DETERMINED AT THE OUTERMOST  
EXTREMES OF THE PLASTIC BODY  
EXCLUSIVE OF MOLD FLASH, TIE BAR  
BURRS, GATE BURRS AND INTERLEAD  
FLASH, BUT INCLUDING ANY MISMATCH  
BETWEEN THE TOP AND BOTTOM OF THE  
PLASTIC BODY.  
2
2
0.410  
0.040  
0.430  
–––  
10.42  
1.02  
10.92  
–––  
7. DIMENSION H DOES NOT INCLUDE DAMBAR  
PROTRUSION OR INTRUSION. THE DAMBAR  
PROTRUSION(S) SHALL NOT CAUSE THE H  
DIMENSION TO BE GREATER THAN 0.037  
(0.940). THE DAMBAR INTRUSION(S) SHALL  
NOT CAUSE THE H DIMENSION TO BE  
SMALLER THAN 0.025 (0.635).  
MOTOROLA  
2–278  
MC10H181  
OUTLINE DIMENSIONS  
L SUFFIX  
CERAMIC DIP PACKAGE  
CASE 758–02  
ISSUE A  
L
P
B
24  
1
13  
12  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
J
–A–  
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
F
G
J
K
L
MIN  
MAX  
1.285  
0.305  
0.200  
0.021  
0.062  
MIN  
31.50  
7.24  
4.07  
0.38  
1.14  
MAX  
32.64  
7.75  
5.08  
0.53  
1.57  
1.240  
0.285  
0.160  
0.015  
0.045  
N
C
SEATING  
PLANE  
0.100 BSC  
2.54 BSC  
–T–  
K
0.008  
0.100  
0.300  
0.020  
0.360  
0.013  
0.165  
0.310  
0.050  
0.400  
0.20  
2.54  
7.62  
0.51  
9.14  
0.33  
4.19  
7.87  
1.27  
10.16  
G
N
P
F
D 24 PL  
M
M
0.25 (0.010)  
T A  
P SUFFIX  
PLASTIC DIP PACKAGE  
CASE 724–03  
–A–  
NOTES:  
1. CHAMFERED CONTOUR OPTIONAL.  
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
24  
13  
12  
ISSUE D  
–B–  
3. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
1
4. CONTROLLING DIMENSION: INCH.  
INCHES  
MILLIMETERS  
L
DIM  
A
B
C
D
E
MIN  
MAX  
1.265  
0.270  
0.175  
0.020  
MIN  
31.25  
6.35  
3.69  
0.38  
MAX  
32.13  
6.85  
4.44  
0.51  
C
1.230  
0.250  
0.145  
0.015  
NOTE 1  
–T–  
SEATING  
PLANE  
K
0.050 BSC  
1.27 BSC  
F
G
J
K
L
M
N
0.040  
0.100 BSC  
0.007  
0.110  
0.300 BSC  
0.060  
1.02  
2.54 BSC  
0.18  
2.80  
7.62 BSC  
1.52  
N
M
E
0.012  
0.140  
0.30  
3.55  
G
J 24 PL  
0.25 (0.010)  
F
M
M
T
B
D 24 PL  
0.25 (0.010)  
0
15  
0.040  
0
0.51  
15  
1.01  
0.020  
M
M
T
A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
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datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”  
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applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
How to reach us:  
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;  
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,  
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454  
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315  
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609  
INTERNET: http://Design–NET.com  
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
MC10H181/D  
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