MC10H186FNR2 [ONSEMI]
Hex D Master−Slave Flip−Flop with Reset; 六路D主从触发器与复位
| 型号： | MC10H186FNR2 |
| 厂家： | 
ONSEMI |
| 描述： | Hex D Master−Slave Flip−Flop with Reset |
| 文件： | 总5页 (文件大小：150K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MC10H186
Hex D Master−Slave
Flip−Flop with Reset
Description
The MC10H186 is a hex D type flip−flop with common reset and
clock lines. This MECL 10H™ part is a functional/pinout duplication
of the standard MECL 10K™ family part, with 100% improvement in
clock toggle frequency and propagation delay and no increase in
power−supply current.
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MARKING DIAGRAMS*
Features
16
• Propagation Delay, 1.7 ns Typical
• Power Dissipation, 460 mW Typical
MC10H186L
AWLYYWW
• Improved Noise Margin 150 mV (Over Operating Voltage and
1
Temperature Range)
CDIP−16
L SUFFIX
CASE 620A
• Voltage Compensated
• MECL 10K Compatible
• Pb−Free Packages are Available*
CLOCKED TRUTH TABLE
16
1
R
L
C
D
X
L
Qn+1
Qn
L
MC10H186P
AWLYYWWG
L
16
L
H *
H *
L
1
L
H
X
H
PDIP−16
P SUFFIX
CASE 648
H
L
* A clock H is a clock transition from
a low to a high state.
1 20
DIP
PIN ASSIGNMENT
10H186G
AWLYYWW
20
RESET
Q0
V
CC
1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q5
PLLC−20
FN SUFFIX
CASE 775
Q4
Q1
Q3
Q2
D5
D0
A
= Assembly Location
= Year
WL, L = Wafer Lot
YY, Y
WW, W = Work Week
G
D4
D1
D3
D2
= Pb−Free Package
CLOCK
V
EE
*For additional marking information, refer to
Application Note AND8002/D.
Pin assignment is for Dual−in−Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
©
Semiconductor Components Industries, LLC, 2006
1
Publication Order Number:
February, 2006 − Rev. 7
MC10H186/D
MC10H186
Table 1. MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
Vdc
Vdc
mA
V
Power Supply (V = 0)
−8.0 to 0
EE
CC
V
Input Voltage (V = 0)
0 to V
I
CC
EE
I
Output Current
− Continuous
− Surge
50
100
out
T
A
Operating Temperature Range
0 to +75
°C
T
stg
Storage Temperature Range − Plastic
− Ceramic
−55 to +150
−55 to +165
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (VEE = −5.2 V 5%) (See Note 1.)
0°
25°
75°
Symbol
Characteristic
Power Supply Current
Input Current High
Pins 5,6,7,10,11,12
Min
Max
Min
Max
Min
Max
Unit
mA
mA
I
−
121
−
110
−
121
E
I
inH
−
−
−
430
670
1250
−
−
−
265
420
765
−
−
−
265
420
765
Pin 9
Pin 1
I
Input Current Low
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
0.5
−
0.5
−
0.3
−
mA
inL
V
−1.02
−1.95
−1.17
−1.95
−0.84
−1.63
−0.84
−1.48
−0.98
−1.95
−1.13
−1.95
−0.81
−1.63
−0.81
−1.48
−0.92
−1.95
−1.07
−1.95
−0.735
−1.60
−0.735
−1.45
Vdc
Vdc
Vdc
Vdc
OH
V
OL
V
IH
V
IL
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to −2.0 V.
Table 3. AC PARAMETERS
0°
25°
75°
Symbol
Characteristic
Propagation Delay
Min
0.7
1.5
1.0
0.7
0.7
250
3.0
Max
3.0
−
Min
0.7
1.5
1.0
0.7
0.7
250
3.0
Max
3.0
−
Min
0.7
1.5
1.0
0.7
0.7
250
3.0
Max
3.0
−
Unit
ns
t
pd
t
Set−up Time
Hold Time
ns
set
t
−
−
−
ns
hold
t
t
Rise Time
2.6
2.6
−
2.6
2.6
−
2.6
2.6
−
ns
r
Fall Time
ns
f
f
Toggle Frequency
MHz
ns
tog
t
Reset Recovery Time
−
−
−
rr
(t
)
1−9+
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
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2
MC10H186
APPLICATION INFORMATION
The MC10H186 contains six high−speed, master slave
in the information present at the data (D) input will not affect
the output information any other time due to the
master−slave construction of this device. A common Reset
is included in this circuit. THE RESET ONLY
FUNCTIONS WHEN THE CLOCK IS LOW.
type “D” flip−flops. Data is entered into the master when the
clock is low. Master−to−slave data transfer takes place on
the positive−going Clock transition. Thus outputs may
change only on a positive−going Clock transition. A change
LOGIC DIAGRAM
D0
D1
5
2
3
Q0
Q1
6
7
D2
D3
D4
4
Q2
V
V
=
=
PIN 16
PIN 8
CC
EE
10
11
12
13 Q3
14 Q4
15 Q5
D5
9
CLOCK
RESET
1
ORDERING INFORMATION
Device
†
Package
Shipping
MC10H186FN
PLLC−20
46 Units / Rail
46 Units / Rail
MC10H186FNG
PLLC−20
(Pb−Free)
MC10H186FNR2
PLLC−20
500 / Tape & Reel
500 / Tape & Reel
MC10H186FNR2G
PLLC−20
(Pb−Free)
MC10H186L
MC10H186P
MC10H186PG
CDIP−16
PDIP−16
25 Unit / Rail
25 Unit / Rail
25 Unit / Rail
PDIP−16
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
MC10H186
PACKAGE DIMENSIONS
20 LEAD PLLC
CASE 775−02
ISSUE E
M
S
S
0.007 (0.180)
T
L−M
N
B
Y BRK
−N−
S
S
N
0.007 (0.180) M
T
L−M
U
D
D
−L−
−M−
Z
W
20
1
S
S
S
N
0.010 (0.250)
T
L−M
G1
X
V
VIEW D−D
M
M
S
S
S
S
A
R
0.007 (0.180)
0.007 (0.180)
T
L−M
L−M
N
N
Z
T
M
S
S
N
0.007 (0.180)
T
L−M
H
C
K1
E
K
0.004 (0.100)
G
−T− SEATING
PLANE
J
M
S
S
N
0.007 (0.180)
T
L−M
F
VIEW S
G1
VIEW S
S
S
S
0.010 (0.250)
T
L−M
N
NOTES:
INCHES
MILLIMETERS
1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M,
1982.
DIM
A
B
C
E
MIN
MAX
0.395
0.395
0.180
0.110
0.019
MIN
9.78
9.78
4.20
2.29
0.33
MAX
10.03
10.03
4.57
2.79
0.48
0.385
0.385
0.165
0.090
0.013
2. DIMENSIONS IN INCHES.
3. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP
OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD
PARTING LINE.
4. DIMENSION G1, TRUE POSITION TO BE MEASURED AT
DATUM −T−, SEATING PLANE.
F
G
H
J
K
R
U
V
W
X
Y
0.050 BSC
1.27 BSC
5. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH.
ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
6. DIMENSIONS IN THE PACKAGE TOP MAY BE SMALLER
THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE
BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY
MISMATCH BETWEEN THE TOP AND BOTTOM OF THE
PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION
TO BE GREATER THAN 0.037 (0.940). THE DAMBAR
INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO
BE SMALLER THAN 0.025 (0.635).
0.026
0.020
0.025
0.350
0.350
0.042
0.042
0.042
0.032
−−−
−−−
0.356
0.356
0.048
0.048
0.056
0.66
0.51
0.64
8.89
8.89
1.07
1.07
1.07
−−−
2
0.81
−−−
−−−
9.04
9.04
1.21
1.21
1.42
0.50
10
−−− 0.020
Z
2
10
0.330
−−−
_
_
_
_
G1 0.310
K1 0.040
7.88
1.02
8.38
−−−
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4
MC10H186
PACKAGE DIMENSIONS
CDIP−16
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620A−01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
B
B
A
A
M
16
9
8
5
THIS DRAWING REPLACES OBSOLETE
CASE OUTLINE 620−10.
L
INCHES
DIM MIN MAX
MILLIMETERS
1
MIN
19.05
6.10
−−−
MAX
19.93
7.49
5.08
0.50
A
B
C
D
E
F
0.750
0.240
0.785
0.295
16X J
−−− 0.200
0.015 0.020
0.050 BSC
0.39
M
0.25 (0.010)
T
B
1.27 BSC
E
0.055
0.065
1.40
1.65
G
H
K
L
0.100 BSC
2.54 BSC
F
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
0.300 BSC
7.62 BSC
M
N
0
0.020
15
_
0.040
0
_
0.51
15
_
1.01
_
C
K
SEATING
PLANE
T
N
G
16X D
M
0.25 (0.010)
T A
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
−A−
16
9
8
ISSUE R
B
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
1
INCHES
DIM MIN MAX
MILLIMETERS
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
A
B
C
D
F
0.740
0.250
0.145
0.015
0.040
0.770
0.270
0.175
0.021
0.70
C
L
S
SEATING
PLANE
−T−
G
H
J
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
K
L
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
M
S
_
_
_
_
0.020
0.040
0.51
1.01
M
M
0.25 (0.010)
T A
MECL 10H and MECL 10K are trademarks of Motorola, Inc.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Order Literature: http://www.onsemi.com/litorder
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Phone: 81−3−5773−3850
For additional information, please contact your
local Sales Representative.
MC10H186/D
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