MC13282AP [MOTOROLA]

100 MHz VIDEO PROCESSOR WITH OSD INTERFACE; 带OSD界面100 MHz的视频处理器
MC13282AP
型号: MC13282AP
厂家: MOTOROLA    MOTOROLA
描述:

100 MHz VIDEO PROCESSOR WITH OSD INTERFACE
带OSD界面100 MHz的视频处理器

文件: 总12页 (文件大小:268K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Order this document by MC13282A/D  
100 MHz VIDEO PROCESSOR  
WITH OSD INTERFACE  
The MC13282A is a three channel wideband amplifier designed for use as  
a video pre–amp in high resolution RGB color monitors.  
Features:  
SEMICONDUCTOR  
TECHNICAL DATA  
4.0 Vpp Output with 100 MHz Bandwidth  
3.5 ns Rise/Fall Time  
Subcontrast Control for Each Channel  
Blanking and Clamping Inputs  
Contrast Control  
OSD Interface with 50 MHz Bandwidth  
OSD Contrast Control  
Package: NDIP–24  
24  
1
ABSOLUTE MAXIMUM RATINGS  
Rating  
Pin  
9
Value  
–0.5, 10  
–0.5, 10  
–0.5, +5.0  
Unit  
Vdc  
Vdc  
Vdc  
P SUFFIX  
PLASTIC PACKAGE  
CASE 724  
Power Supply Voltage – V  
CC  
Power Supply Voltage – Video V  
17  
CC  
Voltage at Video Amplifier Inputs  
2, 4, 6, 8,  
10, 12  
Collector–Emitter Current (Three Channels)  
Storage Temperature  
17  
120  
–65 to +150  
150  
mA  
°C  
PIN CONNECTIONS  
Junction Temperature  
°C  
Blank  
1
2
24  
R Subcontrast  
R Input  
NOTES: 1. Devices should not be operated at these limits. Refer to “Recommended  
Operating Conditions” section for actual device operation.  
23 Clamp  
2. ESD data available upon request.  
G Subcontrast  
G Input  
3
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
R Emitter  
R Clamp  
V5  
4
B Subcontrast  
B Input  
5
RECOMMENDED OPERATING CONDITIONS  
G Emitter  
G Clamp  
6
Characteristic  
Power Supply Voltage  
Pin  
9, 17  
13  
Min  
7.6  
0
Typ  
8.0  
Max Unit  
NDIP–24  
Gnd  
7
8.4  
5.0  
5.0  
5.0  
5.0  
1.0  
Vdc  
Vdc  
Vdc  
V
R
8
Video V  
OSD  
CC  
Contrast Control  
V
B Clamp  
B Emitter  
9
CC  
Subcontrast Control  
1, 3, 5  
24  
0
G
10  
OSD  
Fast Commutate  
Contrast  
OSD Contrast 11  
12  
Blanking Input Signal Amplitude  
Clamping Input Signal Amplitude  
0
B
OSD  
23  
0
V
(Top View)  
Video Signal Amplitude  
2, 4, 6  
0.7  
Vpp  
(with 75 Termination)  
OSD Signal Input  
8, 10, 12  
17  
0
TTL  
V
Collector–Emitter Current  
(Total for Three Channels)  
50  
mA  
ORDERING INFORMATION  
Operating  
Clamping Pulse Width  
23  
500  
0
ns  
Temperature Range  
Device  
Package  
Operating Ambient Temperature  
70  
°C  
MC13282AP  
T
= 0° to +70°C  
Plastic DIP  
A
This document contains information on a new product. Specifications and information herein  
are subject to change without notice.  
Motorola, Inc. 1996  
Rev 0  
MC13282A  
ELECTRICAL CHARACTERISTICS (Refer to Test Circuit Figure 1, T = 25°C, V  
= 8.0 Vdc.)  
CC  
A
Characteristic  
Input Impedance  
Condition  
Pin  
Min  
100  
Typ  
Max  
Unit  
kΩ  
2, 4, 6  
Internal DC Bias Voltage  
Output Signal Amplitude  
2.4  
4.0  
Vdc  
Vpp  
3.6  
V2, V4, V6 = 0.7 Vpp  
V1, V3, V5, V13 = 5.0 V  
V14 = 0 V  
15, 19, 22  
Voltage Gain  
5.6  
V/V  
dB  
Contrast Control  
V13 = 5.0 to 0 V  
13  
–26  
V1, V3, V5 = 5.0 V  
Subcontrast Control  
V1, V3, V5 = 5.0 to 0 V  
V13 = 5.0 V  
1, 3, 5  
–26  
dB  
Emitter DC Level  
15, 19, 22  
24  
1.0  
1.2  
1.25  
3.75  
3.5  
1.4  
Vdc  
V
Blanking Input Threshold  
Clamping Input Threshold  
Video Rise Time  
23  
V
V2, V4, V6 = 0.7 Vpp  
15, 19, 22  
ns  
V
= 4.0 Vpp  
out  
> 300 , C < 5.0 pF  
Video Fall Time  
Video Bandwidth  
3.5  
R
L
L
V2, V4, V6 = 0.7 Vpp  
15, 19, 22  
100  
MHz  
V1, V3, V5, V13 = 5.0 V  
V14 = 0 V  
R
> 300 , C < 5.0 pF  
L
L
OSD Rise Time  
OSD Fall Time  
OSD Bandwidth  
7.0  
7.0  
50  
V8, V10, V12 = TTL Level  
V11 = 5.0 V, V14 = 5.0 V  
15, 19, 22  
15, 19, 22  
ns  
V8, V10, V12 = TTL Level  
V11 = 5.0 V, V14 = 5.0 V  
MHz  
OSD Propagation Delay  
Power Supply Current  
17  
70  
ns  
V
CC  
, Video V  
= 8.0 V  
CC  
9, 17  
mA  
NOTE: It is recommended to use a double sided PCB layout for high frequency measurement (e.g., rise/fall time, bandwidth).  
2
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
Figure 1. Internal Block Diagram  
R Clamp  
21  
Fast Commutate  
14  
V
V
ref2  
ref1  
Video V  
17  
CC  
R Input  
2
R Emitter  
22  
R
OSD  
8
R Subcontrast  
1
R Channel  
Contrast and Subcontrast  
Control Processor  
G Clamp  
18  
Contrast  
13  
V
V
ref2  
ref1  
G Input  
4
G Emitter  
19  
G
OSD  
10  
Blank  
24  
Clamp  
Clamp Blank  
Decoder  
23  
G Subcontrast  
3
Contrast and Subcontrast  
Control Processor  
G Channel  
B Clamp  
16  
V
V
ref2  
ref1  
OSD Contrast  
11  
B Input  
6
B Emitter  
15  
B
OSD  
V
CC  
12  
9
B Channel  
V5  
B Subcontrast  
5
Contrast and Subcontrast  
Control Processor  
20  
Gnd  
7
This device contains 272 active transistors.  
3
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
PIN FUNCTION DESCRIPTION  
Pin  
Name  
Equivalent Internal Circuit  
Description  
1
R Subcontrast  
Control  
These pin provides a maximum of 26 dB attenuation  
to vary the gain of each video amplifier separately.  
V
CC  
Input voltage is from 0 to 5.0 V. Increasing the voltage  
will increase the contrast level.  
50 k  
3
5
2
G Subcontrast  
Control  
5.0 V  
B Subcontrast  
Control  
R Input  
G Input  
B Input  
Ground  
The input coupling capacitor is used for input  
clamping storage. The maximum source impedance  
is 100 .  
V
ref  
5.0 V  
Clamp  
Input polarity of the video signal is positive.  
4
6
0.1  
Nominal 0.7 Vpp input signal is recommended  
(maximum 1.0 Vpp).  
75  
10 k  
1.0 k  
7
8
Ground pin. Connect to a clean, solid ground.  
These inputs are standard TTL level.  
R
Input  
Input  
Input  
OSD  
V
CC  
10  
12  
G
OSD  
80 k  
B
OSD  
60 k  
9
V
CC  
Connect to 8.0 Vdc supply, ±5%. Decoupling is  
required at this pin.  
11  
OSD Contrast  
On Screen Display contrast control.  
V
CC  
Input voltage is from 0 to 5.0 V. Increasing the voltage  
will increase the contrast of the OSD signal.  
3.5 k  
5.0 V  
13  
Contrast  
Overall Contrast Control for the three channels.  
5.0 V  
2.5 V  
The input range is 0 V to 5.0 V. An increase of voltage  
increases the contrast.  
42 k  
2.0 k  
4
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
PIN FUNCTION DESCRIPTION (continued)  
Equivalent Internal Circuit  
Pin  
Name  
Description  
14  
Fast Commutate  
This pin is used in conjunction with the RGB OSD  
inputs. It is a high speed switch used for overlaying  
text on picture. A logic low selects Pins 2, 4, 6. A logic  
high selects Pins 8, 10, 12.  
V
CC  
40 k  
20 k  
15  
19  
22  
16  
B Emitter Output  
G Emitter Output  
R Emitter Output  
The video outputs are configured as emitter–followers  
with a driving capability of about 15 mA each.  
V
CC  
The dc voltage at these three emitters is set to 1.2 V  
(black level).  
Video  
Signal  
The dc current through the output stage is determined  
by the emitter resistors (typically 330 ).  
Contrast  
R
= 330  
E
Typical  
B Clamp  
Capacitor  
A 100 nF capacitor is connected to each of these pins.  
The capacitor is used for video output dc restoration.  
1.2 V  
Video Out  
18  
21  
G Clamp  
Capacitor  
V
CC  
R Clamp  
Capacitor  
17  
20  
Video V  
Connect to 8.0 V dc supply, ±5%. This V  
video output stage. It is internally connected to the  
collectors of the output transistors.  
is for the  
CC  
CC  
5.0 V (V5)  
ref  
5.0 V regulator. Minimum 10 µF capacitor is required  
for noise filtering and compensation. It can source  
up to 20 mA but not sink current. Output impedance  
is 10 . Recommended for use as a voltage  
reference only.  
V
CC  
Band Gap  
Regulator  
5.0 V  
10 µF  
R
0.8 R  
5
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
PIN FUNCTION DESCRIPTION (continued)  
Equivalent Internal Circuit  
Pin  
Name  
Clamp  
Description  
23  
This pin is used for video clamping.  
The threshold clamping level is 3.75 V.  
V
V
CC  
ref1  
30 k  
V
ref2  
10 k  
3.75 V  
24  
Blank  
This pin is used for video blanking.  
The threshold blanking level is 1.25 V.  
V
V
CC  
ref1  
30 k  
V
ref2  
10 k  
1.25 V  
FUNCTIONAL DESCRIPTION  
The MC13282A is composed of three video amplifiers,  
clamping and blanking circuitry with contrast and subcontrast  
controls and OSD interface. Each video amplifier is designed  
to have a –3.0 dB bandwidth of 100 MHz with a gain of up to  
about 5.6 V/V, or 15 dB.  
Subcontrast Control  
Each subcontrast control provides a maximum of 26 dB  
attenuation on each video amplifier separately.  
OSD Interface  
The three OSD inputs are TTL compatible and have a  
typical bandwidth of 50 MHz. A fast commutate pin is  
provided to select either the video or the OSD inputs as the  
source for the outputs. OSD contrast control is also  
provided to set the amount of gain required when OSD  
inputs are selected.  
Video Input  
The video input stages are high impedance and designed  
to accept a maximum signal of 1.0 Vpp with 75 termination  
(typically) provided externally. During the clamping period, a  
current is provided to the input capacitor by the clamping  
circuit which brings the input to a proper dc level (nominal  
2.0 V). The blanking and clamping signals are to be provided  
externally, with their thresholds sitting at 1.25 V and 3.75 V,  
respectively.  
Clamp Pulse Input  
The clamping pulse is provided externally, and the pulse  
width must be no less than 500 ns.  
Blank Pulse Input  
Video Output  
The blanking pulse is used to blank the video signal during  
the horizontal sync period, or used as a control pin for video  
mute function.  
The video output stages are configured as  
emitter–followers, with a driving capability of about 15 mA for  
each channel. The dc voltage at these three emitters is set to  
1.2 V (black level). The dc current through each output stage  
is determined by the emitter resistor (typically 330 ).  
Power Supplies  
V
and Video V supplies are to be 8.0 V ±5%.  
CC  
CC  
Contrast Control  
The contrast control varies the gain of three video  
amplifiers from a minimum of 0.3 V/V to a maximum of  
5.6 V/V when all subcontrast levels are set to 5.0 V.  
6
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
Figure 2. Test Circuit  
8.0 V  
Blank  
Input  
Clamp  
Input  
OSD  
Select  
C15  
0.1  
C14  
47  
24  
23  
Clamp  
14  
17  
Video  
9
µ
F
Blank  
Fast  
Commutate  
V
CC  
V
CC  
C1  
0.1  
R Output  
R Input  
G Input  
B Input  
2
22  
R Emitter  
R Input  
G Input  
C2  
0.1  
Video  
Inputs  
G Output  
B Output  
4
19  
15  
G Emitter  
B Emitter  
C3  
0.1  
6
B Input  
R4  
330  
R5  
330  
R6  
330  
8
R
OSD  
MC13282A  
21  
10  
OSD  
Inputs  
G
R Clamp  
G Clamp  
B Clamp  
OSD  
12  
7
18  
16  
B
OSD  
C13  
0.1  
C12  
0.1  
Gnd  
C11  
0.1  
20  
V5  
R1  
75  
R2  
75  
R3  
75  
Clamp Capacitor  
Subcontrast Control  
G
OSD  
Contrast  
R
1
B
Contrast  
13  
C9  
0.1  
3
5
11  
C5  
10  
C7  
0.1  
C8  
0.1  
C10  
0.1  
C6  
0.1  
µF  
C4  
0.1  
5.0 V  
5.0 V  
5.0 V  
5.0 V  
5.0 V  
APPLICATION INFORMATION  
PCB Layout  
Care should be taken in the PCB layout to minimize the  
noiseeffects. ThemostsensitivepinsareV (9), VideoV  
maximum for each channel. The loading impedance  
connected to the output stages should be greater than 330 Ω  
and less than 5.0 pF for optimum performance (e.g., rise/fall  
time, bandwidth, etc.). Decreasing the resistive load will  
reduce the rise/fall time by increasing the driving current, but  
the output stage may be damaged due to increasing power  
dissipation at the same time. The frequency response is  
affected by the loading capacitance. The typical value is 3.0  
to 5.0 pF. Figure 4 shows a typical interface with a video output  
driver. For a high resolution color monitor application, it is  
recommended to use coaxial cable or shielded cable for input  
signal connections.  
CC  
(17), V5 (20), Clamp (16, 18, 21). It is strongly recommended  
to make a ground plane and connect V /Video V and  
CC  
CC  
ground traces to the power supply directly. Separate power  
supply traces, should be used for V and Video V and  
CC  
CC  
CC  
decoupling capacitors should be connected as close as  
possible to the device. Multi–layer ceramic and tantalum  
capacitors are recommended. Pin 20 (V5) is designed as a  
5.0 V voltage reference for contrast, RGB subcontrast and  
OSD contrast controls, so the same precaution for V  
CC  
should be also applied at this pin. The Clamp capacitors at  
Pins 16,18 and 21 should be connected to ground close to  
IC’s ground Pin 7 or power supply ground. The copper trace  
of the video signal inputs and outputs should be as short as  
possible and separated by ground traces to avoid any RGB  
cross–interference. A double sided PCB should be used to  
optimize the device’s performance.  
Clamp and Blank Input  
The clamp input is normally (except for Sync–on–Green)  
connected to a positive horizontal sync pulse, and has a  
threshold level of 3.75 V. It is used as a timing reference for  
the dc restoration process, so it cannot be left open. If  
Sync–on–Green timing mode is used, the clamping pulse  
should be located at horizontal back porch period instead of  
horizontal sync tip. Otherwise, the black level will be clamped  
at an incorrect voltage.  
RGB Input and Output  
The RGB output stages are designed as emitter–followers  
to drive the CRT driver circuitry directly. The emitter resistors  
used is 330 (typically) and the driving current is 15 mA  
The blank input is used as a video mute, or horizontal  
blanking control, and is normally connected to a blanking  
7
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
pulse generated from the flyback or from an MCU. The  
compatible, and therefore interface directly with MC13282A.  
Level shifting circuitry is not needed. The MC141540 is a  
digital device, controlled by an MCU. Therefore, separate  
power supply runs to the MC141540 and to the MC13282A  
are recommended. Care should be taken in the PC board  
layout to prevent digital noise from entering the analog  
portions of MC13282A.  
Normally the OSD switching is done during the active  
video time. It is recommended that the Fast Commutate pin  
not be activated during the horizontal sync time.  
threshold level of 1.25 V. The blanking pulse width should be  
equal to the flyback retrace period to make sure that the  
video signal is blanked properly during retrace. It is  
necessary to limit the amplitude, and avoid any negative  
undershoots if the flyback pulse is used. This Blanking input  
pin cannot accept a negative voltage. This pin should be  
grounded if it is not used.  
OSD interface  
Figure 3 show a typical application with an OSD device  
(MC141540). The MC141540 OSD and FC outputs are TTL  
Figure 3. Interfacing with OSD Device  
5.0 V  
8.0 V  
C11  
C12  
47  
R4  
10  
10  
µF  
µ
F
VR1  
50 k  
VR2  
50 k  
VR3  
50 k  
C10  
0.1  
C9  
0.1  
C7  
47  
C8  
0.1  
µF  
R
G
B
V5  
Gnd  
V
Video  
CC  
Contrast Contrast Contrast  
V
CC  
C1 0.1  
C2 0.1  
C3 0.1  
R Emitter  
G Emitter  
R5  
330  
R Input  
G Input  
B Input  
R Input  
G Input  
RGB Output  
R6  
330  
MC13282A  
B Emitter  
R Clamp  
R7  
330  
B Input  
Video Processor  
with OSD Interface  
R1  
75  
R2  
75  
R3  
75  
Clamp  
Blank  
R
G Clamp  
B Clamp  
Contrast  
Fast  
Commutate  
OSD  
Contrast  
C4  
0.1  
C5  
0.1  
C6  
0.1  
G
B
OSD  
OSD OSD  
5.0 V  
5.0 V  
Clamp Blank  
Input Input  
VR4  
50 k  
VR5  
50 k  
5.0 V  
R
G
B
OSD  
Fast  
Commutate  
H Tone  
OSD OSD  
V
DD  
C18  
C17  
0.1  
5.0 V  
10  
µF  
V
SS  
SS  
L1  
150 mH  
MC141540  
On Screen Display  
Processor  
V
MCU Interface  
MOSI  
DDA  
C16  
100  
C15  
0.1  
µF  
V
SCK  
H
SSA  
V
VCO  
RP  
F/B  
F/B  
V
DDA  
R9  
5.6 k  
R10  
2.0 k  
R8  
470 k  
R11  
7.5 k  
Hsyn  
Input  
Vsyn  
Input  
C13  
0.01  
C14  
0.1  
8
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
Figure 4. Interfacing with Video Output Drivers  
CRT Driver V  
CC  
Reference Voltage  
C
L
5.0 V  
8.0 V  
C11  
10  
C12  
47  
R4  
10  
µ
F
µ
F
VR1  
50 k  
VR2  
50 k  
VR3  
50 k  
C10  
0.1  
C9  
0.1  
C7  
47  
C8  
0.1  
µF  
R
G
B
V5  
Gnd  
V
Video  
CC  
Contrast Contrast Contrast  
V
CC  
C1 0.1  
C2 0.1  
C3 0.1  
R Emitter  
G Emitter  
R5  
330  
R Input  
G Input  
B Input  
R Input  
G Input  
RGB Output  
R6  
330  
MC13282A  
B Emitter  
R Clamp  
R7  
330  
B Input  
Video Processor  
with OSD Interface  
R1  
75  
R2  
75  
R3  
75  
Clamp  
Blank  
R
G Clamp  
B Clamp  
Contrast  
Fast  
Commutate  
OSD  
Contrast  
C4  
0.1  
C5  
0.1  
C6  
0.1  
G
B
OSD OSD  
OSD  
5.0 V  
Clamp Blank  
VR5  
50 k  
Input  
Input  
OSD Input and Control  
9
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
Figure 5. RGB In/Out Linearity  
Figure 6. Color Contrast  
4.5  
4.0  
3.5  
4.5  
4.0  
3.5  
3.0  
2.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
2.0  
1.5  
1.0  
0.5  
0
0
0.2  
0.4  
0.6  
0.8  
0
2.0  
4.0  
6.0  
VIDEO INPUT (Vpp)  
CONTRAST CONTROL VOLTAGE (V)  
Figure 7. Subcontrast Control  
Figure 8. OSD Contrast Control  
4.5  
4.0  
4.5  
4.0  
3.5  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0
2.0  
4.0  
6.0  
0
2.0  
4.0  
6.0  
SUBCONTRAST VOLTAGE (V)  
OSD CONTRAST CONTROL VOLTAGE (V)  
Figure 9. Crosstalk From Green to Red  
and Blue Channels  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
Blue Channel  
Red Channel  
–80  
1.0  
10  
100  
1000  
f, FREQUENCY (MHz)  
10  
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
Figure 10. Rise Time  
Figure 11. Fall Time  
100 mV/DIV  
5.0 ns/DIV  
10x PROBE  
100 mV/DIV  
5.0 ns/DIV  
10x PROBE  
NOTE: Recommended to use a double sided PCB without any socket for rise/fall time measurements, using an input pulse with  
1.5 ns rise/fall time and an active probe with 1.7 pF capacitance loading.  
Figure 12. Single Sided PCB Layout  
(Component Side)  
Blank  
Clamp  
R In  
R7  
G VR1 G VR2 G VR3  
R Out  
G Out  
B Out  
R1  
R2  
J1  
J3  
IC2  
G In  
B In  
C6  
C1  
C7  
C2  
C8  
C3  
R6  
C13  
R5  
C4  
R5  
J5  
C12  
C17  
C16  
J2  
C14  
C15  
J4  
C11  
R4  
R3  
C8  
C10  
J6  
V
Gnd  
CC  
8.0 V  
R
G
B
FC  
In  
VR4  
OSD  
VR5  
Main  
OSD In  
Contrast Contrast  
NOTE: J = Jumper  
11  
MOTOROLA ANALOG IC DEVICE DATA  
MC13282A  
OUTLINE DIMENSIONS  
P SUFFIX  
PLASTIC PACKAGE  
CASE 724–03  
ISSUE D  
–A–  
NOTES:  
1. CHAMFERED CONTOUR OPTIONAL.  
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
3. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
24  
1
13  
12  
–B–  
4. CONTROLLING DIMENSION: INCH.  
INCHES  
MILLIMETERS  
L
DIM  
A
B
C
D
E
MIN  
MAX  
1.265  
0.270  
0.175  
0.020  
MIN  
31.25  
6.35  
3.69  
0.38  
MAX  
32.13  
6.85  
4.44  
0.51  
C
1.230  
0.250  
0.145  
0.015  
NOTE 1  
–T–  
SEATING  
PLANE  
K
0.050 BSC  
1.27 BSC  
F
G
J
K
L
M
N
0.040  
0.100 BSC  
0.007  
0.110  
0.300 BSC  
0.060  
1.02  
2.54 BSC  
0.18  
2.80  
7.62 BSC  
1.52  
N
M
E
0.012  
0.140  
0.30  
3.55  
G
J 24 PL  
F
M
M
0.25 (0.010)  
T B  
D 24 PL  
0.25 (0.010)  
0
15  
0.040  
0
0.51  
15  
1.01  
0.020  
M
M
T
A
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
How to reach us:  
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;  
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454  
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,  
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315  
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609  
INTERNET: http://Design–NET.com  
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
MC13282A/D  

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