MC14469PDS [MOTOROLA]
暂无描述;型号: | MC14469PDS |
厂家: | MOTOROLA |
描述: | 暂无描述 双倍数据速率 |
文件: | 总12页 (文件大小:119K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Order this document
by MC14469/D
SEMICONDUCTOR TECHNICAL DATA
CMOS
P SUFFIX
PLASTIC DIP
CASE 711
40
The MC14469 receives one or two 11–bit words in a serial data stream. One
of the incoming words contains the address and when the address matches, the
MC14469 then transmits information in two 11–bit word data streams. Each of
the transmitted words contains eight data bits, an even parity bit, and start and
stop bits.
1
FN SUFFIX
PLCC PACKAGE
CASE 777
The received word contains seven address bits with the address of the
MC14469 set on seven pins. Therefore, 2 or 128 units can be interconnected
44
7
1
in simplex or full–duplex data transmission. In addition to the address received,
seven command bits may be received for general–purpose data or control use.
The MC14469 finds application in transmitting data from remote analog–to–
digital converters, remote MPUs, or remote digital transducers to the master
computer or MPU.
ORDERING INFORMATION
MC14469P
Plastic DIP
MC14469FN
PLCC Package
•
•
•
•
Supply Voltage Range: 4.5 V to 18 V
Low Quiescent Current: 75 µA Maximum @ 5 V, 25°C
Guaranteed Data Rates to 4800 Baud @ 5 V, to 9600 Baud @ 12 V
Receive — Serial to Parallel
Transmit — Parallel to Parallel
•
•
•
•
Transmit and Receive Simultaneously in Full Duplex
Crystal or Resonator Operation for On–Chip Oscillator
See Application Note AN806A
Chip Complexity: 1200 FETs or 300 Equivalent Gates
PIN ASSIGNMENTS
P SUFFIX
FN SUFFIX
V
OSC1
OSC2
1
2
40
39
DD
C0
C1
C2
C3
C4
C5
RESET
A0
3
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
6
5
4
3
2
1 44 43 42 41 40
4
A2
A3
7
39
38
37
36
35
34
33
32
31
30
29
C4
A1
5
8
C5
A2
6
A4
9
C6
A3
7
A5
10
11
12
13
14
15
16
17
CS
VAP
NC
SEND
S0
A4
8
C6
CS
A6
A5
9
NC
ID0
ID1
ID2
ID3
ID4
A6
10
11
12
13
14
15
16
17
18
19
20
VAP
SEND
S0
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
RI
S1
S1
S2
S2
S3
18 19 20 21 22 23 24 25 26 27 28
S3
S4
S5
S6
NC = NO CONNECTION
S7
V
TRO
SS
Motorola, Inc. 1995
BLOCK DIAGRAM
RECEIVE
(A0 – A6)
(C0 – C6)
ADDRESS
COMMAND DATA
7
7
STROBE
ADDRESS CONTROL
AND DATA COMPARATOR
COMMAND
LATCHES
CLOCK
COMPARE
RVAL
7
RECEIVE
DATA
STATIC SHIFT REGISTER
(RI)
CLOCK
COMMAND
STROBE (CS)
RECEIVE
DATA
STROBE
TIMING AND CONTROL
AND PARITY CHECK
RECEIVE DATA
STROBE ENABLE
SEND ENABLE
LATCH (SEL)
VALID ADDRESS
PULSE (VAP)
TRANSMIT
(ID0 – ID7)
(S0 – S7)
INPUT DATA
STATUS
8
STATUS
LATCHES
8
STATUS STROBE
8
CLOCK
STATIC SHIFT REGISTER
LOAD
TRANSMIT
DATA (TRO)
OUTPUT
LOGIC
2
SELECT
SEND
CONTROL AND PARITY
GENERATOR
4
SEND ENABLE
STATUS
STROBE
DATA RATE CLOCK
RVAL
CLOCKS
DATA RATE CLOCK
OSC1
OSC2
CLOCK
GENERATOR
CLOCK
OSCILLATOR
RECEIVE DATA STROBE
RECEIVE DATA STROBE ENABLE
MC14469
MOTOROLA
2
MAXIMUM RATINGS (Voltages referenced to V
)
SS
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised that
normalprecautionsbetakentoavoidapplication
of any voltage higher than maximum rated
voltages to this high–impedance circuit. For
Rating
DC Supply Voltage
Symbol
Value
Unit
V
V
DD
– 0.5 to + 18
Input Voltage, All Inputs
V
in
– 0.5 to V
DD
+ 0.5
V
DC Current Drain per Pin
Operating Temperature Range
Storage Temperature Range
I
10
mA
°C
°C
proper operation it is recommended that V and
in
T
A
– 40 to + 85
V
be constrained to the range V
≤ (V or
SS in
out
V
) ≤ V
.
T
stg
– 65 to + 150
out DD
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V
SS
or V ).
DD
ELECTRICAL CHARACTERISTICS (Voltages referenced to V
)
SS
– 40°C
25°C
85°C
V
DD
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Output Voltage
V
V
OL
V
in
= V
DD
or 0
“0” Level
“1” Level
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
V
in
= 0 or V
DD
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
—
—
—
V
V
Input Voltage (Except OSC1)
V
IL
V
V
V
= 4.5 or 0.5 V
= 9.0 or 1.0 V
= 13.5 or 1.5 V
“0” Level
“1” Level
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
O
O
V
O
V
O
V
O
= 0.5 or 4.5 V
= 1.0 or 9.0 V
= 1.5 or 13.5 V
V
IH
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
—
—
—
3.5
7.0
11
—
—
—
V
Output Drive Current (Except OSC2)
I
mA
OH
V
V
V
V
= 2.5 V
= 4.6 V
= 9.5 V
= 13.5 V
Source
Sink
5.0
5.0
10
– 1.0
– 0.2
– 0.5
– 1.4
—
—
—
—
– 0.8
– 0.16
– 0.4
– 1.2
—
—
—
—
– 0.6
– 0.12
– 0.3
– 1.0
—
—
—
—
OH
OH
OH
OH
15
V
OL
V
OL
V
OL
= 0.4 V
= 0.5 V
= 1.5 V
I
5.0
10
15
0.52
1.3
3.6
—
—
—
0.44
1.1
3.0
—
—
—
0.36
0.9
2.4
—
—
—
mA
mA
OL
Output Drive Current (OSC2 Only)
I
OH
V
V
V
V
= 2.5 V
= 4.6 V
= 9.5 V
= 13.5 V
Source
Sink
5.0
5.0
10
– 0.19
– 0.04
– 0.09
– 0.29
—
—
—
—
– 0.16
– 0.035
– 0.08
– 0.27
—
—
—
—
– 0.13
– 0.03
– 0.06
– 0.2
—
—
—
—
OH
OH
OH
OH
15
V
OL
V
OL
V
OL
= 0.4 V
= 0.5 V
= 1.5 V
I
5.0
10
15
0.1
0.17
0.5
—
—
—
0.085
0.14
0.42
—
—
—
0.07
0.1
0.3
—
—
—
mA
OL
OSC Frequency*
f
4.5
12
0
0
400
800
0
0
365
730
0
0
310
620
kHz
OSC
Input Current
I
15
15
—
—
12
—
± 0.3
120
—
—
10
—
± 0.3
100
7.5
—
8.0
—
± 1.0
85
µA
µA
pF
µA
in
Pull–Up Current (A0 – A6, ID0 – ID7)
I
UP
Input Capacitance (V = 0)
in
C
—
in
Quiescent Current (Per Package)
I
5.0
10
15
—
—
—
75
150
300
—
—
—
75
150
300
—
—
—
565
1125
2250
DD
Supply Voltage
V
DD
—
+ 4.5
+ 18
+ 4.5
+ 18
+ 4.5
+ 18
V
* 310 kHz at 85°C guarantees 4800 baud; 620 kHz at 85°C guarantees 9600 baud.
MOTOROLA
MC14469
3
RECEIVE DATA (RI)
ADDRESS
COMMAND
ST
P
SP
ST
P
SP
MC14469
PIN DESIGNATION
ADDRESS
IDENTIFIER
(HIGH LOGIC LEVEL)
COMMAND
IDENTIFIER
(LOW LOGIC LEVEL)
C0 C1 C2 C3 C4 C5 C6
D0 D1 D2 D3 D4 D5 D6
A0 A1 A2 A3 A4 A5 A6
MC6850
PIN DESIGNATION D0 D1 D2 D3 D4 D5 D6
TRANSMIT DATA (TRO)
INPUT DATA
STATUS
ST
P
SP
ST
P
SP
MC14469
PIN DESIGNATION
ID0 ID1 ID2 ID3 ID4 ID5 ID6 ID7
S0 S1 S2 S3 S4 S5 S6 S7
D0 D1 D2 D3 D4 D5 D6 D7
MC6850
PIN DESIGNATION
D0 D1 D2 D3 D4 D5 D6 D7
ID0 to ID7 = MC14469 IDENTIFICATION CODE
S0 to S7 = MC14469 STATUS CODE
A0 to A6 = ADDRESS BITS
C0 to C6 = COMMAND BITS
D0 to D7 = ACIA BUS BITS
ST = START BIT
P = PARITY BIT
SP = STOP BIT
Figure 1. Data Format and Corresponding Data Position and Pins for MC14469 and MC6850
M
S
B
M
S
B
7
ADDRESS
COMMAND
S
P
S
P
0
1
2
3
4
5
6
0
1
2
3
4
5
6
7
S
T
S
T
X
X
X
X
X
X
X
P
P
X
X
X
X
X
X
X
RECEIVER INPUT (RI)
VALID ADDRESS PULSE
(VAP)
INTERNAL VALID
ADDRESS LATCH
(VAL)
INTERNAL SEND
ENABLE LATCH
(SEL)
COMMAND STROBE
OUTPUT (CS)
SEND INPUT
(SEND)
M
S
B
X
M
S
B
X
S
P
S
P
P
S
T
X X
X
2
X
3
X
4
X
5
X
6
P
S
T
X
0
X
1
X
2
X
3
X
4
X
5
X
6
TRANSMIT OUT
(TRO)
0
1
7
7
ID
STATUS
Figure 2. Typical Receive/Send Cycle
MC14469
MOTOROLA
4
VAP
PIN DESCRIPTIONS
Valid Address Pulse
A0 – A6
This is the output for the valid address pulse upon receipt
of a matched incoming address.
Address Inputs
These inputs are the address setting pins which contain
the address match for the received signal. Pins A0 – A6 have
on–chip pull–up resistors.
V
DD
Positive Power Supply
C0 – C6
Command Word
This pin is the package positive power supply connection.
This pin may range from + 4.5 V to + 18 V with respect to
These pins are the readout of the general–purpose com-
mand word which is the second word of the received signal.
V
.
SS
CS
V
SS
Command Strobe
Negative Power Supply
This is the output for the command strobe signifying a valid
set of command data (C0 – C6). The pulse width is one oscil-
lator cycle. For example, when a 307.2 kHz ceramic resona-
tor is used, the pulse width is approximately 3 µs.
This pin is the negative power supply connection. Normally
this pin is system ground.
OPERATING CHARACTERISTICS
ID0 – ID7
Input Data Pins
The receipt of a start bit on the receive input (RI) line
causes the receive clock to start at a frequency equal to that
of the oscillator divided by 64. All received data is strobed in
at the center of a receive clock period. The start bit is fol-
lowed by eight data bits. Seven of the bits are compared
against states of the address of the particular circuit (A0 –
A6). Address is latched 31 clock cycles after the end of the
start bit of the incoming address. The eighth bit signifies an
address word “1” or a command word “0”. Next, a parity bit is
received and checked by the internal logic for even parity.
Finally a stop bit is received. At the completion of the cycle if
the address matches, a valid address pulse (VAP) occurs.
Immediately following the address word, a command word is
received. It also contains a start bit, eight data bits, even par-
ity bit, and a stop bit. The eight data bits are composed of a
seven–bit command, and a “0” which indicates a command
word. At the end of the command word a command strobe
pulse (CS) occurs.
These pins contain the input data for the first eight bits of
data to be transmitted. Pins ID0 – ID7 have on–chip pull–up
resistors.
OSC1, OSC2
Oscillator Input and Oscillator Output
These pins are the oscillator input and output (see
Figure 3).
RESET
Reset
When this pin is pulled low for a minimum of 700 ns, the
circuit is reset and ready for operation.
RI
Receive Input
This is the receive input pin.
A positive transition on the send input initiates the transmit
sequence. Send must occur within seven bit times of CS.
Again the transmitted data is made up of two eleven–bit
words, i.e., address and command words. The data portion
of the first word is made up from input data inputs (ID0 –
ID7), and the data for the second word from second input
data (S0 – S7) inputs. The data on inputs ID0 – ID7 is latched
one clock before the falling edge of the start bit. The data on
inputs S0 – S7 is latched on the rising edge of the start bit.
The transmitted signal is the inversion of the received signal,
which allows the use of an inverting amplifier to drive the
lines. TRO begins either 1/2 or 1–1/2 bit times after send, de-
pending where send occurs.
S0 – S7
Second or Status Input Data
These pins contain the input data for the second eight bits
of data to be transmitted.
SEND
Send
This pin accepts the send command after receipt of an
address.
TRO
Transmit Register Output Signal
This pin transmits the outgoing signal. Note that it is in-
verted from the incoming signal. It must go through one
stage of inversion if it is to drive another MC14469.
The oscillator can be crystal controlled or ceramic reso-
nator controlled for required accuracy. OSC1 can be driven
from an external oscillator (see Figure 3).
MOTOROLA
MC14469
5
MC14469
INTERNAL
OSCILLATOR
V
DATA
OSC1
C1
OSC2
15 M
Ω
1.0 kΩ
DATA LINE
X1
GROUND LINE
C2
NOTE: For externally generated clock,
drive OSC1, float OSC2.
X1 = Ceramic Resonator: 307.2 kHz ± 1 kHz for 4800 baud rate.
C1 and C2 are sized per the ceramic resonator supplier’s
recommendation.
RI TRO
V
V
DD
1.0 µF
MC14469
Ceramic Resonator Suppliers:*
1. Morgan Matroc, Inc., Bedford, OH, 216/232–8600
2. Radio Materials Co., Attica, IN, 317/762–2491
SS
* Motorola cannot recommend one supplier over another and
in no way suggests that this is a complete listing of ceramic
resonator suppliers.
Figure 3. Oscillator Circuit
Figure 4. Rectified Power from Data Lines Circuit
C0
C1
C2
CHANNEL
SELECT
SELECT
CHANNEL,
START
CS
CONVERSION
END
CONVERSION
SEND
MC14469
ANALOG
INPUTS
S0
S1
S2
S3
S4
S5
S6
S7
DIGITAL
OUTPUTS
8–CHANNEL A/D
CONVERTER ASSEMBLY
Figure 5. A–D Converter Interface
MC14469
6
MOTOROLA
V+
1 k
10 k
TRO
10 k
V
10 k
V
10 k
V
RI
TRO
V
RI
TRO
V
RI
DD
TRO
V
RI
DD
TRO
V
DD
SS
SS
SS
SS
ID7
ID7
ID7
S7
S7
S7
MC14469
MC14469
127
MC6850
ACIA
OR
MC14469
1
0
A0,ID0
A1,ID1
A2,ID2
A3,ID3
A4,ID4
A5,ID5
A6,ID6
A1,ID1
A2,ID2
A3,ID3
A4,ID4
A5,ID5
A6,ID6
UART
ADDRESS
1111111
ADDRESS
0000001
CS
CS
SEND
CS
SEND
SEND
ADDRESS
0000000
REMOTE MC14469
STATIONS
MASTER
STATION
NOTE: For simplex operation the ID7 must be tied high, S7 must be tied
low, and the 7–bit ID must be the same as the 7–bit address (or set
to some unused address) to prevent erroneous responses.
Figure 6. Single Line, Simplex Data Transmission
V+
V
DD
1 k
1 k
10 k
TRO
10 k
10 k
10 k
RI
DD
TRO
V
RI
DD
TRO
RI
DD
TRO
V
TRO
V
RI
V
V
V
V
SS
SS
SS
SS
MC6850
ACIA
OR
MC14469
ADDRESS
0000001
MC14469
ADDRESS
0000000
ADDRESS
1111111
MC14469
127
0
1
A0
A1
A2
A3
A4
A5
A6
A1
A2
A3
A4
A5
A6
UART
VAP
SEND
VAP
SEND
VAP
SEND
MASTER
STATION
REMOTE MC14469 STATIONS
Figure 7. Double Line, Full Duplex Data Transmission
MOTOROLA
MC14469
7
RESET
CLEAR COMMAND LATCH
RESET SEL
RESET
RESET VAL
INITIALIZE
TRANSMITTER
INITIALIZE RECEIVER
N
Y
MSB
= 1?
N
N
SEND
=1?
Y
VAL
SET?
VAL
SET?
N
N
Y
N
Y
SEL
SET?
Y
N
SEL
SET?
COMMAND
VALID?
Y
RESET VAL
AND SEL
N
Y
LATCH
COMMAND
ADDRESS
VALID?
PREVIOUS
TRANSMISSION
COMPLETE?
N
ISSUE
CS
Y
SET
VAL
Y
LATCH
STATUS
ISSUE
VAP
TRANSMIT
ID
SET
SEL
TRANSMIT
STATUS
N
8 BIT
TIMES?
Y
RESET
SEL
Figure 8. Flow Chart of MC14469 Operation
MC14469
MOTOROLA
8
PACKAGE DIMENSIONS
P SUFFIX
PLASTIC DIP
CASE 711–03
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D), SHALL
BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL
CONDITION, IN RELATION TO SEATING PLANE
AND EACH OTHER.
40
21
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
B
MILLIMETERS
INCHES
1
20
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
51.69
13.72
3.94
0.36
1.02
MAX
52.45
14.22
5.08
0.56
1.52
MIN
MAX
2.065
0.560
0.200
0.022
0.060
2.035
0.540
0.155
0.014
0.040
L
A
C
N
2.54 BSC
0.100 BSC
1.65
0.20
2.92
15.24 BSC
0
2.16
0.38
3.43
0.065
0.008
0.115
0.600 BSC
0
0.085
0.015
0.135
J
K
SEATING
PLANE
M
H
G
F
D
15
1.02
15
0.040
0.51
0.020
MOTOROLA
MC14469
9
FN SUFFIX
PLCC PACKAGE
CASE 777–02
M
S
S
0.007(0.180)
T
L–M
N
B
D
–N–
Y BRK
M
S
S
0.007(0.180)
T
L–M
N
U
Z
–M–
–L–
V
X
G1
W
D
44
1
S
S
S
0.010 (0.25)
T
L–M
N
VIEW D–D
M
M
S
S
S
S
A
R
0.007(0.180)
0.007(0.180)
T
T
L–M
L–M
N
N
M
S
S
0.007(0.180)
T
L–M
N
H
Z
J
K1
C
E
0.004 (0.10)
G
K
SEATING
PLANE
–T–
G1
F
VIEW S
S
S
S
M
S
S
0.010 (0.25)
T
L–M
N
0.007(0.180)
T
L–M
N
VIEW S
NOTES:
1. DATUMS –L–, –M–, AND –N– ARE DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS
PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010
(0.25) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN
THE PACKAGE BOTTOM BY UP TO 0.012
(0.300). DIMENSIONS R AND U ARE
INCHES
MILLIMETERS
DIM
A
B
C
E
F
G
H
J
K
R
U
V
W
X
Y
Z
G1
K1
MIN
MAX
0.695
0.695
0.180
0.110
0.019
MIN
17.40
17.40
4.20
MAX
17.65
17.65
4.57
0.685
0.685
0.165
0.090
0.013
2.29
2.79
0.33
0.48
0.050 BSC
1.27 BSC
0.026
0.020
0.025
0.650
0.650
0.042
0.042
0.042
–––
0.032
–––
–––
0.656
0.656
0.048
0.048
0.056
0.020
10
0.66
0.51
0.64
16.51
16.51
1.07
1.07
1.07
–––
0.81
–––
–––
16.66
16.66
1.21
1.21
1.42
0.50
10
DETERMINED AT THE OUTERMOST
EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE
TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037
(0.940). THE DAMBAR INTRUSION(S) SHALL
NOT CAUSE THE H DIMENSION TO BE
SMALLER THAN 0.025 (0.635).
2
2
0.610
0.040
0.630
–––
15.50
1.02
16.00
–––
MC14469
10
MOTOROLA
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MOTOROLA
MC14469
11
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintendedor unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE: Motorola Literature Distribution;
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447
6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE (602) 244–6609
INTERNET: http://Design–NET.com
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
MC14469/D
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