MC14518BCP [MOTOROLA]
4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16, PLASTIC, DIP-16;
| 型号： | MC14518BCP |
| 厂家： | 
MOTOROLA |
| 描述： | 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16, PLASTIC, DIP-16 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
The MC14518B dual BCD counter and the MC14520B dual binary counter
are constructed with MOS P–channel and N–channel enhancement mode
devices in a single monolithic structure. Each consists of two identical,
independent, internally synchronous 4–stage counters. The counter stages
are type D flip–flops, with interchangeable Clock and Enable lines for
incrementing on either the positive–going or negative–going transition as
required when cascading multiple stages. Each counter can be cleared by
applying a high level on the Reset line. In addition, the MC14518B will count
out of all undefined states within two clock periods. These complementary
MOS up counters find primary use in multi–stage synchronous or ripple
counting applications requiring low power dissipation and/or high noise
immunity.
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
•
•
•
•
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Internal and External Speeds
Logic Edge–Clocked Design — Incremented on Positive Transition of
Clock or Negative Transition on Enable
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBDW
Plastic
Ceramic
SOIC
•
T
A
= – 55° to 125°C for all packages.
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
V
DD
– 0.5 to + 18.0
BLOCK DIAGRAM
V , V
Input or Output Voltage (DC or Transient)
0.5 to V
DD
+ 0.5
V
in out
CLOCK
1
I , I
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
Q0
3
4
5
6
Q1
C
2
Q2
P
D
Power Dissipation, per Package†
Storage Temperature
500
mW
C
ENABLE
Q3
R
T
stg
– 65 to + 150
260
T
L
Lead Temperature (8–Second Soldering)
C
7
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
CLOCK
9
11
12
13
14
Q0
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
Q1
C
10
Q2
ENABLE
Q3
R
TRUTH TABLE
Clock Enable Reset
Action
Increment Counter
Increment Counter
No Change
15
V
V
= PIN 16
= PIN 8
DD
SS
1
X
0
0
0
0
0
0
0
1
0
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V and V
to the range V
Unused inputs must always be tied to an
appropriatelogic voltage level (e.g., either V
or V ). Unused outputs must be left open.
DD
X
No Change
No Change
1
No Change
X
X
Q0 thru Q3 = 0
should be constrained
in
out
(V or V
X = Don’t Care
)
V
DD
.
SS
in out
SS
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
Typ #
125 C
V
Vdc
DD
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
V
IH
Vdc
(V = 0.5 or 4.5 Vdc)
O
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
(V
(V
(V
= 2.5 Vdc)
= 4.6 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
Source
Sink
5.0
5.0
10
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
OH
OH
OH
OH
15
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 1.5 Vdc)
I
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
OL
Input Current
I
15
—
—
—
± 0.1
—
—
±0.00001
± 0.1
—
—
± 1.0
µAdc
in
Input Capacitance
C
—
5.0
7.5
—
pF
in
(V = 0)
in
Quiescent Current
(Per Package)
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
µAdc
DD
Total Supply Current**†
I
T
5.0
10
15
I
T
I
T
I
T
= (0.6 µA/kHz) f + I
= (1.2 µA/kHz) f + I
= (1.7 µA/kHz) f + I
DD
DD
DD
(Dynamic plus Quiescent,
Per Package)
(C = 50 pF on all outputs, all
L
buffers switching)
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
†To calculate total supply current at loads other than 50 pF:
I (C ) = I (50 pF) + (C – 50) Vfk
T
L
T
L
where: I is in µA (per package), C in pF, V = (V
– V ) in volts, f in kHz is input frequency, and k = 0.002.
SS
T
L
DD
PIN ASSIGNMENT
C
E
1
2
16
15
V
R
A
DD
A
B
Q0
Q1
Q2
Q3
R
3
4
5
6
7
8
14
13
12
11
10
9
Q3
A
B
B
B
B
Q2
Q1
Q0
A
A
A
E
A
B
V
C
B
SS
MC14518B MC14520B
410
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
All Types
Typ #
Characteristic
Output Rise and Fall Time
Symbol
V
Unit
Min
Max
DD
t
t
,
ns
TLH
t
t
t
, t
= (1.5 ns/pF) C + 25 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH THL
L
THL
, t
= (0.75 ns/pF) C + 12.5 ns
L
TLH THL
, t
TLH THL
= (0.55 ns/pF) C + 9.5 ns
L
Propagation Delay Time
Clock to Q/Enable to Q
t
t
,
ns
ns
PLH
PHL
PHL
w(H)
t
t
t
, t
= (1.7 ns/pF) C + 215 ns
= (0.66 ns/pF) C + 97 ns
= (0.5 ns/pF) C + 75 ns
L
5.0
10
15
—
—
—
280
115
80
560
230
160
PLH PHL
L
L
, t
PLH PHL
, t
PLH PHL
Reset to Q
t
t
t
t
= (1.7 ns/pF) C + 265 ns
= (0.66 ns/pF) C + 117 ns
= (0.66 ns/pF) C + 95 ns
5.0
10
15
—
—
—
330
130
90
650
230
170
PHL
PHL
PHL
L
L
L
Clock Pulse Width
t
t
5.0
10
15
200
100
70
100
50
35
—
—
—
ns
MHz
µs
w(L)
Clock Pulse Frequency
Clock or Enable Rise and Fall Time
Enable Pulse Width
f
cl
5.0
10
15
—
—
—
2.5
6.0
8.0
1.5
3.0
4.0
t
, t
5.0
10
15
—
—
—
—
—
—
15
5
4
THL TLH
t
5.0
10
15
440
200
140
220
100
70
—
—
—
ns
WH(E)
Reset Pulse Width
t
5.0
10
15
280
120
90
125
55
40
—
—
—
ns
WH(R)
Reset Removal Time
t
5.0
10
15
– 5
15
20
– 45
– 15
– 5
—
—
—
ns
rem
* The formulas given are for the typical characteristics only at 25 C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
V
DD
0.01 µF
CERAMIC
500 µF
I
D
PULSE
GENERATOR
Q0
C
Q1
Q2
Q3
C
L
E
R
C
L
C
L
C
L
V
SS
20 ns
20 ns
90%
50%
10%
V
SS
VARIABLE
WIDTH
Figure 1. Power Dissipation Test Circuit and Waveform
MOTOROLA CMOS LOGIC DATA
MC14518B MC14520B
411
20 ns
20 ns
V
DD
V
V
DD
90%
50%
10%
CLOCK
INPUT
Q0
PULSE
GENERATOR
C
E
SS
t
t
WL
WH
Q1
Q2
Q3
t
t
PLH
PHL
C
L
90%
C
L
R
50%
10%
C
L
C
L
V
Q
SS
t
t
f
r
Figure 2. Switching Time Test Circuit and Waveforms
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
CLOCK
ENABLE
RESET
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
0
Q0
Q1
Q2
Q3
MC14518B
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2
3
4
Q0
Q1
Q2
Q3
MC14520B
Figure 3. Timing Diagram
MC14518B MC14520B
412
MOTOROLA CMOS LOGIC DATA
Q0
Q1
Q2
Q3
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
R
R
R
R
RESET
ENABLE
CLOCK
Figure 4. Decade Counter (MC14518B) Logic Diagram
(1/2 of Device Shown)
Q0
Q1
Q2
Q3
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
D
C
Q
Q
R
R
R
R
RESET
ENABLE
CLOCK
Figure 5. Binary Counter (MC14520B) Logic Diagram
(1/2 of Device Shown)
MOTOROLA CMOS LOGIC DATA
MC14518B MC14520B
413
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
–A–
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
16
1
9
8
–B–
C
L
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.785
0.295
0.200
0.020
MIN
19.05
6.10
–––
MAX
19.93
7.49
5.08
0.50
0.750
0.240
–––
–T–
SEATING
PLANE
0.015
0.39
K
N
E
0.050 BSC
1.27 BSC
F
0.055
0.065
1.40
1.65
G
H
K
L
M
N
0.100 BSC
2.54 BSC
M
E
0.008
0.125
0.015
0.170
0.21
3.18
0.38
4.31
F
J
16 PL
0.25 (0.010)
G
0.300 BSC
7.62 BSC
M
S
T
B
0
15
0
15
D 16 PL
0.25 (0.010)
0.020
0.040
0.51
1.01
M
S
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
–A–
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
16
1
9
8
B
S
INCHES
MILLIMETERS
DIM
A
B
C
D
F
MIN
MAX
0.770
0.270
0.175
0.021
0.70
MIN
18.80
6.35
3.69
0.39
1.02
MAX
19.55
6.85
4.44
0.53
1.77
F
0.740
0.250
0.145
0.015
0.040
C
L
SEATING
–T–
G
H
J
K
L
0.100 BSC
0.050 BSC
2.54 BSC
1.27 BSC
PLANE
K
M
0.008
0.015
0.130
0.305
10
0.21
0.38
3.30
7.74
10
H
J
0.110
0.295
0
2.80
7.50
0
G
D 16 PL
0.25 (0.010)
M
S
0.020
0.040
0.51
1.01
M
M
T
A
MC14518B MC14520B
414
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751G–02
ISSUE A
–A–
16
9
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
–B–
8X P
0.010 (0.25)
M
M
B
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
1
8
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
J
16X D
M
S
S
0.010 (0.25)
T
A
B
F
MILLIMETERS
INCHES
DIM
A
B
C
D
MIN
10.15
7.40
2.35
0.35
0.50
MAX
10.45
7.60
2.65
0.49
0.90
MIN
MAX
0.411
0.299
0.104
0.019
0.035
0.400
0.292
0.093
0.014
0.020
R X 45
C
F
G
J
K
M
P
R
1.27 BSC
0.050 BSC
–T–
0.25
0.10
0
0.32
0.25
7
0.010
0.004
0
0.012
0.009
7
M
SEATING
14X G
K
PLANE
10.05
0.25
10.55
0.75
0.395
0.010
0.415
0.029
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
are registered
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MC14518B/D
◊
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