MC54HC164JS [MOTOROLA]

Shift Register, 8-Bit, CMOS, CDIP14;
MC54HC164JS
型号: MC54HC164JS
厂家: MOTOROLA    MOTOROLA
描述:

Shift Register, 8-Bit, CMOS, CDIP14

移位寄存器
文件: 总7页 (文件大小:207K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SEMICONDUCTOR TECHNICAL DATA  
Do Not Use for New Designs  
High–Performance Silicon–Gate CMOS  
THIS DEVICE WILL BE SUPERCEDED  
BY MC54/74HC164A IN THE  
The MC54/74HC164 is identical in pinout to the LS164. The device inputs  
are compatible with standard CMOS outputs; with pullup resistors, they are  
compatible with LSTTL outputs.  
SECOND QUARTER OF 1996  
The MC54/74HC164 is an 8–bit, serial–input to parallel–output shift  
register. Two serial data inputs, A1 and A2, are provided so that one input  
may be used as a data enable. Data is entered on each rising edge of the  
clock. The active–low asynchronous Reset overrides the Clock and Serial  
Data inputs.  
J SUFFIX  
CERAMIC PACKAGE  
14  
CASE 632–08  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
N SUFFIX  
PLASTIC PACKAGE  
14  
CASE 646–06  
Low Input Current: 1 µA  
1
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
D SUFFIX  
SOIC PACKAGE  
CASE 751A–03  
14  
Chip Complexity: 244 FETs or 61 Equivalent Gates  
1
ORDERING INFORMATION  
LOGIC DIAGRAM  
MC54HCXXXJ  
MC74HCXXXN  
MC74HCXXXD  
Ceramic  
Plastic  
SOIC  
1
SERIAL  
DATA  
INPUTS  
3
4
A1  
A2  
Q
Q
A
B
C
D
E
F
DATA  
2
5
PIN ASSIGNMENT  
Q
Q
Q
Q
Q
Q
6
PARALLEL  
DATA  
OUTPUTS  
A1  
A2  
1
2
3
4
14  
13  
12  
11  
V
CC  
10  
11  
12  
13  
Q
Q
Q
Q
H
G
F
Q
A
Q
B
G
H
8
9
CLOCK  
RESET  
Q
Q
5
6
10  
9
C
E
RESET  
CLOCK  
D
GND  
7
8
PIN 14 = V  
CC  
PIN 7 = GND  
FUNCTION TABLE  
Inputs  
Reset Clock A1 A2  
Outputs  
Q  
H
Q
Q
B
A
L
H
H
H
X
X
X
H
D
X
X
D
H
L
L
L
No Change  
D
D
Q
Q
Q  
Q  
An  
An  
Gn  
Gn  
D = data input  
– Q = data shifted from the preceding  
Q
An  
Gn  
stage on a rising edge at the clock input.  
10/95  
REV 7  
Motorola, Inc. 1995  
MC54/74HC164  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
This device contains protection  
circuitry to guard against damage  
due to high static voltages or electric  
fields. However, precautions must  
be taken to avoid applications of any  
voltage higher than maximum rated  
voltages to this high–impedance cir-  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
– 0.5 to + 7.0  
CC  
V
– 1.5 to V  
+ 1.5  
V
in  
CC  
V
out  
– 0.5 to V  
+ 0.5  
V
CC  
I
± 20  
mA  
mA  
mA  
mW  
in  
cuit. For proper operation, V and  
in  
I
I
DC Output Current, per Pin  
± 25  
± 50  
out  
V
should be constrained to the  
out  
range GND (V or V  
)
V
CC  
.
DC Supply Current, V  
CC  
and GND Pins  
in out  
CC  
Unused inputs must always be  
tied to an appropriate logic voltage  
P
D
Power Dissipation in Still Air, Plastic or Ceramic DIP†  
SOIC Package†  
750  
500  
level (e.g., either GND or V ).  
CC  
Unused outputs must be left open.  
T
stg  
Storage Temperature  
– 65 to + 150  
C
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
(Ceramic DIP)  
260  
300  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C  
Ceramic DIP: – 10 mW/ C from 100 to 125 C  
SOIC Package: – 7 mW/ C from 65 to 125 C  
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
Unit  
V
V
CC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
6.0  
V , V  
in out  
V
CC  
V
T
A
– 55 + 125  
C
t , t  
r f  
Input Rise and Fall Time  
(Figure 1)  
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
0
0
0
1000  
500  
400  
ns  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Test Conditions  
Unit  
85 C  
125 C  
V
IH  
Minimum High–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
4.5  
6.0  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
V
out  
CC  
|I  
|
20 µA  
out  
V
Maximum Low–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
4.5  
6.0  
0.3  
0.9  
1.2  
0.3  
0.9  
1.2  
0.3  
0.9  
1.2  
V
V
IL  
out  
CC  
|I  
|
20 µA  
out  
V
OH  
Minimum High–Level Output  
Voltage  
V
= V or V  
IH IL  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
in  
|I  
|
20 µA  
out  
V
in  
= V or V  
|I  
|I  
|
|
4.0 mA  
5.2 mA  
4.5  
6.0  
3.98  
5.48  
3.84  
5.34  
3.70  
5.20  
IH IL out  
out  
V
OL  
Maximum Low–Level Output  
Voltage  
V
= V or V  
IH IL  
2.0  
4.5  
6.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
in  
|I  
|
20 µA  
out  
V
in  
= V or V  
|I  
|I  
|
|
4.0 mA  
5.2 mA  
4.5  
6.0  
0.26  
0.26  
0.33  
0.33  
0.40  
0.40  
IH IL out  
out  
I
Maximum Input Leakage Current  
V
V
= V  
= V  
or GND  
6.0  
6.0  
± 0.1  
± 1.0  
± 1.0  
µA  
µA  
in  
in  
CC  
I
Maximum Quiescent Supply  
Current (per Package)  
or GND  
8
80  
160  
CC  
in  
CC  
I
= 0 µA  
out  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
MOTOROLA  
3–2  
MC54/74HC164  
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)  
L
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
f
Maximum Clock Frequency (50% Duty Cycle)  
(Figures 1 and 4)  
2.0  
4.5  
6.0  
6.0  
30  
35  
4.8  
24  
28  
4.0  
20  
24  
MHz  
max  
t
t
,
Maximum Propagation Delay, Clock to Q  
(Figures 1 and 4)  
2.0  
4.5  
6.0  
175  
35  
30  
220  
44  
37  
265  
53  
45  
ns  
ns  
ns  
pF  
PLH  
PHL  
t
Maximum Propagation Delay, Reset to Q  
(Figures 2 and 4)  
2.0  
4.5  
6.0  
205  
41  
35  
255  
51  
43  
310  
62  
53  
PHL  
t
t
,
Maximum Output Transition Time, Any Output  
(Figures 1 and 4)  
2.0  
4.5  
6.0  
75  
15  
13  
95  
19  
16  
110  
22  
19  
TLH  
THL  
C
Maximum Input Capacitance  
10  
10  
10  
in  
NOTES:  
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
Typical @ 25°C, V  
= 5.0 V  
CC  
C
Power Dissipation Capacitance (Per Package)*  
pF  
140  
PD  
2
* Used to determine the no–load dynamic power consumption: P = C  
D
Motorola High–Speed CMOS Data Book (DL129/D).  
V
f + I  
V
. For load considerations, see Chapter 2 of the  
PD CC  
CC CC  
TIMING REQUIREMENTS (Input t = t = 6 ns)  
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
su  
Minimum Setup Time, A1 or A2 to Clock  
(Figure 3)  
2.0  
4.5  
6.0  
50  
10  
9
65  
13  
11  
75  
15  
13  
ns  
t
Minimum Hold Time, Clock to A1 or A2  
(Figure 3)  
2.0  
4.5  
6.0  
5
5
5
5
5
5
5
5
5
ns  
ns  
ns  
ns  
ns  
h
t
Minimum Recovery Time, Reset Inactive to Clock  
(Figure 2)  
2.0  
4.5  
6.0  
5
5
5
5
5
5
5
5
5
rec  
t
Minimum Pulse Width, Clock  
(Figure 1)  
2.0  
4.5  
6.0  
80  
16  
14  
100  
20  
17  
120  
24  
20  
w
w
t
Minimum Pulse Width, Reset  
(Figure 2)  
2.0  
4.5  
6.0  
80  
16  
14  
100  
20  
17  
120  
24  
20  
t , t  
r f  
Maximum Input Rise and Fall Times  
(Figure 1)  
2.0  
4.5  
6.0  
1000  
500  
400  
1000  
500  
400  
1000  
500  
400  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
3–3  
MOTOROLA  
MC54/74HC164  
PIN DESCRIPTIONS  
INPUTS  
register is completely static, allowing clock rates down to DC  
in a continuous or intermittent mode.  
A1, A2 (Pins 1, 2)  
OUTPUTS  
Serial Data Inputs. Data at these inputs determine the data  
to be entered into the first stage of the shift register. For a  
high level to be entered into the shift register, both A1 and A2  
inputs must be high, thereby allowing one input to be used as  
a data–enable input. When only one serial input is used, the  
Q
– Q (Pins 3, 4, 5, 6, 10, 11, 12, 13)  
H
Parallel Shift Register Outputs. The shifted data is pres-  
A
ented at these outputs in true, or noninverted, form.  
CONTROL INPUT  
Reset (Pin 9)  
other must be connected to V  
.
CC  
Clock (Pin 8)  
Active–Low, Asynchronous Reset Input. A low voltage ap-  
plied to this input resets all internal flip–flops and sets Out-  
puts Q – Q to the low level state.  
Shift Register Clock. A positive–going transition on this pin  
shifts the data at each stage to the next stage. The shift  
A
H
SWITCHING WAVEFORMS  
t
w
t
t
r
f
V
V
CC  
CC  
90%  
50%  
10%  
RESET  
50%  
CLOCK  
GND  
GND  
t
t
w
PHL  
1/f  
max  
Q
50%  
t
t
PHL  
PLH  
90%  
50%  
10%  
t
rec  
Q
V
CC  
CLOCK  
50%  
t
t
THL  
GND  
TLH  
Figure 2.  
Figure 1.  
TEST POINT  
OUTPUT  
VALID  
V
DEVICE  
UNDER  
TEST  
CC  
50%  
A1 OR A2  
C *  
L
GND  
t
t
h
su  
V
CC  
CLOCK  
50%  
GND  
* Includes all probe and jig capacitance  
Figure 3.  
Figure 4. Test Circuit  
MOTOROLA  
3–4  
MC54/74HC164  
EXPANDED LOGIC DIAGRAM  
8
CLOCK  
1
2
A1  
A2  
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
R
R
R
R
R
R
R
R
9
RESET  
3
4
5
6
10  
11  
12  
13  
Q
Q
Q
Q
Q
Q
Q
Q
H
A
B
C
D
E
F
G
TIMING DIAGRAM  
CLOCK  
A1  
A2  
RESET  
Q
A
Q
Q
Q
Q
B
C
D
E
Q
F
Q
G
Q
H
3–5  
MOTOROLA  
MC54/74HC164  
OUTLINE DIMENSIONS  
J SUFFIX  
CERAMIC DIP PACKAGE  
CASE 632–08  
-A-  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
ISSUE Y  
14  
1
8
7
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEAD WHEN  
FORMED PARALLEL.  
4. DIMESNION F MAY NARROW TO 0.76 (0.030)  
WHERE THE LEAD ENTERS THE CERAMIC  
BODY.  
-B-  
C
L
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
F
MIN  
MAX  
0.785  
0.280  
0.200  
0.020  
0.065  
MIN  
19.05  
6.23  
3.94  
0.39  
1.40  
MAX  
19.94  
7.11  
5.08  
0.50  
1.65  
0.750  
0.245  
0.155  
0.015  
0.055  
-T-  
SEATING  
PLANE  
K
G
J
K
L
M
N
0.100 BSC  
2.54 BSC  
0.008  
0.125  
0.015  
0.170  
0.21  
3.18  
0.38  
4.31  
M
F
G
N
D 14 PL  
0.25 (0.010)  
J 14 PL  
0.300 BSC  
15  
0.040  
7.62 BSC  
15  
0.51 1.01  
0°  
°
0°  
°
M
M
S
S
T
A
0.25 (0.010)  
T
B
0.020  
N SUFFIX  
PLASTIC DIP PACKAGE  
CASE 646–06  
NOTES:  
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE  
POSITION AT SEATING PLANE AT MAXIMUM  
MATERIAL CONDITION.  
ISSUE L  
14  
1
8
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
3. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
4. ROUNDED CORNERS OPTIONAL.  
B
7
INCHES  
MILLIMETERS  
A
DIM  
A
B
C
D
F
G
H
J
K
L
M
N
MIN  
MAX  
0.770  
0.260  
0.185  
0.021  
0.070  
MIN  
18.16  
6.10  
3.69  
0.38  
1.02  
MAX  
19.56  
6.60  
4.69  
0.53  
1.78  
0.715  
0.240  
0.145  
0.015  
0.040  
F
L
C
0.100 BSC  
2.54 BSC  
0.052  
0.008  
0.115  
0.095  
0.015  
0.135  
1.32  
0.20  
2.92  
2.41  
0.38  
3.43  
J
N
0.300 BSC  
7.62 BSC  
SEATING  
PLANE  
K
0
10  
0
10  
0.015  
0.039  
0.39  
1.01  
H
G
D
M
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751A–03  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
ISSUE F  
–A–  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
14  
1
8
P 7 PL  
–B–  
M
M
0.25 (0.010)  
B
7
MILLIMETERS  
INCHES  
G
F
R X 45°  
DIM  
A
B
C
D
F
G
J
MIN  
8.55  
3.80  
1.35  
0.35  
0.40  
MAX  
8.75  
4.00  
1.75  
0.49  
1.25  
MIN  
MAX  
0.344  
0.157  
0.068  
0.019  
0.049  
C
0.337  
0.150  
0.054  
0.014  
0.016  
J
M
SEATING  
PLANE  
K
D 14 PL  
0.25 (0.010)  
1.27 BSC  
0.050 BSC  
0.19  
0.10  
0.25  
0.25  
0.008  
0.004  
0.009  
0.009  
M
S
S
T
B
A
K
M
P
R
0
5.80  
0.25  
°
7
6.20  
0.50  
°
0
°
7°  
0.244  
0.019  
0.228  
0.010  
MOTOROLA  
3–6  
MC54/74HC164  
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,  
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different  
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does  
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in  
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of  
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such  
unintendedor unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless  
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.  
Motorola and  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.  
How to reach us:  
USA/EUROPE: Motorola Literature Distribution;  
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,  
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447  
6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315  
MFAX: RMFAX0@email.sps.mot.com –TOUCHTONE (602) 244–6609  
INTERNET: http://Design–NET.com  
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
CODELINE  
MC54/74HC164/D  

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D Flip-Flop, 4-Func, Positive Edge Triggered, CMOS, CDIP16
MOTOROLA

MC54HC173JS

D Flip-Flop, 4-Func, Positive Edge Triggered, CMOS, CDIP16
MOTOROLA

MC54HC173JS

D Flip-Flop
ROCHESTER