MC74ACT113D [MOTOROLA]

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP; 双JK负边沿触发触发器
MC74ACT113D
型号: MC74ACT113D
厂家: MOTOROLA    MOTOROLA
描述:

DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
双JK负边沿触发触发器

触发器
文件: 总6页 (文件大小:188K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DUAL JK NEGATIVE  
EDGE-TRIGGERED  
FLIP-FLOP  
The MC74AC113/74ACT113 consists of two high-speed completely independent  
transition clocked JK flip-flops. The clocking operation is independent of rise and fall  
times of the clock waveform. The JK design allows operation as a D flip-flop (refer to  
MC74AC74/74ACT74 data sheet) by connecting the J and K inputs together.  
Asynchronous Inputs:  
LOW input to S (Set) sets Q to HIGH level  
D
Set is independent of clock  
Outputs Source/Sink 24 mA  
• ′ACT113 Has TTL Compatible Inputs  
N SUFFIX  
CASE 646-06  
PLASTIC  
CONNECTION DIAGRAM  
V
CP  
K
J
S
Q
Q
CC  
2
2
2
D2  
10  
2
2
8
14  
13  
12  
11  
9
D SUFFIX  
CASE 751A-03  
PLASTIC  
J
Q
Q
S
D
CP  
K
K
J
Q
Q
CP  
S
D
LOGIC SYMBOL  
1
2
3
4
5
6
7
CP  
K
J
S
Q
Q
GND  
4
10  
1
1
1
D1  
1
1
S
S
D
D
MODE SELECT — TRUTH TABLE  
3
J
Q
Q
5
6
11  
J
Q
Q
9
Inputs  
Outputs  
1
2
CP  
K
13  
12  
CP  
K
Operating Mode  
S
D
J
K
Q
Q
8
Set  
Toggle  
Load “0” (Reset)  
Load “1” (Set)  
Hold  
L
X
h
l
h
l
X
h
h
l
H
q
L
H
q
L
q
H
L
q
H
H
H
H
V
= PIN 14  
CC  
GND = PIN 7  
l
H, h = HIGH Voltage Level  
L, l = LOW Voltage Level  
X = Don’t Care  
l, h (q) = Lower case letters indicate the state of the referenced input  
(oroutput) one set-up time prior to the HIGH to LOW clock transition.  
FACT DATA  
5-1  
MC74AC113 MC74ACT113  
LOGIC DIAGRAM (Each Flip-Flop)  
Q
Q
5(9)  
6(8)  
SET (S  
K
)
D
4(10)  
2(12)  
J
3(11)  
1(13)  
CLOCK (CP)  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
–0.5 to +7.0  
Unit  
V
V
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
CC  
–0.5 to V  
+0.5  
V
in  
CC  
V
out  
–0.5 to V  
+0.5  
V
CC  
I
I
I
±20  
mA  
mA  
mA  
°C  
in  
DC Output Sink/Source Current, per Pin  
±50  
±50  
out  
CC  
DC V  
or GND Current per Output Pin  
Storage Temperature  
CC  
T
stg  
–65 to +150  
* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended  
Operating Conditions.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
4.5  
0
Typ  
5.0  
5.0  
Max  
6.0  
Unit  
V
AC  
V
Supply Voltage  
CC  
ACT  
5.5  
V , V  
in out  
DC Input Voltage, Output Voltage (Ref. to GND)  
V
CC  
V
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
@ 3.0 V  
@ 4.5 V  
@ 5.5 V  
@ 4.5 V  
@ 5.5 V  
150  
40  
Input Rise and Fall Time (Note 1)  
AC Devices except Schmitt Inputs  
ns/V  
t , t  
r f  
25  
10  
Input Rise and Fall Time (Note 2)  
ACT Devices except Schmitt Inputs  
t , t  
r f  
ns/V  
8.0  
T
Junction Temperature (PDIP)  
Operating Ambient Temperature Range  
Output Current — High  
140  
85  
°C  
°C  
J
T
A
–40  
25  
I
I
–24  
24  
mA  
mA  
OH  
Output Current — Low  
OL  
1. V from 30% to 70% V ; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
in  
CC  
2. V from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.  
in  
FACT DATA  
5-2  
MC74AC113 MC74ACT113  
DC CHARACTERISTICS  
Symbol  
74AC  
= +25°C  
74AC  
T
A
=
V
(V)  
CC  
Parameter  
Unit  
Conditions  
T
A
–40°C to +85°C  
Typ  
Guaranteed Limits  
V
V
V
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
2.1  
3.15  
3.85  
2.1  
3.15  
3.85  
V
= 0.1 V  
– 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
or V  
CC  
= 0.1 V  
OUT  
3.0  
4.5  
5.5  
1.5  
2.25  
2.75  
0.9  
1.35  
1.65  
0.9  
1.35  
1.65  
V
Maximum Low Level  
Input Voltage  
IL  
or V  
– 0.1 V  
CC  
3.0  
4.5  
5.5  
2.99  
4.49  
5.49  
2.9  
4.4  
5.4  
2.9  
4.4  
5.4  
I
= –50 µA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IN IL IH  
3.0  
4.5  
5.5  
2.56  
3.86  
4.86  
2.46  
3.76  
4.76  
–12 mA  
–24 mA  
–24 mA  
V
V
I
OH  
V
OL  
3.0  
4.5  
5.5  
0.002  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
I = 50 µA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN IL  
IH  
3.0  
4.5  
5.5  
0.36  
0.36  
0.36  
0.44  
0.44  
0.44  
12 mA  
V
I
24 mA  
24 mA  
OL  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
µA  
V = V , GND  
I
CC  
I
I
I
5.5  
5.5  
75  
mA  
mA  
V
V
= 1.65 V Max  
†Minimum Dynamic  
Output Current  
OLD  
OHD  
CC  
OLD  
–75  
= 3.85 V Min  
OHD  
Maximum Quiescent  
Supply Current  
5.5  
4.0  
40  
µA  
V
IN  
= V  
CC  
or GND  
* All outputs loaded; thresholds on input associated with output under test.  
Maximum test duration 2.0 ms, one output loaded at a time.  
Note: I and I  
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V .  
IN CC  
CC  
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)  
74AC  
74AC  
T
= –40°C  
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
L
CC  
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
C
L
Min  
Typ  
Max  
Min  
Max  
3.3  
5.0  
145  
145  
125  
125  
Maximum Clock  
Frequency  
f
t
t
t
t
MHz  
ns  
3-3  
3-6  
3-6  
3-6  
3-6  
max  
3.3  
5.0  
14.5  
12.0  
16.0  
13.0  
Propagation Delay  
CP to Q or Q  
1.0  
1.0  
1.0  
1.0  
PLH  
PHL  
PLH  
PHL  
n
n
n
3.3  
5.0  
14.5  
12.5  
15.5  
13.0  
Propagation Delay  
CP to Q or Q  
1.0  
1.0  
1.0  
1.0  
ns  
n
n
n
3.3  
5.0  
10.0  
9.0  
11.0  
9.5  
Propagation Delay  
to Q  
1.0  
1.0  
1.0  
1.0  
ns  
S
Dn  
Propagation Delay  
to Q  
n
3.3  
5.0  
13.0  
11.0  
14.0  
11.5  
1.0  
1.0  
1.0  
1.0  
ns  
S
Dn  
n
* Voltage Range 3.3 V is 3.3 V ±0.3 V.  
Voltage Range 5.0 V is 5.0 V ±0.5 V.  
FACT DATA  
5-3  
MC74AC113 MC74ACT113  
AC OPERATING REQUIREMENTS  
74AC  
74AC  
T
= –40°C  
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
L
CC  
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
C
L
Typ  
Guaranteed Minimum  
Set-up Time, HIGH or LOW  
or K to CP  
3.3  
5.0  
6.5  
4.5  
7.5  
5.0  
t
t
t
t
t
ns  
ns  
ns  
ns  
ns  
3-9  
3-9  
3-6  
3-6  
3-9  
s
J
n
n
n
Hold Time, HIGH or LOW  
or K to CP  
3.3  
5.0  
0
0
0
0
h
J
n
n
n
Pulse Width  
Clock  
3.3  
5.0  
5.0  
4.0  
5.5  
4.5  
w
w
Pulse Width  
3.3  
5.0  
5.5  
5.0  
6.0  
5.5  
S
Dn  
Recovery TIme  
to CP  
3.3  
5.0  
0
0
0
0
rec  
S
Dn  
* Voltage Range 3.3 V is 3.3 V ±0.3 V.  
Voltage Range 5.0 V is 5.0 V ±0.5 V.  
DC CHARACTERISTICS  
74ACT  
= +25°C  
74ACT  
T
A
=
V
(V)  
CC  
Symbol  
Parameter  
Unit  
Conditions  
T
A
–40°C to +85°C  
Typ  
Guaranteed Limits  
V
V
V
4.5  
5.5  
1.5  
1.5  
2.0  
2.0  
2.0  
2.0  
V
= 0.1 V  
– 0.1 V  
Minimum High Level  
Input Voltage  
IH  
OUT  
V
V
V
or V  
CC  
= 0.1 V  
OUT  
4.5  
5.5  
1.5  
1.5  
0.8  
0.8  
0.8  
0.8  
V
Maximum Low Level  
Input Voltage  
IL  
or V  
– 0.1 V  
CC  
4.5  
5.5  
4.49  
5.49  
4.4  
5.4  
4.4  
5.4  
I
= –50 µA  
Minimum High Level  
Output Voltage  
OH  
OUT  
*V = V or V  
IN IL IH  
4.5  
5.5  
3.86  
4.86  
3.76  
4.76  
V
V
–24 mA  
–24 mA  
I
OH  
V
OL  
4.5  
5.5  
0.001  
0.001  
0.1  
0.1  
0.1  
0.1  
I = 50 µA  
OUT  
Maximum Low Level  
Output Voltage  
*V = V or V  
IN IL  
IH  
4.5  
5.5  
0.36  
0.36  
0.44  
0.44  
V
24 mA  
I
OL  
24 mA  
I
IN  
Maximum Input  
Leakage Current  
5.5  
±0.1  
±1.0  
µA  
V = V , GND  
I
CC  
I  
Additional Max. I /Input  
CC  
5.5  
5.5  
5.5  
0.6  
1.5  
75  
mA  
mA  
mA  
V = V  
I
– 2.1 V  
CCT  
CC  
I
V
= 1.65 V Max  
= 3.85 V Min  
OHD  
†Minimum Dynamic  
Output Current  
OLD  
OLD  
I
–75  
V
V
OHD  
CC  
I
Maximum Quiescent  
Supply Current  
5.5  
4.0  
40  
µA  
= V or GND  
CC  
IN  
* All outputs loaded; thresholds on input associated with output under test.  
Maximum test duration 2.0 ms, one output loaded at a time.  
FACT DATA  
5-4  
MC74AC113 MC74ACT113  
AC CHARACTERISTICS (For Figures and Waveforms — See Section 3)  
74ACT  
74ACT  
= –40°C  
T
A
T
C
= +25°C  
= 50 pF  
V
(V)  
*
Fig.  
No.  
A
CC  
Symbol  
Parameter  
to +85°C  
Unit  
L
C
= 50 pF  
L
Min  
Typ  
Max  
Min  
Max  
Maximum Clock  
Frequency  
f
t
t
t
t
5.0  
5.0  
5.0  
5.0  
5.0  
145  
125  
MHz  
ns  
3-3  
3-6  
3-6  
3-6  
3-6  
max  
Propagation Delay  
1.0  
1.0  
1.0  
1.0  
14.0  
13.5  
11.5  
13.0  
1.0  
1.0  
1.0  
1.0  
15.5  
15.0  
12.5  
14.0  
PLH  
PHL  
PLH  
PHL  
CP to Q or Q  
n
n
n
Propagation Delay  
CP to Q or Q  
ns  
n
n
n
Propagation Delay  
to Q  
ns  
S
Dn  
Propagation Delay  
to Q  
n
ns  
S
Dn  
n
* Voltage Range 5.0 V is 5.0 V ±0.5 V.  
AC OPERATING REQUIREMENTS  
74ACT  
74ACT  
= –40°C  
T
A
T
C
= +25°C  
= 50 pF  
V
CC  
(V)  
*
Fig.  
No.  
A
Symbol  
Parameter  
to +85°C  
= 50 pF  
Unit  
L
C
L
Typ  
Guaranteed Minimum  
Set-up Time, HIGH or LOW  
or K to CP  
t
t
t
t
t
5.0  
5.0  
5.0  
5.0  
5.0  
2.0  
2.0  
5.0  
5.5  
0
2.5  
2.0  
6.0  
6.0  
0
ns  
ns  
ns  
ns  
ns  
3-9  
3-9  
3-6  
3-6  
3-9  
s
J
n
n
n
Hold Time, HIGH or LOW  
or K to CP  
h
J
n
n
n
Pulse Width  
Clock  
w
w
Pulse Width  
S
Dn  
Recovery TIme  
to CP  
rec  
S
Dn  
* Voltage Range 5.0 V is 5.0 V ±0.5 V.  
CAPACITANCE  
Symbol  
Value  
Typ  
Parameter  
Unit  
Test Conditions  
C
C
Input Capacitance  
Power Dissipation Capacitance  
4.5  
35  
pF  
pF  
V
V
= 5.0 V  
= 5.0 V  
IN  
CC  
PD  
CC  
FACT DATA  
5-5  
MC74AC113 MC74ACT113  
OUTLINE DIMENSIONS  
N SUFFIX  
PLASTIC DIP PACKAGE  
CASE 646–06  
NOTES:  
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE  
ISSUE L  
POSITION AT SEATING PLANE AT MAXIMUM  
14  
1
8
7
MATERIAL CONDITION.  
2. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
3. DIMENSION B DOES NOT INCLUDE MOLD  
FLASH.  
4. ROUNDED CORNERS OPTIONAL.  
B
INCHES  
MILLIMETERS  
A
F
DIM  
A
B
C
D
F
G
H
J
K
L
M
N
MIN  
MAX  
0.770  
0.260  
0.185  
0.021  
0.070  
MIN  
18.16  
6.10  
3.69  
0.38  
1.02  
MAX  
19.56  
6.60  
4.69  
0.53  
1.78  
0.715  
0.240  
0.145  
0.015  
0.040  
L
C
0.100 BSC  
2.54 BSC  
0.052  
0.008  
0.115  
0.095  
0.015  
0.135  
1.32  
0.20  
2.92  
2.41  
0.38  
3.43  
J
N
0.300 BSC  
7.62 BSC  
SEATING  
PLANE  
K
0
10  
0
10  
0.015  
0.039  
0.39  
1.01  
H
G
D
M
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751A–03  
NOTES:  
ISSUE F  
1. DIMENSIONING AND TOLERANCING PER  
ANSI Y14.5M, 1982.  
–A–  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
14  
1
8
–B–  
P 7 PL  
M
M
0.25 (0.010)  
B
7
MILLIMETERS  
INCHES  
G
DIM  
A
B
C
D
F
G
J
K
M
P
MIN  
8.55  
3.80  
1.35  
0.35  
0.40  
MAX  
8.75  
4.00  
1.75  
0.49  
1.25  
MIN  
MAX  
0.344  
0.157  
0.068  
0.019  
0.049  
F
R X 45  
C
0.337  
0.150  
0.054  
0.014  
0.016  
–T–  
SEATING  
PLANE  
J
M
1.27 BSC  
0.050 BSC  
K
D 14 PL  
0.19  
0.10  
0
0.25  
0.25  
7
0.008  
0.004  
0
0.009  
0.009  
7
M
S
S
0.25 (0.010)  
T
B
A
5.80  
0.25  
6.20  
0.50  
0.228  
0.010  
0.244  
0.019  
R
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different  
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MC74AC113/D  

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ONSEMI

MC74ACT11D

ACT SERIES, TRIPLE 3-INPUT AND GATE, PDSO14, SOIC-14
ROCHESTER

MC74ACT11DC

AND Gate, ACT Series, 3-Func, 3-Input, CMOS, PDSO14, PLASTIC, SOIC-14
MOTOROLA

MC74ACT11DCR1

AND Gate, ACT Series, 3-Func, 3-Input, CMOS, PDSO14, PLASTIC, SOIC-14
MOTOROLA

MC74ACT11DR2

Triple 3−Input AND Gate
ONSEMI

MC74ACT11DR2G

Triple 3−Input AND Gate
ONSEMI

MC74ACT11DT

ACT SERIES, TRIPLE 3-INPUT AND GATE, PDSO14, PLASTIC, TSSOP-14
ONSEMI

MC74ACT11DTR2

ACT SERIES, TRIPLE 3-INPUT AND GATE, PDSO14, PLASTIC, TSSOP-14
ONSEMI

MC74ACT11M

ACT SERIES, TRIPLE 3-INPUT AND GATE, PDSO14, PLASTIC, EIAJ-14
ONSEMI