MCM69D536TQ6R [MOTOROLA]
32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM; 32K ×36位同步双I / O,双SRAM地址型号: | MCM69D536TQ6R |
厂家: | MOTOROLA |
描述: | 32K x 36 Bit Synchronous Dual I/O, Dual Address SRAM |
文件: | 总14页 (文件大小:216K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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by MCM69D536/D
SEMICONDUCTOR TECHNICAL DATA
MCM69D536
32K x 36 Bit Synchronous
Dual I/O, Dual Address SRAM
TheMCM69D536isa1M–bitstaticrandomaccessmemory, organizedas32K
words of 36 bits. It features common data input and data output buffers and
incorporates input and output registers on–board with high speed SRAM.
The MCM69D536 allows the user to concurrently perform reads, writes, or
pass–throughcyclesincombinationonthetwodataports. Thetwoaddressports
(AX, AY) determine the read or write locations for their respective data ports
(DQX, DQY).
The synchronous design allows for precise cycle control with the use of an
external single clock (K). All signal pins except output enables (GX, GY) are
registered on the rising edge of clock (K).
TQ PACKAGE
176 LEAD TQFP
CASE 1101–01
The pass–through feature allows data to be passed from one port to the other,
in either direction. The PTX input must be asserted to pass data from port X to
port Y. The PTY will likewise pass data from port Y to port X. A pass–through
operation takes precedence over a read operation.
For the case when AX and AY are the same, certain protocols are followed. If
both ports are read, the reads occur normally. If one port is written and the other
is read, the read from the array will occur before the data is written. If both ports
are written, only the data on DQY will be written to the array.
•
•
•
•
•
Single 3.3 V ± 5% Power Supply
Fast Access Times: 6/8 ns Max
Throughput of 2.98 Gigabits/Second
Single Clock Operation
Address, Data Input, E1, E2, PTX, PTY, WX, WY, and Data Output
Registers On–Chip
•
•
•
•
•
•
•
•
•
83 MHz Maximum Clock Frequency
Self–Timed Write
Two Bi–Directional Data Buses
Can be Configured as Separate I/O
Pass–Through Feature
Asynchronous Output Enables (GX, GY)
LVTTL Compatible I/O
Concurrent Reads and Writes
176–Pin TQFP Package
Suggested Applications
— ATM
— Ethernet Switches — Routers
— Cell/Frame Buffers — SNA Switches
— Shared Memory
Product Family Configurations
Part
Number
Dual
Address
Single
Address
Dual
I/O
Separate
I/O
Configuration
32K x 36
V
DD
MCM69D536
MCM69D618
MCM67Q709A
Note 1
Note 1
Note 2
Note 2
3.3 V
3.3 V
5.0 V
5.0 V
64K x 18
128K x 9
MCM67Q909
NOTES:
512K x 9
1. Tie AX and AY address ports together for the part to function as a single address part.
2. Tie GX high for DQX to be inputs and tie WY high and GY low for DQY to be outputs.
REV 4
1/16/98
Motorola, Inc. 1998
BLOCK DIAGRAM
15
15
ADDRESS
REGISTER
ADDRESS
REGISTER
AX
AY
32K x 36 ARRAY
WRITE X
REGISTER
WRITE Y
REGISTER
WX
WRITE
DRIVER
SENSE
AMPS
SENSE
AMPS
WRITE
DRIVER
WY
PTX
REGISTER
PTY
REGISTER
PTX
PTY
PASS–THROUGH
DATA IN
REGISTER
OUTPUT
REGISTER
OUTPUT
REGISTER
DATA IN
REGISTER
K
K
ENABLE
REG 1
E1
E2
ENABLE
REG 2
DQX
DQY
GX
GY
MCM69D536
2
MOTOROLA FAST SRAM
PIN ASSIGNMENT
V
132
131
130
129
128
127
126
125
SSi
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
V
SSi
DQX20
DQY20
V
DQX15
DQY15
V
DD
SS
SS
V
V
DD
DQX14
DQY14
DQX21
DQY21
DQX22
DQY22
V
V
DQX23
DQY23
DQX24
DQY24
V
V
DQX13
DQY13
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
DD
SS
V
V
SS
DD
DQX12
DQY12
DQX11
DQY11
V
DD
SS
SS
V
DD
DQX10
DQY10
DQX9
DQX25
DQY25
DQX26
DQY26
V
V
DQY27
DQX27
DQY28
DQX28
V
V
DQY29
DQX29
DQY30
DQX30
V
DQY9
V
DD
DD
SS
SS
V
DQY8
DQX8
DQY7
DQX7
108
107
106
105
104
V
DD
SS
SS
V
DD
DQY6
103
30
31
102
101
100
99
98
97
96
95
DQX6
DQY5
DQX5
32
33
34
35
36
37
38
39
40
41
V
DD
SS
SS
V
V
DD
DQY4
DQX4
DQY3
DQX3
DQY31
DQX31
DQY32
DQX32
V
94
93
92
V
DD
SS
SS
V
V
DD
91
90
89
DQY2
DQX2
DQY33
DQX33
42
43
44
V
V
SSi
SSi
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 6162 63 64 65
6768 69 70 71 7273 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
66
MCM69D536
3
MOTOROLA FAST SRAM
PIN DESCRIPTIONS
Pin Locations
Symbol
Type
Description
65, 63, 61, 59, 57, 55, 169, 167,
145, 143, 68, 70, 72, 74, 76
AX0 –
AX14
Input
Address Port X. Never allow floating addresses for inputs AX0 – AX14.
A pullup resistor is needed.
64, 62, 60, 58, 56, 54, 168, 166,
144, 142, 69, 71, 73, 75, 77
AY0 –
AY14
Input
I/O
Address Port Y. Never allow floating addresses for inputs AY0 – AY14.
A pullup resistor is needed.
82, 86, 90, 94, 96, 100, 102, 106, 108,
113. 115, 119, 121, 125, 127, 131,
135, 139, 170, 174, 2, 6, 8, 12, 14, 18,
20, 25, 27, 31, 33, 37, 39, 43, 47, 51
DQX0 –
DQX35
Data Input/Output Port X.
Data Input/Output Port Y.
83, 87, 91, 95, 97, 101, 103, 107, 109,
112, 114, 118, 120, 124, 126, 130, 134,
138, 171, 175, 3, 7, 9, 13, 15, 19, 21,
24, 26, 30, 32, 36, 38, 42, 46, 50
DQY0 –
DQY35
I/O
150
151
152
E1
E2
GX
Input
Input
Input
Synchronous Chip Enable: Active low.
Synchronous Chip Enable: Active high.
Asynchronous Output Enable Port X Input:
Low — enables output buffers (DQXx pins).
High — DQXx pins are high impedance.
153
156
GY
K
Input
Input
Asynchronous Output Enable Port Y Input:
Low — enables output buffers (DQYx pins).
High — DQYx pins are high impedance.
Clock: This signal registers the address, data in, and all control signals
except G.
146
147
148
149
PTX
PTY
WX
Input
Input
Input
Input
Pass–Through Port X.
Pass–Through Port Y.
Synchronous Write Enable Port X.
Synchronous Write Enable Port Y.
WY
4, 10, 16, 22, 28, 34, 40, 49,
67, 84, 92, 98, 104, 110,
V
DD
Supply + 3.3 V Power Supply.
116, 122, 128, 137, 155, 172
5, 11, 17, 23, 29, 35, 41, 48,
66, 85, 93, 99, 105, 111,
V
SS
Supply Ground.
117, 123. 129, 136, 154, 173
1, 44, 45, 52, 53, 88,
89, 132, 133, 165, 176
V
Input
—
Bonded to die flag. No chip current flows through these pins.
SSi
78– 81, 140, 141, 157 – 164
NC
No Connection: There is no connection to the chip.
MCM69D536
4
MOTOROLA FAST SRAM
TRUTH TABLE (See Notes 1 through 5)
Input at t Clock
n
E1
H
X
L
E2
X
WX
X
WY
X
PTX
X
PTY
X
Operation
Deselected
Operation Number
1
2
3
4
5
6
7
8
L
X
X
X
X
Deselected
H
H
H
H
H
H
0
X
X
X
Write X Port
L
X
0
X
X
Write Y Port
L
X
X
0
X
Pass–Through X to Y
Pass–Through Y to X
Read X
L
X
X
X
0
L
1
X
1
1
L
X
1
1
1
Read Y
NOTES:
1. GX/GY must be controlled to avoid bus contention issues during write and pass–through cycles.
2. Operation numbers 3 – 6 can be used in any combination.
3. Operation numbers 4 and 7, 3 and 8, 7 and 8 can be combined.
4. Operation number 5 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.
5. Operation number 6 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.
t
t
n + 1
n
K
VALID
ADDRESS & CONTROL
PIPELINED READ ACCESS
VALID
DATA INPUT D
PASS–THROUGH
DATA OUTPUT Q
VALID
ABSOLUTE MAXIMUM RATINGS (See Note)
This is a synchronous device. All synchro-
Rating
Power Supply Voltage
Voltage Relative to V
Symbol
Value
Unit
V
nousinputsmustmeetspecifiedsetupandhold
times with stable logic levels for ALL rising
edges of clock (K) while the device is selected.
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to these high–impedance
circuits.
V
DD
– 0.5 to + 4.6
for Any Pin
V , V
in out
– 0.5 to V
DD
+ 0.5
V
SS
Except V
DD
Output Current
I
± 20
TBD
mA
W
out
Power Dissipation
P
D
Temperature Under Bias
Operating Temperature
T
bias
– 10 to + 85
0 to + 70
°C
°C
°C
T
A
Storage Temperature — Plastic
T
stg
– 55 to + 125
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
MCM69D536
5
MOTOROLA FAST SRAM
PACKAGE THERMAL CHARACTERISTICS (See Note 1)
Rating
Symbol
TQFP
Unit
Notes
Junction to Ambient (@ 200 lfm)
Single–Layer Board
Four–Layer Board
R
40
35
°C/W
2
θJA
Junction to Board (Bottom)
Junction to Case (Top)
NOTES:
R
R
23
9
°C/W
°C/W
3
4
θJB
θJC
1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, board population, and board thermal resistance.
2. Per SEMI G38–87.
3. Indicates the average thermal resistance between the die and the printed circuit board.
4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883 Method 1012.1).
DC OPERATING CONDITIONS AND CHARACTERISTICS
(V
= 3.3 V ± 5%, T = 0 to + 70°C, Unless Otherwise Noted)
DD
A
RECOMMENDED OPERATING CONDITIONS AND SUPPLY CURRENTS
Parameter
Supply Voltage (Operating Voltage Range)
Input High Voltage
Symbol
Min
3.135
2.0
Max
Unit
V
V
DD
3.465
V
IH
V
+ 0.5**
V
DD
Input Low Voltage
V
– 0.5*
—
0.8
V
IL
Input Leakage Current (All Inputs, V = 0 to V
)
I
± 1.0
± 1.0
µA
µA
mA
in
DD
lkg(I)
Output Leakage Current (E = V , V
IH out
= 0 to V
)
I
—
DD
lkg(O)
AC Supply Current (I
= 0 mA) (V
= max, f = f
)
MCM69D536–6 ns
MCM69D536–8 ns
I
DDA
—
—
300
300
out
DD
max
CMOS Standby Supply Current (Deselected, Clock (K)
Cycle Time ≥ t
MCM69D536–6 ns
, All Inputs Toggling at CMOS Levels MCM69D536–8 ns
I
—
—
100
100
mA
SB1
KHKH
+ 0.2 V or ≥ V
V
≤ V
– 0.2 V)
in
SS
DD
= + 8.0 mA)
Output Low Voltage (I
OL
Output High Voltage (I
V
—
0.4
V
V
OL
= – 4.0 mA)
V
2.4
V
DD
OH
OH
*V ≥ – 1.5 V for t ≤ t
/2.
KHKH
IL
**V ≤ V
+ 1.0 V for t ≤ t
/2.
IH
DD
KHKH
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, T = 0 to 70°C, Periodically Sampled Rather Than 100% Tested)
A
Parameter
Symbol
Max
Unit
pF
Address and Data Input Capacitance
Control Pin Input Capacitance
Output Capacitance
C
C
6
6
8
in
in
pF
C
pF
out
MCM69D536
6
MOTOROLA FAST SRAM
AC OPERATING CONDITIONS AND CHARACTERISTICS
(V
= 3.3 V ± 5%, T = 0 to + 70°C, Unless Otherwise Noted)
DD
A
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ns
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
READ/WRITE CYCLE TIMING (See Notes 1, 2, and 3)
MCM69D536–6
MCM69D536–8
Parameter
Symbol
Min
12
—
4
Max
—
6
Min
15
—
6
Max
—
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Cycle Time
t
1
KHKH
Clock Access Time
t
KHQV
Clock Low Pulse Width
t
—
—
—
—
5
—
—
—
—
5
KLKH
Clock High Pulse Width
t
4
6
KHKL
Clock High to Data Output Active
Clock High to Data Output Invalid
Clock High to Data Output High–Z
Output Enable Low to Data Output Valid
Output Enable Low to Data Output Low–Z
Output Enable High to Data Output High–Z
t
t
0
0
KHQX1
2
2
KHQX2
t
t
t
—
—
0
—
—
0
2
KHQZ
GLQV
GLQX
GHQZ
6
8
—
—
8
t
—
2.5
5
—
3
2
3
Setup Times:
Hold Times:
NOTES:
AWR0 – AWR14
ARD0 – ARD14
t
—
—
AVKH
AVKH
WVKH
t
t
W
PT
E1, E2
D0 – D35
t
PTVKH
t
t
EVKH
DVKH
AWR0 – AWR14
ARD0 – ARD14
W
t
t
0.5
—
1
—
ns
3
3
3
3
3
KHAX
KHAX
t
KHWX
PT
E1, E2
D0 – D35
t
KHPTX
KHEX
KHDX
t
t
3, 4
1. All read and write cycles are referenced from K.
2. This parameter is sampled and not 100% tested.
3. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for ALL rising
edges of clock (K) while the device is selected.
4. t
clock edge.
minimum for Port Y only extends to 4.0 ns only for the special case when the Y– and X–address are identical on the same rising
KHDX
R
= 50 Ω
L
OUTPUT
Z
= 50 Ω
0
V
= 1.5 V
L
Figure 1. AC Test Load
MCM69D536
7
MOTOROLA FAST SRAM
READ CYCLE TIMING FROM BOTH PORTS (WX, WY, PTX, PTY HIGH)
t
KHKH
t
t
KHKL
KLKH
K
t
AVKH
t
KHAX
1
2
3
4
5
6
7
8
9
AX
GX
PORT X
t
GLQV
t
KHQV
t
GHQZ
t
KHQX1
Q(1)
Q(2)
Q(3)
Q(5)
Q(6)
Q(7)
DQX
t
GLQX
t
EVKH
E
t
KHEX
12
13
14
15
16
6
7
19
20
AY
GY
PORT Y
t
KHQZ
Q(12)
Q(13)
Q(14)
Q(16)
Q(6)
Q(7)
DQY
t
KHQV
NOTE: E Low = E1 Low and E2 High. E High = E1 High or E2 Low.
MCM69D536
8
MOTOROLA FAST SRAM
WRITE CYCLE TIMING TO BOTH PORTS (PTX, PTY HIGH)
t
t
t
KHKL
KHKH
KLKH
K
1
2
3
4
5
6
7
8
9
AX
t
KHWX
t
WVKH
WX
PORT X
GX
t
t
KHDX
DVKH
D(2)
D(3)
D(4)
D(8)
D(9)
DQX
E
12
13
14
5
6
18
19
20
AY
15
WY
PORT Y
GY
D(14)
D(15)
D(5)
D(6)
D(18)
D(19)
DQY
PORT Y TAKES PRECEDENCE
OVER PORT X WHEN AX = AY
AND WRITING BOTH PORTS.
NOTE: E Low = E1 Low and E2 High. E High = E1 High or E2 Low.
MCM69D536
9
MOTOROLA FAST SRAM
WRITE TO PORT X AND PASS–THROUGH TO PORT Y (SEE NOTE)
t
t
t
KHKL
KHKH
KLKH
K
AX
1
2
3
4
5
6
7
8
9
WX
PORT X
GX
t
t
PTVKH
KHPTX
PTX
t
t
DVKH
KHDX
D(2)
D(3)
D(X)
D(Y)
D(6)
DQX
E
12
13
14
16
17
18
19
20
AY
15
WY
GY
PORT Y
PTY
t
KHQV
t
KHQZ
t
KHQX2
D(3)
D(X)
D(17)
DQY
D(Y)
E Low = E1 Low and E2 High. E High = E1 High or E2 Low.
NOTE: The timing diagram is valid for the opposite case as well, i.e., writing to Port Y and passing through to Port X.
MCM69D536
10
MOTOROLA FAST SRAM
COMBINATION READ/WRITE WITH SAME ADDRESS ON EACH PORT
t
t
t
KHKL
KHKH
KLKH
K
TRY TO
WRITE
TRY TO
WRITE
READ
1
READ
READ
READ
2
READ
READ
3
1
2
AX
WX
GX
PORT X
D(ABC)
D(DEF)
Q(PQR)
Q(XYZ)
Q(JKL)
DQX
READ
1
READ
READ
WRITE
2
READ
READ
3
WRITE
1
WRITE
2
AY
WY
GY
PORT Y
D(PQR)
D(XYZ)
Q(PQR)
D(JKL)
Q(JKL)
DQY
PORT Y TAKES PRECEDENCE
OVER PORT X WHEN AX = AY
AND WRITING BOTH PORTS.
PTX = PTY = high.
D(Value) = Value is the input to the data port.
Q(Value) = Value is the output from the data port.
MCM69D536
11
MOTOROLA FAST SRAM
ORDERING INFORMATION
(Order by Full Part Number)
MCM 69D536 XX XX
X
Motorola Memory Prefix
Part Number
Shipping Method (R = Tape and Reel,
Blank = Rails)
Speed (6 = 6ns, 8 = 8 ns)
Package (TQ = TQFP)
Full Part Numbers — MCM69D536TQ6
MCM69D536TQ8
MCM69D536TQ6R MCM69D536TQ8R
MCM69D536
12
MOTOROLA FAST SRAM
PACKAGE DIMENSIONS
TQFP PACKAGE
176 LEAD
CASE 1101–01
G
P
4X
0.20
H
L–M
N
4X 44 TIPS
0.20 T L–M N
C
C
PIN 1
IDENT
L
L
176
133
AB
AB
–X–
X=L, M, N
1
132
VIEW Y
3X VIEW Y
–M–
F
PLATING
BASE
METAL
B
C
L
V
–L–
U
J
V1
B1
D
M
S
S
0.08
T
L–M
N
44
89
SECTION AB–AB
45
88
ROTATED 90 CLOCKWISE
–N–
NOTES:
A1
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
S1
3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS
COINCIDENT WITH THE LEAD WHERE THE THE LEAD EXITS THE
PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE.
4. DATUMS –L–, –M–, AND –N– TO BE DETERMINED AT DATUM PLANE
–H–.
A
S
5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –T–.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A
AND B DO INLCUDE MOLD MISMATCH AND ARE DETERMINED AT
DATUM PLANE –H–.
VIEW AA
C
7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR
PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.35
(0.014) MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT
LEAD 0.07 (0.003).
–H–
–T–
SEATING
PLANE
4X
2
0.08
T
MILLIMETERS
DIM
A
MIN
24.00 BSC
MAX
A1
B
B1
C
C1
C2
D
12.00 BSC
24.00 BSC
12.00 BSC
–––
0.05
1.35
0.17
0.45
0.17
1.60
S
0.05
–––
1.45
0.23
0.75
0.27
W
E
F
2X R R1
0.25
1
G
J
K
P
R1
S
S1
U
0.50 BSC
C2
0.09
0.20
GAGE
PLANE
0.50 REF
0.25 BSC
0.10 0.20
26.00 BSC
13.00 BSC
C1
K
0.09
0.16
E
V
26.00 BSC
13.00 BSC
0.20 REF
1,00 REF
Z
V1
W
Z
VIEW AA
0
0
7
1
2
–––
12 REF
MCM69D536
13
MOTOROLA FAST SRAM
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Mfax is a trademark of Motorola, Inc.
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MCM69D536/D
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