MPC940 [MOTOROLA]

LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP; 低电压1:18时钟分配芯片
MPC940
型号: MPC940
厂家: MOTOROLA    MOTOROLA
描述:

LOW VOLTAGE 1:18 CLOCK DISTRIBUTION CHIP
低电压1:18时钟分配芯片

时钟
文件: 总5页 (文件大小:95K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SEMICONDUCTOR TECHNICAL DATA  
The MPC940 is a 1:18 low voltage clock distribution chip. The device  
features the capability to select either a differential LVPECL or an LVTTL/  
LVCMOS compatible input. The 18 outputs are LVCMOS or LVTTL  
compatible and feature the drive strength to drive 50series or parallel  
terminated transmission lines. With output–to–output skews of 150ps, the  
MPC940 is ideal as a clock distribution chip for the most demanding of  
synchronous systems. For a similar product with a larger number of  
outputs, please consult the MPC941 data sheet.  
LOW VOLTAGE  
1:18 CLOCK  
DISTRIBUTION CHIP  
LVPECL or LVCMOS/LVTTL Clock Input  
150ps Maximum Targeted Output–to–Output Skew  
Drives Up to 36 Independent Clock Lines  
Maximum Output Frequency of 250MHz  
32–Lead TQFP Packaging  
3.3V V  
Supply Voltage  
CC  
FA SUFFIX  
32–LEAD TQFP PACKAGE  
CASE 873A–02  
With a low output impedance (20), in both the HIGH and LOW logic  
states, the output buffers of the MPC940 are ideal for driving series  
terminated transmission lines. More specifically, each of the 18 MPC940  
outputs can drive two series terminated 50transmission lines. With this  
capability, the MPC940 has an effective fanout of 1:36 in applications  
where each line drives a single load. With this level of fanout, the  
MPC940 provides enough copies of low skew clocks for most high  
performance synchronous systems.  
The differential LVPECL inputs of the MPC940 allow the device to interface directly with a LVPECL fanout buffer like the  
MC100EP111 to build very wide clock fanout trees or to couple to a high frequency clock source. The LVCMOS/LVTTL input  
provides a more standard interface for applications requiring only a single clock distribution chip at relatively low frequencies. In  
addition, the two clock sources can be used to provide for a test clock interface as well as the primary system clock. A logic HIGH  
on the LVCMOS_CLK_Sel pin will select the TTL level clock input.  
The MPC940 is fully 3.3V compatible. The 32–lead TQFP package was chosen to optimize performance, board space and  
cost of the device. The 32–lead TQFP has a 7x7mm body size with a conservative 0.8mm pin spacing.  
This document contains information on a new product. Specifications and information herein are subject to  
change without notice.  
6/97  
REV 0.2  
Motorola, Inc. 1997  
MPC940  
LOGIC DIAGRAM  
PECL_CLK  
PECL_CLK  
0
1
Q0  
LVCMOS_CLK  
16  
Q1–Q16  
Q17  
LVCMOS_CLK_Sel  
Pinout: 32–Lead TQFP (Top View)  
24  
23  
22  
21  
20  
19  
18  
17  
GNDO  
Q5  
25  
26  
27  
28  
29  
30  
31  
32  
16  
15  
14  
13  
12  
11  
10  
9
VCCO  
Q12  
FUNCTION TABLE  
LVCMOS_CLK_Sel  
Q4  
Q13  
Input  
Q3  
Q14  
0
1
PECL_CLK  
LVCMOS_CLK  
MPC940  
VCCO  
Q2  
GNDO  
Q15  
Q1  
Q16  
Q0  
Q17  
1
2
3
4
5
6
7
8
MOTOROLA  
2
TIMING SOLUTIONS  
BR1333 — Rev 6  
MPC940  
ABSOLUTE MAXIMUM RATINGS*  
Symbol  
Parameter  
Min  
–0.3  
–0.3  
Max  
Unit  
V
V
V
Supply Voltage  
Input Voltage  
Input Current  
3.6  
CC  
V
+ 0.3  
V
I
DD  
I
IN  
±20  
mA  
°C  
T
Stor  
Storage Temperature Range  
–40  
125  
*
Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those  
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.  
DC CHARACTERISTICS (T = 0° to 70°C, V  
= 3.3V ±5%)  
CC  
A
Symbol  
Characteristic  
Min  
Typ  
Max  
Unit  
Condition  
V
V
Input HIGH Voltage  
PECL_CLK  
2.135  
2.0  
2.42  
3.60  
V
IH  
Other  
Input LOW Voltage  
PECL_CLK  
Other  
1.49  
1.825  
0.8  
V
IL  
V
V
V
V
Peak–to–Peak Input Voltage  
Common Mode Range  
Output HIGH Voltage  
Output LOW Voltage  
Input Current  
PECL_CLK  
PECL_CLK  
300  
1000  
mV  
V
PP  
V
–2.0  
CC  
2.5  
V
–0.6  
CMR  
OH  
OL  
CC  
V
I
I
= –16mA, Note 1.  
= 16mA, Note 1.  
OH  
0.5  
V
OH  
I
IN  
±100  
µA  
pF  
pF  
mA  
C
C
Input Capacitance  
4
IN  
pd  
Power Dissipation Capacitance  
8
Per Output  
I
Maximum Quiescent Supply Current  
I
I
70  
140  
CC  
CCL  
CCH  
1. The MPC940 outputs can drive series or parallel terminated 50(or 50to V /2) transmission lines on the incident edge.  
CC  
AC CHARACTERISTICS (T = 0° to 70°C, V  
= 3.3V ±5%)  
CC  
A
Symbol  
Characteristic  
Maximum Input Frequency  
Propagation Delay  
Min  
Typ  
Max  
Unit  
MHz  
ns  
Condition  
Note 1.  
F
250  
max  
t
PECL_CLK to Q  
TTL_CLK to Q  
1.7  
2.0  
Note 1.  
pd  
t
t
Output–to–Output Skew  
Part–to–Part Skew  
150  
ps  
ps  
Note 1.  
sk(o)  
PECL_CLK to Q  
TTL_CLK to Q  
800  
800  
Notes 2., 3.  
sk(pr)  
t
Output Pulse Width  
45  
55  
p%  
ns  
Note 1.,  
Measured at V /2  
pwo  
CC  
t , t  
r f  
Output Rise/Fall Time  
0.20  
1.0  
0.8V to 2.0V  
1. Driving 50transmission lines  
2. Part–to–part skew at a given temperature and voltage  
3. Final specification limits will be determined from matrix lot material. 800ps is the “best estimate” based on initial material and experience with  
previous products.  
3
MOTOROLA  
MPC940  
OUTLINE DIMENSIONS  
FA SUFFIX  
TQFP PACKAGE  
CASE 873A–02  
ISSUE A  
4X  
A
A1  
0.20 (0.008) AB T–U  
Z
32  
25  
1
–U–  
V
–T–  
B
AE  
AE  
P
B1  
DETAIL Y  
–Z–  
V1  
17  
8
DETAIL Y  
9
4X  
0.20 (0.008) AC T–U  
Z
9
NOTES:  
S1  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
S
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM OF  
LEAD AND IS COINCIDENT WITH THE LEAD  
WHERE THE LEAD EXITS THE PLASTIC BODY AT  
THE BOTTOM OF THE PARTING LINE.  
4. DATUMS –T–, –U–, AND –Z– TO BE DETERMINED  
AT DATUM PLANE –AB–.  
DETAIL AD  
G
5. DIMENSIONS S AND V TO BE DETERMINED AT  
SEATING PLANE –AC–.  
–AB–  
–AC–  
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD  
PROTRUSION. ALLOWABLE PROTRUSION IS  
0.250 (0.010) PER SIDE. DIMENSIONS A AND B  
DO INCLUDE MOLD MISMATCH AND ARE  
DETERMINED AT DATUM PLANE –AB–.  
7. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. DAMBAR PROTRUSION SHALL  
NOT CAUSE THE D DIMENSION TO EXCEED  
0.520 (0.020).  
SEATING  
PLANE  
0.10 (0.004) AC  
BASE  
METAL  
N
8. MINIMUM SOLDER PLATE THICKNESS SHALL BE  
0.0076 (0.0003).  
9. EXACT SHAPE OF EACH CORNER MAY VARY  
FROM DEPICTION.  
F
D
8X M  
MILLIMETERS  
MIN MAX  
7.000 BSC  
3.500 BSC  
7.000 BSC  
3.500 BSC  
INCHES  
MIN MAX  
0.276 BSC  
0.138 BSC  
0.276 BSC  
0.138 BSC  
R
J
DIM  
A
A1  
B
B1  
C
D
E
F
G
H
J
SECTION AE–AE  
E
C
1.400  
1.600  
0.450  
1.450  
0.400  
0.055  
0.063  
0.018  
0.057  
0.016  
0.300  
1.350  
0.300  
0.012  
0.053  
0.012  
W
0.800 BSC  
0.031 BSC  
Q
H
K
X
0.050  
0.090  
0.500  
0.150  
0.200  
0.700  
0.002  
0.004  
0.020  
0.006  
0.008  
0.028  
K
M
N
P
12 REF  
12 REF  
DETAIL AD  
0.090  
0.160  
0.004  
0.006  
0.400 BSC  
0.016 BSC  
Q
R
1
5
1
5
0.150  
0.250  
0.006  
0.010  
S
9.000 BSC  
0.354 BSC  
S1  
V
V1  
W
X
4.500 BSC  
9.000 BSC  
4.500 BSC  
0.200 REF  
1.000 REF  
0.177 BSC  
0.354 BSC  
0.177 BSC  
0.008 REF  
0.039 REF  
MOTOROLA  
4
TIMING SOLUTIONS  
BR1333 — Rev 6  
MPC940  
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and  
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola  
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,includingTypicals”  
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of  
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other  
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury  
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola  
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees  
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that  
Motorola was negligent regarding the design or manufacture of the part. Motorola and  
Opportunity/Affirmative Action Employer.  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal  
Mfax is a trademark of Motorola, Inc.  
How to reach us:  
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;  
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447  
JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,  
Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488  
Mfax : RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609  
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
INTERNET: http://motorola.com/sps  
MPC940/D  

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