MTP5N40EWC [MOTOROLA]
5A, 400V, 1ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB;
| 型号： | MTP5N40EWC |
| 厂家： | 
MOTOROLA |
| 描述： | 5A, 400V, 1ohm, N-CHANNEL, Si, POWER, MOSFET, TO-220AB 晶体 晶体管 功率场效应晶体管 |
| 文件： | 总8页 (文件大小：261K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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by MTP5N40E/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
N–Channel Enhancement–Mode Silicon Gate
TMOS POWER FET
5.0 AMPERES
400 VOLTS
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
R
= 1.0 OHM
DS(on)
•
Avalanche Energy Capability Specified at Elevated
Temperature
D
•
•
Low Stored Gate Charge for Efficient Switching
Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor — Absorbs High Energy in the
Avalanche Mode
G
•
Source–to–Drain Diode Recovery Time Comparable to Discrete
Fast Recovery Diode
S
CASE 221A–06, Style 5
TO–220AB
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
C
Rating
Symbol
Value
400
Unit
Vdc
Vdc
Drain–Source Voltage
V
DSS
Drain–Gate Voltage (R
GS
= 1.0 MΩ)
V
DGR
400
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–repetitive
V
±20
±40
Vdc
Vpk
GS
V
GSM
Drain Current — Continuous
Drain Current — Pulsed
I
5.0
12
Adc
D
I
DM
Total Power Dissipation @ T = 25°C
Derate above 25°C
P
D
75
0.6
Watts
W/°C
C
Operating and Storage Temperature Range
T , T
–55 to 150
°C
J
stg
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T < 150°C)
J
Single Pulse Drain–to–Source Avalanche Energy — T = 25°C
W
W
(1)
(2)
290
46
7.4
mJ
J
DSR
Single Pulse Drain–to–Source Avalanche Energy — T = 100°C
J
Repetitive Pulse Drain–to–Source Avalanche Energy
DSR
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient°
R
R
1.67
62.5
°C/W
°C
θJC
θJA
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
T
260
L
(1) V
DD
= 50 V, I = 5.0 A
D
(2) Pulse Width and frequency is limited by T (max) and thermal response
J
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Motorola, Inc. 1996
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
J
Characteristic
Symbol
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
V
400
—
—
Vdc
(BR)DSS
(V
GS
= 0, I = 250 µAdc)
D
Zero Gate Voltage Drain Current
I
mAdc
DSS
(V
DS
(V
DS
= 400 V, V
= 320 V, V
= 0)
—
—
—
—
0.25
1.0
GS
GS
= 0, T = 125°C)
J
Gate–Body Leakage Current, Forward (V
GSF
= 20 Vdc, V
DS
= 0)
= 0)
I
—
—
—
—
100
100
nAdc
nAdc
GSSF
Gate–Body Leakage Current, Reverse (V
= 20 Vdc, V
DS
I
GSR
GSSR
ON CHARACTERISTICS*
Gate Threshold Voltage
V
Vdc
GS(th)
(V
= V , I = 250 µAdc)
2.0
1.5
—
—
4.0
3.5
DS
GS
D
(T = 125°C)
J
Static Drain–Source On–Resistance (V
GS
= 10 Vdc, I = 2.5 Adc)
R
V
—
0.8
1.0
Ohm
Vdc
D
DS(on)
Drain–Source On–Voltage (V
GS
= 10 Vdc)
DS(on)
(I = 5.0 A)
—
—
—
—
6.2
5.0
D
(I = 2.5 A, T = 100°C)
D
J
Forward Transconductance (V
DS
= 15 Vdc, I = 2.5 Adc)
g
2.0
—
—
mhos
pF
D
FS
DYNAMIC CHARACTERISTICS
Input Capacitance
C
—
—
—
775
96
—
—
—
iss
(V
DS
= 25 V, V = 0,
GS
f = 1.0 MHz)
Output Capacitance
C
oss
Transfer Capacitance
C
22
rss
SWITCHING CHARACTERISTICS*
Turn–On Delay Time
t
—
—
—
—
—
—
—
24
34
60
36
27
3.5
14
—
—
—
—
32
—
—
ns
d(on)
(V
DD
= 250 V, I ≈ 5.0 A,
D
Rise Time
t
r
R
= 12 Ω, R = 50 Ω,
L
G
V
Turn–Off Delay Time
Fall Time
t
d(off)
= 10 V)
GS(on)
t
f
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Q
nC
g
(V
DS
= 320 V, I = 5.0 A,
D
Q
Q
gs
V
GS
= 10 V)
gd
SOURCE–DRAIN DIODE CHARACTERISTICS*
Forward On–Voltage
V
—
—
—
**
1.4
Vdc
ns
SD
Forward Turn–On Time
Reverse Recovery Time
(I = 5.0 A, di/dt = 100 A/µs)
S
t
on
t
—
660
rr
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
L
d
nH
—
—
3.5
4.5
—
—
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
s
—
7.5
—
*Indicates Pulse Test: Pulse Width = 300 µs Max, Duty Cycle ≤ 2.0%.
**Limited by circuit inductance.
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
1.2
10
8
V = 10 V
GS
7 V
T
= 25°C
J
V
I
= V
GS
DS
= 0.25 mA
1.1
D
6 V
6
4
2
0
1
0.9
5 V
0.8
4 V
0
4
8
12
16
20
–50
–25
0
25
50
75
100
C)
125
150
V
, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
T , JUNCTION TEMPERATURE (
°
DS
J
Figure 1. On–Region Characteristics
Figure 2. Gate–Threshold Voltage Variation
With Temperature
10
8
1.2
V
≥ 10 V
DS
V
= 0
GS
= 0.25 mA
I
D
1.1
1
6
4
T
= 25°C
0.9
0.8
J
2
125°C
–55°C
0
0
2
4
6
8
10
–50
0
50
100
150
200
V
, GATE–TO–SOURCE VOLTAGE (VOLTS)
T , JUNCTION TEMPERATURE (
°C)
GS
J
Figure 3. Transfer Characteristics
Figure 4. Breakdown Voltage Variation
With Temperature
2
2.5
2
V
= 10 V
GS
= 2.5 A
T
= 100°C
1.6
J
I
D
1.2
0.8
0.4
0
1.5
1
25°C
–55°C
0.5
V
= 10 V
GS
0
0
2
4
6
8
10
–50
0
50
100
150
200
I
, DRAIN CURRENT (AMPS)
T , JUNCTION TEMPERATURE (°C)
D
J
Figure 5. On–Resistance versus Drain Current
Figure 6. On–Resistance Variation
With Temperature
Motorola TMOS Power MOSFET Transistor Device Data
3
SAFE OPERATING AREA INFORMATION
100
10
1
14
12
V
= 20 V
GS
SINGLE PULSE
T
= 25°C
C
10
µ
s
10
8
0.1 ms
1 ms
6
4
T
≤ 150°C
J
R
LIMIT
DS(on)
10 ms
dc
THERMAL LIMIT
PACKAGE LIMIT
2
0
0.1
1
10
100
1000
0
100
V , DRAIN–TO–SOURCE VOLTAGE (VOLTS)
DS
200
300
400
500
V
, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
DS
Figure 7. Maximum Rated Forward Biased
Safe Operating Area
Figure 8. Maximum Rated Switching
Safe Operating Area
10000
1000
FORWARD BIASED SAFE OPERATING AREA
V
= 250 V
= 5 A
= 10 V
DD
The FBSOA curves define the maximum drain–to–source
voltage and drain current that a device can safely handle
when it is forward biased, or when it is on, or being turned on.
Because these curves include the limitations of simultaneous
high voltage and high current, up to the rating of the device,
they are especially useful to designers of linear systems. The
curves are based on a case temperature of 25°C and a maxi-
mum junction temperature of 150°C. Limitations for repetitive
pulses at various case temperatures can be determined by
using the thermal response curves. Motorola Application
Note, AN569, “Transient Thermal Resistance–General Data
and Its Use” provides detailed instructions.
I
V
D
t
d(off)
GS
= 25°C
T
J
t
t
f
r
t
d(on)
100
10
1
10
100
1000
SWITCHING SAFE OPERATING AREA
R
, GATE RESISTANCE (OHMS)
G
The switching safe operating area (SOA) of Figure 8 is the
boundary that the load line may traverse without incurring
damage to the MOSFET. The fundamental limits are the
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
peakcurrent,I
andthebreakdownvoltage,V
.The
DM
(BR)DSS
switching SOA shown in Figure 8 is applicable for both turn–
on and turn–off of the devices for switching times less than
one microsecond.
1
D = 0.5
0.5
0.3
0.2
0.2
0.1
P
0.1
(pk)
R
R
(t) = r(t) R
θ
θ
θ
JC
JC
JC
°C/W MAX
0.05
= 1.67
0.05
0.02
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
t
1
0.03
1
(pk)
t
2
0.02
0.01
T
– T = P
C
R
(t)
JC
J(pk)
θ
DUTY CYCLE, D = t /t
1 2
SINGLE PULSE
0.01
0.01
0.02
0.05
0.1
0.2
0.5
1
2
5
10
20
50
100
200
500
1000
t, TIME (ms)
Figure 10. Thermal Response
4
Motorola TMOS Power MOSFET Transistor Device Data
2000
1500
1000
500
16
12
8
T
= 25°C
= 5 A
T
V
= 25
°
C
J
J
I
= 0
D
V
= 100 V
GS
DS
200 V
320 V
C
rss
C
iss
4
0
V
= 0 V
DS
C
oss
0
0
10
20
30
40
50
10
5
0
5
10
15
20
25
V
V
DS
GS
Q , TOTAL GATE CHARGE (nC)
g
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 12. Gate Charge versus
Gate–To–Source Voltage
Figure 11. Capacitance Variation
COMMUTATING SAFE OPERATING AREA (CSOA)
The Commutating Safe Operating Area (CSOA) of
Figure 14 defines the limits of safe operation for commutated
source–drain current versus re–applied drain voltage when
the source–drain diode has undergone forward bias. The
Stray inductances in Motorola’s test circuit are assumed to
be practical minimums. dV /dt in excess of 10 V/ns was at-
DS
tained with dI /dt of 400 A/µs.
s
15 V
curve shows the limitations of I
and peak V for a given
FM
DS
V
GS
rate of change of source current. It is applicable when wave-
forms similar to those of Figure 11 are present. Full or half–
bridge PWM DC motor controllers are common applications
requiring CSOA data.
0
I
FM
dl /dt
s
90%
I
Device stresses increase with increasing rate of change of
S
t
rr
source current so dI /dt is specified with a maximum value.
10%
s
Higher values of dI /dt require an appropriate derating of I
,
s
FM
t
I
on
peak V
or both. Ultimately dI /dt is limited primarily by de-
vice, package, and circuit impedances. Maximum device
RM
DS
s
0.25 I
RM
stress occurs during t as the diode goes from conduction to
reverse blocking.
rr
V
DS(pk)
V
isthepeakdrain–to–sourcevoltagethatthedevice
DS(pk)
must sustain during commutation; I
V
R
is the maximum for-
FM
ward source–drain diode current just prior to the onset of
commutation.
dV /dt
DS
V
DS
V
dsL
V
f
V
is specified at 80% of V
to ensure that the
R
(BR)DSS
CSOA stress is maximized as I decays from I
R
to zero.
S
RM
MAX. CSOA
STRESS AREA
should be minimized during commutation. T has only
GS
J
a second order effect on CSOA.
Figure 15. Commutating Waveforms
6
R
GS
DUT
4
–
V
R
I
I
S
L
i
FM
+
di/dt
≤ 90 A/µs
V
2
0
DS
+
20 V
–
V
GS
0
100
200
300
400
500
V
= 80% OF RATED V
= V + L dl /dt
R
DS
V
V
, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
dsL
f
i
s
DS
Figure 13. Commutating Safe Operating Area (CSOA)
Figure 14. Commutating Safe Operating Area
Test Circuit
Motorola TMOS Power MOSFET Transistor Device Data
5
V
(BR)DSS
V
ds(t)
I
O
L
I
D(t)
V
C
DS
4700 µF
250 V
I
D
V
DD
V
DD
t
t
t, (TIME)
P
R
GS
50
V
(BR)DSS
1
2
Ω
2
L I
O
W
DSR
V
– V
DD
(BR)DSS
Figure 16. Unclamped Inductive Switching
Test Circuit
Figure 17. Unclamped Inductive Switching
Waveforms
RESISTIVE SWITCHING
V
DD
t
t
off
on
t
t
R
t
f
t
d(off)
d(on)
L
r
90%
90%
V
out
OUTPUT, V
INVERTED
out
V
in
PULSE GENERATOR
DUT
10%
z = 12
Ω
R
gen
50
Ω
90%
50%
50
Ω
50%
INPUT, V
in
10%
PULSE WIDTH
* Note:TheMirrorisshortedtotheKelvinterminalforthistest.
Figure 18. Switching Test Circuit
Figure 19. Switching Waveforms
+18 V
V
DD
1 mA
SAME
DEVICE TYPE
AS DUT
47 k
100 k
10 V
V
15 V
in
2N3904
0.1 µF
2N3904
100 k
FERRITE
BEAD
47 k
100
DUT
V
= 15 V ; PULSE WIDTH ≤ 100 µs, DUTY CYCLE ≤ 10%
pk
in
Figure 20. Gate Charge Test Circuit
6
Motorola TMOS Power MOSFET Transistor Device Data
PACKAGE DIMENSIONS
NOTES:
SEATING
PLANE
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–T–
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
C
S
B
F
T
4
INCHES
MIN
MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
MAX
0.620
0.405
0.190
0.035
0.147
0.105
0.155
0.025
0.562
0.060
0.210
0.120
0.110
0.055
0.255
0.050
–––
MIN
14.48
9.66
4.07
0.64
3.61
2.42
2.80
0.46
12.70
1.15
4.83
2.54
2.04
1.15
5.97
0.00
1.15
–––
MAX
15.75
10.28
4.82
0.88
3.73
2.66
3.93
0.64
14.27
1.52
5.33
3.04
2.79
1.39
6.47
1.27
–––
A
K
Q
Z
0.570
0.380
0.160
0.025
0.142
0.095
0.110
0.018
0.500
0.045
0.190
0.100
0.080
0.045
0.235
0.000
0.045
–––
STYLE 5:
1
2
3
U
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
H
L
R
V
J
G
T
U
V
D
N
Z
0.080
2.04
CASE 221A–06
ISSUE Y
Motorola TMOS Power MOSFET Transistor Device Data
7
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
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against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
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MTP5N40E/D
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