SN74LS259ND [MOTOROLA]
LS SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16, PLASTIC, DIP-16;
| 型号： | SN74LS259ND |
| 厂家： | 
MOTOROLA |
| 描述： | LS SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16, PLASTIC, DIP-16 触发器 锁存器 逻辑集成电路 光电二极管 双倍数据速率 |
| 文件： | 总6页 (文件大小：220K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54/74LS259
8-BIT ADDRESSABLE LATCH
The SN54/74LS259 is a high-speed 8-Bit Addressable Latch designed for
general purpose storage applications in digital systems. It is a multifunctional
device capable of storing single line data in eight addressable latches, and
also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The device
also incorporates an active LOW common Clear for resetting all latches, as
well as, an active LOW Enable.
8-BIT ADDRESSABLE LATCH
LOW POWER SCHOTTKY
• Serial-to-Parallel Conversion
• Eight Bits of Storage With Output of Each Bit Available
• Random (Addressable) Data Entry
• Active High Demultiplexing or Decoding Capability
• Easily Expandable
• Common Clear
J SUFFIX
CERAMIC
CONNECTION DIAGRAM DIP (TOP VIEW)
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
16
1
PIN NAMES
LOADING (Note a)
HIGH
LOW
A , A , A
D
Address lnputs
Data Input
Enable (Active LOW) Input
Clear (Active LOW) input
Parallel Latch Outputs (Note b)
0.5 U.L.
0.5 U.L.
1.0 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
0.5 U.L.
0.25 U.L.
5 (2.5) U.L.
0
1
2
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
E
C
Q
SN74LSXXXN Plastic
SN74LSXXXD SOIC
to Q
0
7
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial
(74) Temperature Ranges.
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
T
A
Operating Ambient Temperature Range
54
74
–55
0
25
25
125
70
°C
I
I
Output Current — High
Output Current — Low
54, 74
–0.4
mA
mA
OH
54
74
4.0
8.0
OL
FAST AND LS TTL DATA
5-433
SN54/74LS259
LOGIC DIAGRAM
FUNCTIONAL DESCRIPTION
The SN54/74LS259 has four modes of operation as shown
in the mode selection table. In the addressable latch mode,
data on the Data line (D) is written into the addressed
latch.The addressed latch will follow the data input with all
non-addressed latches remaining in their previous states. In
the memory mode, all latches remain in their previous state
and are unaffected by the Data or Address inputs.
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs are
LOW and unaffected by the address and data inputs.
When operating the SN54/74LS259 as an addressable
latch, changing more then one bit of the address could impose
a transient wrong address. Therefore, this should only be
done while in the memory mode.
In the one-of-eight decoding or demultiplexing mode, the
The truth table below summarizes the operations.
TRUTH TABLE
MODE SELECTION
PRESENT OUTPUT STATES
E
C
MODE
C E D
A
A
A
Q
Q
Q
Q
Q
Q
Q
Q
7
MODE
Clear
Demultiplex
0
1
2
0
1
2
3
4
5
6
L
H
L
H
H
L
Addressable Latch
L H X
X
L
L
H
H
X
X
L
L
L
L
L
H
L
L
L
L
L
L
Memory
L
L
L
L
•
•
•
•
•
L
L H
L
L H
•
•
•
•
•
L
L
L
L
L
•
•
•
•
•
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
•
•
•
•
•
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Active HIGH Eight-Channel
Demultiplexer
L
H
L
Clear
L
•
•
•
•
•
L
L H
H
X
H
H
X
L
L
L
L
L
L
L
H
H H X
X
Q
Memory
N–1
H
I
I
L
L
H
H
L
L
L
L
•
•
•
•
•
L
L
L
L
L
H
Q
Q
Q
Q
Q
Q
Q
Addressable
Latch
N–1
N–1
L
N–1
N–1
N–1
N–1
N–1
H L H
H L
H L H
•
•
•
•
•
L
Q
Q
N–1
N–1
H
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
X = Don’t Care Condition
L = LOW Voltage Level
H = HIGH Voltage Level
H L
H L H
L
H
H
H
H
H
H
Q
Q
Q
Q
L
H
N–1
N–1
N–1
N–1
Q
= Previous Output State
N–1
FAST AND LS TTL DATA
5-434
SN54/74LS259
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Min
Typ
Max
Symbol
Parameter
Input HIGH Voltage
Unit
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
V
2.0
V
IH
54
74
0.7
0.8
Guaranteed Input LOW Voltage for
All Inputs
V
V
V
Input LOW Voltage
V
IL
Input Clamp Diode Voltage
Output HIGH Voltage
–0.65
3.5
–1.5
V
V
V
V
V
= MIN, I = –18 mA
IN
IK
CC
54
74
2.5
2.7
= MIN, I
OH
= MAX, V = V
IN
CC
IH
OH
or V per Truth Table
IL
3.5
V
V
= V
CC
MIN,
= V or V
IL IH
54, 74
74
0.25
0.35
0.4
0.5
V
V
I
I
= 4.0 mA
= 8.0 mA
CC
IN
OL
V
Output LOW Voltage
Input HIGH Current
OL
per Truth Table
OL
20
0.1
µA
mA
mA
mA
mA
V
V
V
V
V
= MAX, V = 2.7 V
IN
CC
CC
CC
CC
CC
I
IH
= MAX, V = 7.0 V
IN
I
I
I
Input LOW Current
–0.4
–100
36
= MAX, V = 0.4 V
IN
IL
Short Circuit Current (Note 1)
Power Supply Current
–20
= MAX
= MAX
OS
CC
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (T = 25°C, V
CC
= 5.0 V)
A
Limits
Typ
Symbol
Parameter
Unit
Test Conditions
Min
Max
t
t
Turn-Off Delay, Enable to Output
Turn-On Delay, Enable to Output
22
15
35
24
ns
ns
PLH
PHL
t
t
Turn-Off Delay, Data to Output
Turn-On Delay, Data to Output
20
13
32
21
ns
ns
PLH
PHL
C
= 15 pF
L
t
t
Turn-Off Delay, Address to Output
Turn-On Delay, Address to Output
24
18
38
29
ns
ns
PLH
PHL
t
Turn-On Delay, Clear to Output
17
27
ns
PHL
AC SET-UP REQUIREMENTS (T = 25°C, V
= 5.0 V)
A
CC
Limits
Typ
Symbol
Parameter
Unit
ns
Min
Max
t
t
t
t
Input Setup Time
20
15
5.0
20
s
Pulse Width, Clear or Enable
Hold Time, Data
ns
W
h
ns
Hold Time, Address
ns
h
FAST AND LS TTL DATA
5-435
SN54/74LS259
AC WAVEFORMS
Figure 2. Turn-on and Turn-off Delays,
Data to Output
Figure 1. Turn-on and Turn-off Delays, Enable To
Output and Enable Pulse Width
Figure 4. Setup and Hold Time, Data to Enable
Figure 3. Turn-on and Turn-off Delays,
Address to Output
Figure 5. Turn-on Delay, Clear to Output
Figure 6. Setup Time, Address to Enable
(See Notes 1 and 2)
NOTES:
1. The Address to Enable Setup Time is the time before the HIGH-to-LOW Enable transition that the Address must be stable so that the correct latch is
addressed and the other latches are not affected.
2. The shaded areas indicate when the inputs are permitted to change for predictable output performance.
FAST AND LS TTL DATA
5-436
Case 751B-03 D Suffix
16-Pin Plastic
SO-16
-A-
16
1
9
8
P
C
-B-
R X 45°
G
-T-
J
M
F
D
°
°
°
°
K
Case 648-08 N Suffix
16-Pin Plastic
-A-
16
1
9
B
S
8
F
L
C
K
-T-
M
H
J
G
D
°
°
°
°
Case 620-09 J Suffix
16-Pin Ceramic Dual In-Line
-A-
16
9
-B-
1
8
L
C
-T-
K
M
N
E
J
F
G
D
°
°
°
°
FAST AND LS TTL DATA
5-437
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◊
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MOTOROLA
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