UC384XBD [MOTOROLA]
HIGH PERFORMANCE CURRENT MODE CONTROLLERS; 高性能电流模式控制器
| 型号： | UC384XBD |
| 厂家： | 
MOTOROLA |
| 描述： | HIGH PERFORMANCE CURRENT MODE CONTROLLERS |
| 文件： | 总16页 (文件大小：437K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Order this document by UC3844B/D
The UC3844B, UC3845B series are high performance fixed frequency
current mode controllers. They are specifically designed for Off–Line and
dc–to–dc converter applications offering the designer a cost–effective
solution with minimal external components. These integrated circuits feature
an oscillator, a temperature compensated reference, high gain error
amplifier, current sensing comparator, and a high current totem pole output
ideally suited for driving a power MOSFET.
HIGH PERFORMANCE
CURRENT MODE
CONTROLLERS
Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,
a latch for single pulse metering, and a flip–flop which blanks the output off
every other oscillator cycle, allowing output deadtimes to be programmed
from 50% to 70%.
N SUFFIX
PLASTIC PACKAGE
CASE 626
8
1
These devices are available in an 8–pin dual–in–line and surface mount
(SO–8) plastic package as well as the 14–pin plastic surface mount (SO–14).
The SO–14 package has separate power and ground pins for the totem pole
output stage.
D1 SUFFIX
PLASTIC PACKAGE
CASE 751
8
(SO–8)
1
The UCX844B has UVLO thresholds of 16 V (on) and 10 V (off), ideally
suited for off–line converters. The UCX845B is tailored for lower voltage
applications having UVLO thresholds of 8.5 V (on) and 7.6 V (off).
D SUFFIX
PLASTIC PACKAGE
CASE 751A
14
1
(SO–14)
• Trimmed Oscillator for Precise Frequency Control
• Oscillator Frequency Guaranteed at 250 kHz
• Current Mode Operation to 500 kHz Output Switching Frequency
• Output Deadtime Adjustable from 50% to 70%
• Automatic Feed Forward Compensation
• Latching PWM for Cycle–By–Cycle Current Limiting
• Internally Trimmed Reference with Undervoltage Lockout
• High Current Totem Pole Output
PIN CONNECTIONS
V
1
2
3
4
8
7
6
5
Compensation
Voltage Feedback
Current Sense
ref
V
CC
Output
Gnd
R
/C
T
T
(Top View)
• Undervoltage Lockout with Hysteresis
• Low Startup and Operating Current
Compensation
1
2
3
4
5
14
13
12
11
10
9
V
ref
NC
Voltage Feedback
NC
NC
V
CC
V
C
Current Sense
NC
Output
Gnd
6
7
Simplified Block Diagram
8
R
/C
Power Ground
T
T
V
7(12)
CC
(Top View)
ORDERING INFORMATION
Operating
V
CC
5.0V
Reference
V
Undervoltage
Lockout
ref
8(14)
R
R
Device
Package
Temperature Range
V
ref
Undervoltage
Lockout
V
C
UC384XBD
UC384XBD1
UC384XBN
UC284XBD
UC284XBD1
UC284XBN
UC384XBVD
UC384XBVD1
UC384XBVN
SO–14
SO–8
7(11)
T
= 0° to + 70°C
A
Output
6(10)
Plastic
SO–14
SO–8
R
/C
T
Oscillator
T
4(7)
Latching
PWM
Power
Ground
T
= – 25° to + 85°C
Voltage
Feedback
Input
A
5(8)
3(5)
Plastic
SO–14
SO–8
2(3)
1(1)
Error
Amplifier
Current
Sense Input
Output/
Compensation
T
= – 40° to +105°C
A
Plastic
Gnd
5(9)
X indicates either a 4 or 5 to define specific device
part numbers.
Pin numbers in parenthesis are for the D suffix SO–14 package.
Motorola, Inc. 1996
Rev 1
UC3844B, 45B UC2844B, 45B
MAXIMUM RATINGS
Rating
Symbol
(I + I )
Value
Unit
mA
A
Total Power Supply and Zener Current
Output Current, Source or Sink (Note 1)
Output Energy (Capacitive Load per Cycle)
Current Sense and Voltage Feedback Inputs
Error Amp Output Sink Current
30
CC
Z
I
O
1.0
5.0
W
µJ
V
in
– 0.3 to + 5.5
10
V
I
O
mA
Power Dissipation and Thermal Characteristics
D Suffix, Plastic Package, SO–14 Case 751A
Maximum Power Dissipation @ T = 25°C
Thermal Resistance, Junction–to–Air
D1 Suffix, Plastic Package, SO–8 Case 751
P
862
145
mW
°C/W
A
D
R
R
R
θJA
Maximum Power Dissipation @ T = 25°C
P
702
178
mW
°C/W
A
D
θJA
Thermal Resistance, Junction–to–Air
N Suffix, Plastic Package, Case 626
Maximum Power Dissipation @ T = 25°C
P
1.25
100
W
°C/W
A
D
θJA
Thermal Resistance, Junction–to–Air
Operating Junction Temperature
T
+150
°C
°C
J
Operating Ambient Temperature
UC3844B, UC3845B
T
A
0 to + 70
UC2844B, UC2845B
– 25 to + 85
Storage Temperature Range
T
stg
– 65 to +150
°C
ELECTRICAL CHARACTERISTICS (V
CC
= 15 V [Note 2], R = 10 k, C = 3.3 nF. For typical values T = 25°C, for min/max values T is
T
T
A
A
the operating ambient temperature range that applies [Note 3], unless otherwise noted.)
UC284XB
Typ
UC384XB, XBV
Characteristic
REFERENCE SECTION
Symbol
Min
Max
Min
Typ
Max
Unit
Reference Output Voltage (I = 1.0 mA, T = 25°C)
V
ref
4.95
–
5.0
2.0
3.0
0.2
–
5.05
20
25
–
4.9
–
5.0
2.0
3.0
0.2
–
5.1
20
V
mV
mV
mV/°C
V
O
J
Line Regulation (V
CC
= 12 V to 25 V)
Reg
line
load
S
Load Regulation (I = 1.0 mA to 20 mA)
O
Reg
T
–
–
25
Temperature Stability
–
–
–
Total Output Variation over Line, Load, and Temperature
Output Noise Voltage (f = 10 Hz to 10 kHz, T = 25°C)
V
ref
4.9
–
5.1
–
4.82
–
5.18
–
V
n
50
50
µV
J
Long Term Stability (T = 125°C for 1000 Hours)
S
–
5.0
– 85
–
–
5.0
– 85
–
mV
mA
A
Output Short Circuit Current
I
– 30
–180
– 30
–180
SC
OSCILLATOR SECTION
Frequency
f
kHz
OSC
T = 25°C
49
48
225
52
–
250
55
56
275
49
48
225
52
–
250
55
56
275
J
A
T
= T
to T
high
T
low
T = 25°C (R = 6.2 k, C = 1.0 nF)
J
T
Frequency Change with Voltage (V
= 12 V to 25 V)
∆f
∆f
/∆V
/∆T
–
–
0.2
1.0
1.0
–
–
–
0.2
0.5
1.0
–
%
%
CC
Frequency Change with Temperature
= T to T
OSC
OSC
T
A
low
Oscillator Voltage Swing (Peak–to–Peak)
Discharge Current (V = 2.0 V)
high
V
–
1.6
–
–
1.6
–
V
OSC
I
mA
OSC
dischg
T = 25°C
7.8
7.5
–
8.3
–
–
8.8
8.8
–
7.8
7.6
7.2
8.3
–
–
8.8
8.8
8.8
J
T
= T
= T
to T
to T
(UC284XB, UC384XB)
(UC384XBV)
A
A
low
low
high
high
T
NOTES: 1. Maximum package power dissipation limits must be observed.
2. Adjust V above the Startup threshold before setting to 15 V.
CC
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T
=
=
=
0°C for UC3844B, UC3845B
– 25°C for UC2844B, UC2845B
– 40°C for UC3844BV, UC3845BV
T
= + 70°C for UC3844B, UC3845B
= + 85°C for UC2844B, UC2845B
= +105°C for UC3844BV, UC3845BV
low
high
2
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
ELECTRICAL CHARACTERISTICS (V
CC
= 15 V [Note 2], R = 10 k, C = 3.3 nF. For typical values T = 25°C, for min/max values T is
T
T
A
A
the operating ambient temperature range that applies [Note 3], unless otherwise noted.)
UC284XB
Typ
UC384XB, XBV
Characteristic
ERROR AMPLIFIER SECTION
Voltage Feedback Input (V = 2.5 V)
Symbol
Min
Max
Min
Typ
Max
Unit
V
I
2.45
–
2.5
– 0.1
90
2.55
–1.0
–
2.42
–
2.5
– 0.1
90
2.58
V
µA
O
FB
Input Bias Current (V
= 5.0 V)
– 2.0
FB
IB
Open Loop Voltage Gain (V = 2.0 V to 4.0 V)
A
VOL
65
0.7
60
65
0.7
60
–
–
–
dB
O
Unity Gain Bandwidth (T = 25°C)
BW
1.0
70
–
1.0
70
MHz
dB
J
Power Supply Rejection Ratio (V
= 12 V to 25 V)
PSRR
–
CC
Output Current
mA
Sink (V = 1.1 V, V
Source (V = 5.0 V, V
O
= 2.7 V)
I
Sink
Source
2.0
– 0.5
12
–1.0
–
–
2.0
– 0.5
12
–1.0
–
–
O
FB
= 2.3 V)
I
FB
Output Voltage Swing
V
High State (R = 15 k to ground, V
= 2.3 V)
FB
= 2.7 V)
V
OH
V
OL
5.0
6.2
–
5.0
6.2
–
L
Low State (R = 15 k to V , V
L
ref FB
(UC284XB, UC384XB)
–
–
0.8
–
1.1
–
–
–
0.8
0.8
1.1
1.2
(UC384XBV)
CURRENT SENSE SECTION
Current Sense Input Voltage Gain (Notes 4 & 5)
(UC284XB, UC384XB)
(UC384XBV)
A
V/V
V
V
2.85
–
3.0
–
3.15
–
2.85
2.85
3.0
3.0
3.15
3.25
Maximum Current Sense Input Threshold (Note 4)
(UC284XB, UC384XB)
(UC384XBV)
V
th
0.9
–
1.0
–
1.1
–
0.9
0.85
1.0
1.0
1.1
1.1
Power Supply Rejection Ratio
PSRR
–
70
–
–
70
–
dB
(V
CC
= 12 V to 25 V) (Note 4)
Input Bias Current
I
–
–
– 2.0
150
–10
300
–
–
– 2.0
150
–10
300
µA
IB
Propagation Delay (Current Sense Input to Output)
t
ns
PLH(In/Out)
OUTPUT SECTION
Output Voltage
Low State (I
V
V
= 20 mA)
= 200 mA, UC284XB, UC384XB)
= 200 mA, UC384XBV)
V
–
–
–
13
–
12
0.1
1.6
–
13.5
–
0.4
2.2
–
–
–
–
–
–
13
12.9
12
0.1
1.6
1.6
13.5
–
0.4
2.2
2.3
–
–
–
Sink
Sink
Sink
OL
(I
(I
High State (I
= 20 mA, UC284XB, UC384XB)
= 20 mA, UC384XBV)
= 200 mA)
V
OH
Source
Source
Source
(I
(I
13.4
–
13.4
Output Voltage with UVLO Activated
= 6.0 V, I = 1.0 mA
V
–
0.1
1.1
–
0.1
1.1
OL(UVLO)
V
CC
Sink
Output Voltage Rise Time (C = 1.0 nF, T = 25°C)
t
r
–
–
50
50
150
150
–
–
50
50
150
150
ns
ns
L
J
Output Voltage Fall Time (C = 1.0 nF, T = 25°C)
t
f
L
J
UNDERVOLTAGE LOCKOUT SECTION
Startup Threshold
UCX844B, BV
UCX845B, BV
V
V
V
th
15
7.8
16
8.4
17
9.0
14.5
7.8
16
8.4
17.5
9.0
Minimum Operating Voltage After Turn–On
UCX844B, BV
UCX845B, BV
V
CC(min)
9.0
7.0
10
7.6
11
8.2
8.5
7.0
10
7.6
11.5
8.2
NOTES: 2. Adjust V
above the Startup threshold before setting to 15 V.
CC
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T
T
T
= 0°C for UC3844B, UC3845B
= – 25°C for UC2844B, UC2845B
= – 40°C for UC3844BV, UC3845BV
T
= + 70°C for UC3844B, UC3845B
= + 85°C for UC2844B, UC2845B
= +105°C for UC3844BV, UC3845BV
low
low
low
high
high
igh
T
T
h
4. This parameter is measured at the latch trip point with V
= 0 V.
FB
V Output Compensation
V Current Sense Input
5. Comparator gain is defined as: A
=
V
3
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
ELECTRICAL CHARACTERISTICS (V
CC
= 15 V [Note 2], R = 10 k, C = 3.3 nF. For typical values T = 25°C, for min/max values T is
T
T
A
A
the operating ambient temperature range that applies [Note 3], unless otherwise noted.)
UC284XB
Typ
UC384XB, XBV
Characteristic
Symbol
Min
Max
Min
Typ
Max
Unit
PWM SECTION
Duty Cycle
%
Maximum (UC284XB, UC384XB)
Maximum (UC384XBV)
Minimum
DC
47
–
–
48
–
–
50
–
0
47
46
–
48
48
–
50
50
0
(max)
DC
(min)
TOTAL DEVICE
Power Supply Current
I
mA
V
CC
Startup (V
Start–Up (V
CC
Operating (Note 2)
= 6.5 V for UCX845B,
14 V for UCX844B, BV)
–
0.3
0.5
–
0.3
0.5
CC
–
12
36
17
–
–
12
36
17
–
Power Supply Zener Voltage (I
= 25 mA)
V
30
30
CC
Z
NOTES: 2. Adjust V
above the Startup threshold before setting to 15 V.
CC
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T
=
=
=
0°C for UC3844B, UC3845B
– 25°C for UC2844B, UC2845B
– 40°C for UC3844BV, UC3845BV
T
= + 70°C for UC3844B, UC3845B
= + 85°C for UC2844B, UC2845B
= +105°C for UC3844BV, UC3845BV
low
high
Figure 1. Timing Resistor
Figure 2. Output Deadtime
versus Oscillator Frequency
versus Oscillator Frequency
80
50
75
V
= 15 V
= 25°C
CC
3
1. C = 10 nF
2. C = 5.0 nF
3. C = 2.0 nF
4. C = 1.0 nF
T
T
T
T
T
T
T
T
A
70
65
2
4
20
5. C = 500 pF
6. C = 200 pF
7. C = 100 pF
1
8.0
5.0
60
55
7
5
2.0
0.8
NOTE: Output switches at
1/2 the oscillator frequency
6
50
10 k
10 k
20 k
50 k
100 k
200 k
500 k
1.0 M
20 k
50 k 100 k
200 k
500 k
1.0 M
f
, OSCILLATOR FREQUENCY (kHz)
f
, OSCILLATOR FREQUENCY (kHz)
OSC
OSC
Figure 3. Error Amp Small Signal
Transient Response
Figure 4. Error Amp Large Signal
Transient Response
V
= 15 V
= –1.0
V
= 15 V
CC
CC
A = –1.0
V
A
V
A
2.55 V
3.0 V
T
= 25
°C
T = 25°C
A
2.5 V
2.5 V
2.0 V
2.45 V
0.5
µs/DIV
1.0 µs/DIV
4
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 5. Error Amp Open Loop Gain and
Figure 6. Current Sense Input Threshold
versus Error Amp Output Voltage
Phase versus Frequency
0
30
1.2
1.0
0.8
0.6
0.4
0.2
0
100
80
60
40
20
V
= 15 V
V
= 15 V
= 2.0 V to 4.0 V
= 100 k
CC
CC
V
R
O
L
Gain
T
= 25°C
A
60
T
= 25°C
A
90
T
= 125°C
Phase
A
120
150
180
T
= – 55°C
A
0
– 20
0
2.0
4.0
6.0
8.0
10
100
1.0 k
10 k
100 k
1.0 M
10 M
V
, ERROR AMP OUTPUT VOLTAGE (V )
O
f, FREQUENCY (Hz)
O
Figure 7. Reference Voltage Change
versus Source Current
Figure 8. Reference Short Circuit Current
versus Temperature
0
110
V
= 15 V
≤ 0.1 Ω
CC
V
= 15 V
CC
R
L
– 4.0
– 8.0
– 12
– 16
– 20
– 24
90
T
= –55°C
A
T
= 125°C
A
70
50
T
= 25°C
A
0
20
40
60
80
100
120
– 55
– 25
0
25
50
75
100
125
I
, REFERENCE SOURCE CURRENT (mA)
T , AMBIENT TEMPERATURE (°C)
ref
A
Figure 9. Reference Load Regulation
Figure 10. Reference Line Regulation
V
= 15 V
= 1.0 mA to 20 mA
= 25°C
CC
V
= 12 V to 25 V
CC
= 25°C
I
T
O
T
A
A
2.0 ms/DIV
2.0 ms/DIV
5
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 11. Output Saturation Voltage
versus Load Current
Figure 12. Output Waveform
0
–1.0
– 2.0
Source Saturation
(Load to Ground)
V
80
= 15 V
s Pulsed Load
CC
V
V
C
T
= 15 V
= 1.0 nF
= 25°C
CC
CC
L
µ
T
= 25°C
A
90%
120 Hz Rate
A
T
= – 55°C
A
3.0
2.0
1.0
0
T
= – 55°C
A
T
= 25°C
A
10%
Sink Saturation
(Load to V
)
Gnd
600
CC
0
200
400
800
50 ns/DIV
I
, OUTPUT LOAD CURRENT (mA)
O
Figure 13. Output Cross Conduction
Figure 14. Supply Current versus Supply Voltage
25
V
C
= 30 V
= 15 pF
= 25°C
CC
L
20
15
10
5
T
A
R
C
V
T
T
FB
I
T
Sense
A
0
0
10
20
30
40
100 ns/DIV
V
, SUPPLY VOLTAGE (V)
CC
PIN FUNCTION DESCRIPTION
Pin
8–Pin
14–Pin
Function
Description
This pin is the Error Amplifier output and is made available for loop compensation.
1
2
1
3
Compensation
Voltage
Feedback
This is the inverting input of the Error Amplifier. It is normally connected to the switching power
supply output through a resistor divider.
3
4
5
7
Current Sense
A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction.
R /C
T
The Oscillator frequency and maximum Output duty cycle are programmed by connecting
T
resistor R to V and capacitor C to ground. Oscillator operation to 1.0 kHz is possible.
T
ref
T
5
6
Gnd
This pin is the combined control circuitry and power ground.
10
Output
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced
and sunk by this pin. The output switches at one–half the oscillator frequency.
7
8
12
14
V
This pin is the positive supply of the control IC.
CC
V
ref
This is the reference output. It provides charging current for capacitor C through
T
resistor R .
T
8
Power
Ground
This pin is a separate power ground return that is connected back to the power source. It is used
to reduce the effects of switching transient noise on the control circuitry.
11
V
The Output high state (V ) is set by the voltage applied to this pin. With a separate power
OH
C
source connection, it can reduce the effects of switching transient noise on the control circuitry.
This pin is the control circuitry ground return and is connected back to the power source ground.
No connection. These pins are not internally connected.
9
Gnd
NC
2,4,6,13
6
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
OPERATING DESCRIPTION
power supply is operating and the load is removed, or at the
The UC3844B, UC3845B series are high performance,
fixed frequency, current mode controllers. They are
specifically designed for Off–Line and dc–to–dc converter
applications offering the designer a cost–effective solution
with minimal external components. A representative block
diagram is shown in Figure 15.
beginning of a soft–start interval (Figures 20, 21). The Error
Amp minimum feedback resistance is limited by the
amplifier’s source current (0.5 mA) and the required output
voltage (V
) to reach the comparator’s 1.0 V clamp level:
OH
3.0 (1.0 V) + 1.4 V
R
≈
= 8800 Ω
f(min)
Oscillator
0.5 mA
The oscillator frequency is programmed by the values
selected for the timing components R and C . Capacitor C
is charged from the 5.0 V reference through resistor R to
T
approximately 2.8 V and discharged to 1.2 V by an internal
T
T
T
Current Sense Comparator and PWM Latch
The UC3844B, UC3845B operate as a current mode
controller, whereby output switch conduction is initiated by
the oscillator and terminated when the peak inductor current
reaches the threshold level established by the Error Amplifier
Output/Compensation (Pin 1). Thus the error signal controls
the peak inductor current on a cycle–by–cycle basis. The
Current Sense Comparator PWM Latch configuration used
ensures that only a single pulse appears at the Output during
any given oscillator cycle. The inductor current is converted
to a voltage by inserting the ground–referenced sense
current sink. During the discharge of C , the oscillator
T
generates an internal blanking pulse that holds the center
input of the NOR gate high. This causes the Output to be in a
low state, thus producing a controlled amount of output
deadtime. An internal flip–flop has been incorporated in the
UCX844/5B which blanks the output off every other clock
cycle by holding one of the inputs of the NOR gate high. This
in combination with the C discharge period yields output
T
deadtimes programmable from 50% to 70%. Figure 1 shows
resistor R in series with the source of output switch Q1. This
S
R
versus Oscillator Frequency and Figure 2, Output
T
voltage is monitored by the Current Sense Input (Pin 3) and
compared to a level derived from the Error Amp Output. The
peak inductor current under normal operating conditions is
controlled by the voltage at Pin 1 where:
Deadtime versus Frequency, both for given values of C .
Note that many values of R and C will give the same
T
T
T
oscillator frequency but only one combination will yield a
specific output deadtime at a given frequency. The oscillator
thresholds are temperature compensated to within ±6% at 50
kHz. Also, because of industry trends moving the UC384X
into higher and higher frequency applications, the UC384XB
is guaranteed to within ±10% at 250 kHz.
V
– 1.4 V
(Pin 1)
3 R
S
I
pk
=
Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:
In many noise–sensitive applications it may be desirable
to frequency–lock the converter to an external system clock.
This can be accomplished by applying a clock signal to the
circuit shown in Figure 17. For reliable locking, the
free–running oscillator frequency should be set about 10%
less than the clock frequency. A method for multi–unit
synchronization is shown in Figure 18. By tailoring the clock
waveform, accurate Output duty cycle clamping can be
achieved to realize output deadtimes of greater than 70%.
1.0 V
I
=
pk(max)
R
S
When designing a high power switching regulator it
becomes desirable to reduce the internal clamp voltage in
Error Amplifier
A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical dc
voltage gain of 90 dB, and a unity gain bandwidth of 1.0 MHz
with 57 degrees of phase margin (Figure 5). The
non–inverting input is internally biased at 2.5 V and is not
pinned out. The converter output voltage is typically divided
down and monitored by the inverting input. The maximum
input bias current is –2.0 µA which can cause an output
voltage error that is equal to the product of the input bias
current and the equivalent input divider source resistance.
The Error Amp Output (Pin 1) is provided for external loop
compensation (Figure 28). The output voltage is offset by two
diode drops (≈1.4 V) and divided by three before it connects
to the inverting input of the Current Sense Comparator. This
guarantees that no drive pulses appear at the Output (Pin 6)
order to keep the power dissipation of R to a reasonable
S
level. A simple method to adjust this voltage is shown in
Figure 19. The two external diodes are used to compensate
the internal diodes, yielding a constant clamp voltage over
temperature. Erratic operation due to noise pickup can result
if there is an excessive reduction of the I
voltage.
clamp
pk(max)
A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Current Sense Input with a
time constant that approximates the spike duration will
usually eliminate the instability (refer to Figure 23).
when Pin 1 is at its lowest state (V ). This occurs when the
OL
7
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 15. Representative Block Diagram
V
V
in
CC
V
CC
7(12)
36V
V
ref
Reference
Regulator
8(14)
(See
Text)
+
–
V
R
R
CC
UVLO
V
Internal
Bias
C
2.5V
R
C
T
7(11)
+
3.6V
V
ref
UVLO
–
Output
Q1
Oscillator
4(7)
6(10)
T
+
1.0mA
S
Power Ground
2R
Q
Voltage
Feedback
Input
PWM
Latch
R
5(8)
2(3)
1(1)
R
Error
Amplifier
1.0V
Current Sense Input
Output/
Compensation
Current Sense
Comparator
3(5)
R
S
Gnd
5(9)
Pin numbers adjacent to terminals are for the 8–pin dual–in–line package.
Pin numbers in parenthesis are for the D suffix SO–14 package.
= Sink Only Positive True Logic
Figure 16. Timing Diagram
Capacitor C
T
Latch “Set”
Input
Output/
Compensation
Current Sense
Input
Latch “Reset”
Input
Output
Small R /Large C
T
Large R /Small C
T
T
T
8
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Undervoltage Lockout
added flexibility in tailoring the drive voltage independent of
. A zener clamp is typically connected to this input when
V
Two undervoltage lockout comparators have been
incorporated to guarantee that the IC is fully functional before
the output stage is enabled. The positive power supply
CC
driving power MOSFETs in systems where V
is greater
CC
than 20 V. Figure 22 shows proper power and control ground
connections in a current–sensing power MOSFET
application.
terminal (V ) and the reference output (V ) are each
CC
ref
monitored by separate comparators. Each has built–in
hysteresis to prevent erratic output behavior as their
Reference
respective thresholds are crossed. The V
CC
upper and lower thresholds are 16 V/10 V for the UCX844B,
and 8.4 V/7.6 V for the UCX845B. The V comparator upper
and lower thresholds are 3.6 V/3.4 V. The large hysteresis
and low startup current of the UCX844B makes it ideally
suited in off–line converter applications where efficient
bootstrap startup techniques are required (Figure 29). The
UCX845B is intended for lower voltage dc–to–dc converter
applications. A 36 V zener is connected as a shunt regulator
comparator
The 5.0 V bandgap reference is trimmed to ±1.0%
tolerance at T = 25°C on the UC284XB, and ±2.0% on the
J
ref
UC384XB. Its primary purpose is to supply charging current
to the oscillator timing capacitor. The reference has
short–circuit protection and is capable of providing in excess
of 20 mA for powering additional control system circuitry.
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. High frequency
circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low–current signal and
high–current switch and output grounds returning on
separate paths back to the input filter capacitor. Ceramic
from V
to ground. Its purpose is to protect the IC from
CC
excessive voltage that can occur during system startup. The
minimum operating voltage for the UCX844B is 11 V and 8.2
V for the UCX845B.
Output
These devices contain a single totem pole output stage
that was specifically designed for direct drive of power
MOSFETs. It is capable of up to ±1.0 A peak drive current and
has a typical rise and fall time of 50 ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
Output in a sinking mode whenever an undervoltage lockout
is active. This characteristic eliminates the need for an
external pull–down resistor.
The SO–14 surface mount package provides separate
pins for V (output supply) and Power Ground. Proper
implementation will significantly reduce the level of switching
transient noise imposed on the control circuitry. This
becomesparticularlyusefulwhenreducingtheI
bypass capacitors (0.1 µF) connected directly to V , V ,
CC
C
and V may be required depending upon circuit layout. This
ref
provides a low impedance path for filtering the high frequency
noise. All high current loops should be kept as short as
possible using heavy copper runs to minimize radiated EMI.
The Error Amp compensation circuitry and the converter
output voltage divider should be located close to the IC and
as far as possible from the power switch and other
noise–generating components.
C
clamp
pk(max)
level. The separate V supply input allows the designer
C
Figure 17. External Clock Synchronization
Figure 18. External Duty Cycle Clamp and
Multi–Unit Synchronization
V
ref
8(14)
R
8(14)
R
R
Bias
A
B
Bias
R
T
R
R
8
4
R
5.0k
5.0k
6
3
7
Osc
Osc
4(7)
4(7)
C
R
S
T
+
+
5
2
Q
0.01
2R
2R
External
Sync
Input
EA
R
EA
R
2(3)
1(1)
2(3)
1(1)
5.0k
1
47
C
MC1455
5(9)
5(9)
To Additional
UCX84XBs
The diode clamp is required if the Sync amplitude is large enough to cause
1.44
2R )C
R
A
f
D
(max)
the bottom side of C to go more than 300 mV below ground.
(R
R
A
2R
B
T
A
B
9
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 19. Adjustable Reduction of Clamp Level
Figure 20. Soft–Start Circuit
V
V
in
CC
7(12)
5.0V Ref
8(14)
R
R
5.0V Ref
Bias
8(14)
4(7)
R
R
+
–
Bias
+
–
7(11)
+
–
Osc
Q1
4(7)
T
Osc
+
T
6(10)
S
R
1.0mA
V
+
Clamp
1.0V
2(3)
1.0M
1(1)
Q
R
R
2
1
S
R
1.0 mA
2R
2R
R
Q
EA
5(8)
3(5)
EA
2(3)
1(1)
R
1.0V
Comp/Latch
R
S
C
5(9)
5(9)
t
≈ 3600C in µF
Soft–Start
R R
1.67
1
2
R
2
Where: 0
≤
V
≤
1.0 V
–3
Clamp
V
≈
+ 0.33x10
Clamp
R
R
R
2
1
1
1
V
Clamp
I
pk(max)
R
S
Figure 21. Adjustable Buffered Reduction of
Clamp Level with Soft–Start
Figure 22. Current Sensing Power MOSFET
V
V
in
CC
V
V
in
CC
R
I
r
pk DS(on)
S
V
(12)
Pin
5
7(12)
r
R
S
DM(on)
If: SENSEFET
=
=
MTP10N10M
200
R
S
5.0V Ref
5.0V Ref
Then :
V
0.075 I
pk
Pin
5
8(14)
4(7)
+
–
R
R
+
–
Bias
D
SENSEFET
(11)
(10)
7(11)
6(10)
+
–
+
–
S
K
G
Q1
Osc
T
T
M
+
V
Clamp
S
R
S
R
1.0 mA
Q
Q
(8)
(5)
2R
R
5(8)
3(5)
EA
2(3)
1(1)
Comp/Latch
Comp/Latch
1.0V
5(9)
Power Ground:
To Input Source
Return
R
2
R
S
R
S
1/4 W
R
C
1
Control Circuitry Ground:
To Pin (9)
MPSA63
1.67
Where: 0
≤
V
≤ 1.0 V
Clamp
V
≈
Clamp
Virtually lossless current sensing can be achieved with the implementation
of a SENSEFET power switch. For proper operation during over–current
R
R
2
1
1
conditions, a reduction of the I
Refer to Figures 19 and 21.
clamp level must be implemented.
pk(max)
V
V
C
R
1
R
Clamp
1
2
t
In
1
C
I
pk(max)
Soft-Start
3V
R
R
R
Clamp
2
S
10
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 23. Current Waveform Spike Suppression
V
V
CC
in
7(12)
5.0V Ref
+
–
7(11)
+
The addition of the RC filter will eliminate
instability caused by the leading edge spike
on the current waveform.
–
Q1
T
6(10)
5(8)
S
R
Q
3(5)
R
Comp/Latch
C
R
S
Figure 24. MOSFET Parasitic Oscillations
Figure 25. Bipolar Transistor Drive
V
V
CC
in
I
B
7(12)
+
0
V
in
Base Charge
Removal
5.0V Ref
–
+
–
C1
+
–
7(11)
R
Q1
Q1
g
6(10)
T
6(10)
S
R
Q
5(8)
5(8)
3(5)
Comp/Latch
3(5)
R
S
R
S
Series gate resistor R will damp any high frequency
g
The totem pole output can furnish negative base current
for enhanced transistor turn–off, with the addition of
parasitic oscillations caused by the MOSFET input
capacitance and any series wiring inductance in the
gate–source circuit.
capacitor C .
1
11
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 26. Isolated MOSFET Drive
V
V
in
CC
7(12)
Isolation
Boundary
5.0V Ref
+
–
V
Waveforms
+
GS
+
0
–
+
–
7(11)
Q1
0
–
50% DC
25% DC
T
6(10)
5(8)
S
R
V
– 1.4
Q
(Pin 1)
3 R
N
S
p
I
=
pk
N
S
R
3(5)
Comp/Latch
C
R
S
N
S
N
P
Figure 27. Latched Shutdown
8(14)
R
Bias
R
Osc
4(7)
+
1.0 mA
2R
R
2(3)
1(1)
EA
MCR
101
2N
3905
5(9)
2N
3903
The MCR101 SCR must be selected for a holding of < 0.5 mA @ T
simple two transistor circuit can be used in place of the SCR as shown. All
resistors are 10 k.
. The
A(min)
Figure 28. Error Amplifier Compensation
2.5V
2.5V
From V
From V
O
O
+
+
1.0mA
1.0mA
2R
2R
R
i
R
p
p
R
2(3)
2(3)
i
R
R
C
EA
C
EA
C
R
R
f
f
R
d
R
d
f
f
1(1)
1(1)
R
≥ 8.8k
f
5(9)
5(9)
Error Amp compensation circuit for stabilizing any current mode topology except
for boost and flyback converters operating with continuous inductor current.
Error Amp compensation circuit for stabilizing current mode boost
and flyback topologies operating with continuous inductor current.
12
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 29. 7 W Off–Line Flyback Regulator
L1
MBR1635
2200
5.0V/4.0A
4.7
Ω
+
T1
4.7k
+
+
+
+
250
MDA
202
3300
pF
1000
56k
115 Vac
5.0V RTN
12V/0.3A
MUR110
1000
1N4935 1N4935
L2
10
68
+
7(12)
+
47
100
±12V RTN
5.0V Ref
1000
10
L3
1N4937
+
+
0.01
8(14)
33k
+
–
R
R
–12V/0.3A
MUR110
Bias
7(11)
6(10)
+
–
680pF
1N4937
2.7k
22
Osc
4(7)
2(3)
MTP
4N50
T
1.0nF
+
1N5819
S
R
18k
Q
5(8)
3(5)
100
pF
EA
150k
1.0k
Comp/Latch
4.7k
1(1)
0.5
470pF
5(9)
T1 –Primary: 45 Turns #26 AWG
Secondary 12 V: 9 Turns #30 AWG (2 Strands) Bifiliar Wound
L1
L2, L3
– 15
– 25
µ
µ
H at 5.0 A, Coilcraft Z7156
H at 5.0 A, Coilcraft Z7157
±
Secondary 5.0 V: 4 Turns (six strands) #26 Hexfiliar Wound
Secondary Feedback: 10 Turns #30 AWG (2 strands) Bifiliar Wound
Core: Ferroxcube EC35–3C8
Bobbin: Ferroxcube EC35PCB1
Gap:
≈
0.10” for a primary inductance of 1.0 mH
Test
Conditions
Results
Line Regulation: 5.0 V
V
in
= 95 Vac to 130 Vac
∆ = 50 mV or ±0.5%
∆ = 24 mV or ±0.1%
±12 V
Load Regulation: 5.0 V
V
in
V
in
= 115 Vac, I
= 115 Vac, I
= 1.0 A to 4.0 A
= 100 mA to 300 mA ∆ = 60 mV or ±0.25%
∆ = 300 mV or ±3.0%
out
out
±12 V
Output Ripple:
Efficiency
5.0 V
±12 V
V
= 115 Vac
40 mV
80 mV
in
pp
pp
V
in
= 115 Vac
70%
All outputs are at nominal load currents unless otherwise noted.
13
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
Figure 30. Step–Up Charge Pump Converter
Output Load Regulation
(Open Loop Configuration)
V
= 15V
in
7(12)
I
(mA)
V
(V)
O
UC3845B
O
+
47
0
2
9
18
36
29.9
28.8
28.3
27.4
24.4
34V
Reference
Regulator
8(14)
10k
+
–
V
R
R
CC
UVLO
1N5819
2.5V
7(11)
6(10)
Internal
Bias
+
–
V
3.6V
ref
15
10
1N5819
UVLO
Osc
V
≈
2 (V )
in
O
+
4(7)
2(3)
1.0nF
T
+
+
Connect to
Pin 2 for
closed loop
operation.
47
S
R
0.5mA
5(8)
3(5)
R2
R1
2R
Q
PWM
Latch
1.0V
R
Error
Amplifier
Current Sense
Comparator
1(1)
R2
1
V
= 2.5
5(9)
O
R1
The capacitor’s equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor
may be required when using tantalum or other low ESR capacitors. The converter’s output can provide excellent line
and load regulation by connecting the R2/R1 resistor divider as shown.
Figure 31. Voltage–Inverting Charge Pump Converter
V
= 15V
Output Load Regulation
in
UC3845B
7(12)
I
O
(mA)
V
(V)
O
+
47
0
2
9
18
32
–14.4
–13.2
–12.5
–11.7
–10.6
34V
Reference
Regulator
8(14)
R
R
+
–
V
CC
UVLO
2.5V
7(11)
6(10)
Internal
Bias
10k
+
–
V
3.6V
ref
15
10
UVLO
1N5819
V
≈
–V
in
Osc
O
4(7)
2(3)
1.0nF
T
+
1N5819
+
47
S
R
0.5mA
5(8)
3(5)
2R
Q
PWM
Latch
1.0V
R
Error
Amplifier
Current Sense
Comparator
1(1)
5(9)
The capacitor’s equivalent series resistance must limit the Drive Output current to 1.0 A.
An additional series resistor may be required when using tantalum or other low ESR capacitors.
OUTLINE DIMENSIONS
14
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
N SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
8
5
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
–B–
MILLIMETERS
INCHES
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MIN
9.40
6.10
3.94
0.38
1.02
MAX
10.16
6.60
4.45
0.51
1.78
MIN
MAX
0.400
0.260
0.175
0.020
0.070
0.370
0.240
0.155
0.015
0.040
F
–A–
NOTE 2
L
2.54 BSC
0.100 BSC
0.76
0.20
2.92
7.62 BSC
–––
1.27
0.30
3.43
0.030
0.008
0.115
0.300 BSC
–––
0.050
0.012
0.135
C
10
1.01
10
0.040
0.76
0.030
J
M
–T–
SEATING
PLANE
N
D
K
G
H
M
M
M
0.13 (0.005)
T
A
B
D1 SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
NOTES:
ISSUE N
1. DIMENSIONING AND TOLERANCING PER
–A–
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
8
5
4
4X P
–B–
M
M
0.25 (0.010)
B
1
G
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
MIN
4.80
3.80
1.35
0.35
0.40
MAX
5.00
4.00
1.75
0.49
1.25
MIN
MAX
0.196
0.157
0.068
0.019
0.049
0.189
0.150
0.054
0.014
0.016
R X 45
F
C
SEATING
PLANE
–T–
1.27 BSC
0.050 BSC
K
J
M
0.18
0.10
0
0.25
0.25
7
0.007
0.004
0
0.009
0.009
7
8X D
0.25 (0.010)
M
S
S
T
B
A
5.80
0.25
6.20
0.50
0.229
0.010
0.244
0.019
R
15
MOTOROLA ANALOG IC DEVICE DATA
UC3844B, 45B UC2844B, 45B
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
–A–
ISSUE F
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
14
1
8
7
–B–
P 7 PL
M
M
0.25 (0.010)
B
MILLIMETERS
INCHES
G
DIM
A
B
C
D
F
G
J
K
M
P
MIN
8.55
3.80
1.35
0.35
0.40
MAX
8.75
4.00
1.75
0.49
1.25
MIN
MAX
0.344
0.157
0.068
0.019
0.049
F
R X 45
C
0.337
0.150
0.054
0.014
0.016
–T–
SEATING
PLANE
J
M
1.27 BSC
0.050 BSC
K
D 14 PL
0.19
0.10
0
0.25
0.25
7
0.008
0.004
0
0.009
0.009
7
M
S
S
0.25 (0.010)
T
B
A
5.80
0.25
6.20
0.50
0.228
0.010
0.244
0.019
R
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specificallydisclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
datasheetsand/orspecificationscananddovaryindifferentapplicationsandactualperformancemayvaryovertime. Alloperatingparameters,including“Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applicationsintended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
ordeathmayoccur. ShouldBuyerpurchaseoruseMotorolaproductsforanysuchunintendedorunauthorizedapplication,BuyershallindemnifyandholdMotorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arisingoutof,directlyorindirectly,anyclaimofpersonalinjuryordeathassociatedwithsuchunintendedorunauthorizeduse,evenifsuchclaimallegesthatMotorola
was negligent regarding the design or manufacture of the part. Motorola and
Opportunity/Affirmative Action Employer.
re registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
UC3844B/D
◊
相关型号：
©2020 ICPDF网 联系我们和版权申明