HF01B00DP [MPS]
Off Line High Voltage Quasi Resonant Regulator;
| 型号： | HF01B00DP |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Off Line High Voltage Quasi Resonant Regulator |
| 文件： | 总16页 (文件大小：902K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HF01B00/01/02/03/04
Off Line High Voltage
Quasi Resonant Regulator
DESCRIPTION
The HF01B00/01/02/03/04 is a flyback regulator
with Green Mode Operation. Its high efficiency
feature over the entire input/load range meets
FEATURES
Internal Integrated 700V MOSFET
High Level of Integration, Requires Very
Few External Components
Universal Input Voltage (85~265VAC)
Quasi-Resonant Operation over the Entire
Input and Load Range
the
stringent
world-wide
energy-saving
requirements.
The HF01B00/01/02/03/04 is an integrated
current mode controller with a 700V FET. Its
valley switching detector ensures minimum
Drain-Source voltage switching every cycle, per
Quasi-resonant operation. When the output
power falls below a given level, the regulator
enters the burst mode to lower the stand-by
power consumption.
Maximum Switching Frequency Limited
Valley Switching for High Efficiency and
Better EMI Performance
Active Burst Mode for Low Standby Power
Consumption
Internal High-Voltage Current Source for
Start-Up
An internal minimum off time limiter prevents
the switching frequency from exceeding 150
kHz, which is below the CISPR-22 EMI start
limit. Internal 2.4ms soft start prevents the
excessive inrush current during start up
Internal Soft Start
Internal 320ns Leading Edge Blanking
Thermal Shutdown (Auto Restart with
Hysteresis)
VCC Under Voltage Lockout with Hysteresis
(UVLO)
Over Voltage Protection
Over Load Protection.
The HF01B00/01/02/03/04 provides various
protections, such as Thermal Shutdown (TSD),
VCC Under Voltage Lockout (UVLO), Over Load
Protection (OLP), Over Voltage Protection
(OVP) and so on.
No Load Consumption at 265Vac
HF01B00<100mW
HF01B01<80mW
HF01B02/03<50mW
HF01B04<30mW
The HF01B00/01/02/03 is available in PDIP8-7B
package. And HF01B04 is available in PDIP8-7B
and SOIC8-7B packages.
Maximum Output Power4
APPLICATIONS
230Vac±15%3
85Vac~265Vac
Battery charger for consumer and home
equipment.
P/N
Open
Adapter1
Open
Adapter1
Frame2
Frame2
Standby power supply.
Small power SMPS for white goods and
consumer electronics.
HF01B00DP
HF01B01DP
HF01B02DP
35W
29W
24W
54W
45W
33W
23W
18W
14W
30W
23W
17W
Low/Medium power AC/DC adapter.
For MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
HF01B03DP
HF01B04DP
HF01B04DS
Notes:
22W
19W
19W
30W
23W
23W
11W
8W
8W
13W
11W
11W
1. Maximum continuous power in a non-ventilated enclosed
adapter measured at 50℃ambient temperature.
2. Maximum continuous power in an open frame design at 50℃
ambient temperature.
3. 230Vac or 110/115Vac with doubler.
4. The junction temperature can limit the maximum output power.
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
TYPICAL APPLICATION
T1
Output
RTN
*
Input
85-265VAC
*
HF051B00/01/02/03/04
*
4
S
D
6
S
2
1
7
8
GND
FB
VCC
VSD
Figure 1—Typical Application
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
ORDERING INFORMATION
Part Number
Package
Top Marking
Free Air Temperature (TA)
HF01B00DP*
HF01B01DP
HF01B02DP
HF01B03DP
HF01B04DP
HF01B04DS**
HF01B00
HF01B01
HF01B02
HF01B03
HF01B04
HF01B04
PDIP8-7B
SOIC8-7B
-40C to +85C
-40C to +85C
*For RoHS, compliant packaging, add suffix –LF (e.g. HF01B00DP–LF).
** For Tape & Reel, add suffix –Z (e.g. HF01B04DS–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. HF01B04DS–LF–Z).
PACKAGE REFERENCE
PDIP8-7B & SOIC8-7B
ABSOLUTE MAXIMUM RATINGS (1)
Recommended Operation Conditions (3)
VCC to GND........................................ 8V to 20V
Maximum Junction Temp. (TJ)............... +125C
Drain to Source........................... -0.7V to 700V
(2)
Continuous Drain Switch Current
Thermal Resistance (4)
θJA θJC
--HF01B00DP, TA=25C............................1.94A
--HF01B01DP, TA=25C............................1.47A
--HF01B02DP, TA=25C ...........................1.14A
--HF01B03DP, TA=25C ...........................0.96A
--HF01B04DP, TA=25C ...........................0.81A
--HF01B04DS, TA=25C ...........................0.88A
VCC to GND.................................... -0.3V to 22V
VSD, FB, S to GND ......................... -0.3V to 7V
Junction Temperature..............................150C
Thermal Shut Down.................................150C
Thermal Shut Down Hysteresis..................40C
PDIP8-7B ..............................105 .....45 ...C/W
SOIC8-7B...............................96 ......45 ...C/W
Notes:
1) Exceeding these ratings may damage the device.
2) Continuous Drain switch current when inductor load is
assumed: limited by maximum duty and maximum junction
temperature. And the data get from the following conditions:
Ipeak
Lead Temperature ...................................260C
Storage Temperature ..............-60°C to +150C
ESD Capability Human Body Model (All Pins
except D) .................................................2.0kV
ESD Capability Machine Model..................200V
D=50%
Fs=100kHz
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
ELECTRICAL CHARACTERISTICS
VCC =12V, TA=+25℃, unless otherwise noted
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Start-up Current Source (Pin D)
VCC =6V;
VD=400V
VCC =13V;
VD=400V
Supply current from Pin D
Leakage current from Pin D
Icharge
1.4
2
2.6
mA
Ileak
20
μA
Break Down Voltage
HF01B00
V(BR)DSS
700
--
V
1.9
3.3
5.5
7.7
11
HF01B01
VCC =10V;
ID=100mA
On-State Resistance
HF01B02
HF01B03
HF01B04
RDS(ON)
Ω
Supply Voltage Management (Pin Vcc)
VCC Upper Level at which the Internal
High Voltage Current Source Stops
VCC Lower Level at which the Internal
High Voltage Current Source Triggers
VCC Decreasing Level at which the
Latchoff Phase Ends
VCCH
VCCL
10.6
7.2
11.8
8
13
V
V
8.8
Vcclatch
ILatch
5.5
400
V
Internal IC Consumption, Latchoff Phase
VCC =6.0V
μA
Feedback Management (Pin FB)
Internal Pull Up Resistor
Internal Pull Up Voltage
Pin8 to Current Set point Division Ratio
Internal Soft-Start Time
FB Decreasing Level at which the
Regulator enter the Burst Mode
FB Increasing Level at which the
Regulator leave the Burst Mode
Over Load Set Point
RFB
Vup
Idiv
10
4.5
3.3
2.4
kΩ
V
Tss
ms
V
VBURL
0.5
VBURH
VOLP
0.7
3.7
V
V
Valley Switching Detector (Pin VSD)
Valley Point Detection Threshold Voltage
Valley Point Detection Hysteresis
VVSD
Vhys
30
45
10
60
mV
mV
VVSDH
High
Ipin=3.0mA
Low State
Ipin=-2.0mA
Pull down from
2V to -100mV
State
7
7.8
-0.65
150
8.6
-0.5
210
V
V
Pin VSD Clamp Voltage
VVSDL
TVSD
-0.8
90
Valley Point Detection Delay
ns
Parasitical Capacitance at Pin VSD
Minimum Off Time
Cpar
Tmin
10
7.8
pF
μs
6.6
9
Re-start time After Last Valley Point
Detection Transition
Trestart
4.6
μs
OVP Sampling Delay
Pin VSD OVP reference level
Internal Impedance
TOVPS
VOVP
Rint
3.5
6
24
μs
V
kΩ
Current Sampling Management (Pin S)
Leading Edge Blanking
Maximum current set-point
TLEB
VCS
320
1
ns
V
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
PIN FUNCTIONS
Pin #
Name
Description
Valley switching detector of the auxiliary flyback signal. It ensures Discontinuous Conduction
Mode (DCM) operation with valley switching over the entire input/load range. This pin also
offers OVP detection.
1
VSD
Supply voltage pin. Typically connect a 22μF bulk capacitor and a 0.1uF ceramic capacitor
to this Pin. When VCC is charged to 12V, the internal high voltage current source turns off
and the IC starts switching; when it falls back to 8V, the high voltage current source turns on
again and the IC stops switching.
2
VCC
3
4
5
6
7
N/C
D
Not connected. This pin ensures adequate creepage distance.
Drain of the internal MOSFET. Input for the start up high voltage current source.
Source of the internal MOSFET. Input of the primary current sense signal.
Source of the internal MOSFET. Input of the primary current sense signal.
The IC Ground.
S
S
GND
This pin sets the primary peak current limit, by directly connecting an optocoupler to this pin
to close the feedback loop. A feedback voltage of 3.7V on this pin will trigger an Over Load
Protection while 0.5V will trigger a Burst Mode operation. The regulator leaves Burst Mode
Operation and enters normal operation when the FB voltage reaches 0.7V
8
FB
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
FUNCTION BLOCK DIAGRAM
Power
Management
Vcc(2)
D(4)
Start Up Unit
Driving
Signal
Management
Valley
Detector
VSD(1)
S (5)
S (6)
Peak
Current
Limitation
Protection
Unit
Burst Mode
Control
FB(8)
GND(7)
Figure 2—Block Diagram
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
OPERATION
The HF01B00/01/02/03/04 incorporates all the
necessary features to build a reliable Switch
Mode Power Supply. Its high level of integration
requires very few external components. Quasi-
Resonant operation over entire input/load range
results in high efficiency and better EMI
performance. It also has burst mode operation to
minimize the stand-by power consumption at light
load. Protection features such as latched shutdown
or auto-recovery for over-current, over-voltage or
over-temperature contribute to a safer converter
design without engendering additional circuitry
complexity.
Soft-Start
To reduce stress on the primary MOSFET and
the secondary diode during start-up and to
smoothly establish the output voltage, the
HF01B00/01/02/03/04 has an internal soft-start
circuit that gradually increases the primary
current sense threshold, which determines the
MOSFET peak current during start-up. The pulse
width of the power switching device is
progressively increased to establish correct
operating conditions until the feedback control
loop takes charge.
Start-up and VCC UVLO
Initially, the IC is driven by the internal high
voltage current source, which is drawn from the
D pin.
Primary Current
The IC starts switching and the internal high-
voltage current source turns off as soon as the
voltage on pin Vcc reaches 11.8V. At this point,
the supply of the IC is taken over by the auxiliary
winding of the transformer, when Vcc falls below
8V, the regulator stops switching and the internal
high-voltage current source turns on again.
Vcc
Regulation Occurs Here
Auxiliary Winding Takes Charge
Figure 4—Soft Start
11.8V
Valley Switching Detection
8V
The
HF01B00/01/02/03/04
operates
in
Discontinuous Conduction Mode (DCM). The
valley switching detector ensures minimum
Drain-Source voltage switching, per Quasi-
resonant operation.
Drain
Switching Pluses
Valley switching detection is accomplished
through monitoring the voltage of the auxiliary
winding at the VSD pin. The voltage presents a
flyback polarity and the valley switching detection
threshold is 45mV. When the voltage on auxiliary
winding falls below 45mV, the drain-source
voltage of the MOSFET become the lowest,
which is called ‘valley point’, at this point the
valley switching detector activates the controller
to switch on the MOSFET to ensure the minimum
High voltage
current source
On
Off
Figure 3—VCC UVLO
Drain-Source
voltage
switching,
which
The lower threshold of VCC UVLO decreases from
8V to 5.5V when fault conditions happen, such as
OLP, OVP, and OTP.
contributes to better efficiency and EMI
performance.
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
Figure 5 shows the waveform of valley switching
detection on auxiliary winding and the MOSFET
Drain-Source voltage.
8.8us
VAUX
Valley point
45mV
VDS
Figure 7—Minimum Turn-off Time Limit
Over-voltage Protection (OVP)
The positive plateau of the auxiliary winding
voltage is proportional to the output voltage. The
Over Voltage Protection unit detects the auxiliary
winding voltage signal by VSD pin instead of
directly monitoring the output voltage.
Figure 5—Valley Switching Detection
An internal minimum off-time limiter prevents the
MOSFET from turning on until the 7.8us off-time
limit is passed.. Thus the minimum off time of
primary switch will be longer than 7.8us and the
switching frequency would be lower than
1/(Ton+7.8us). This ensures that the switching
frequency is below 150kHz, which is below the
CISPER22 EMI minimum limit. Figure 6 and 7
shows the minimum turn-off time limit of the
primary switch.
Figure 8 shows the external circuit of VSD pin. If
the voltage of this pin exceeds 6V, the OVP is
triggered, and the HF01B00/01/02/03/04 stops
switching and goes into latched fault condition.
That means the regulator stays fully latched in
this position until the Vcc is decreased down to
3V, e.g. when the user unplugs the power supply
from the main supply and re-plugs it.
HF01B00-04
6.8us
ROVP
VSD
OVP
Auxiliary
RINT
Winding
6V
Figure 8—OVP Circuit
The internal resistance of VSD pin is 24kΩ, so
the OVP triggered point could be programmed
through different ROVP selection by the following
Figure 6—Minimum Turn-off Time Limit
formula:
N 6 R ROVP
N 6 24k R
OVP
S
INT
S
VOVP
NA RINT
NA 24k
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
Where, VOVP is the output voltage when OVP
mis-trigger the OLP, to prevent this undesired
protection, OLP circuit is designed to be triggered
after Vcc is decreased below 8.5V.
happens; NS is the turns of secondary winding of
the transformer; NA is the turns of the auxiliary
winding.
Burst Operation
The plateau voltage of the auxiliary winding is
sampled at the VSD pin with a 3.5us delay after
the turn-off sequence. Otherwise, the ringing
cause by transformer leakage inductance may
unintentional trigger the OVP.
To minimize stand-by power consumption, the
HF01B00/01/02/03/04 implement burst mode at
no load or light load. As the load decreases, the
FB voltage decreases. The IC stops switching
when the FB voltage drops below the lower
threshold VBRUL—0.5V. Then the output voltage
starts to drop at a rate dependent on the load.
This causes the FB voltage to rise again due to
the negative feedback control loop. Once the FB
voltage exceeds the upper threshold VBRUH—0.7V,
switching pulse resumes. The FB voltage then
decreases and the whole process repeats. Burst-
mode operation alternately enables and disables
the switching pulse of the MOSFET. Hence
switching loss at no load or light load conditions
is greatly reduced.
VAUX
OVP Sample
3.5us
Figure 10 shows the burst mode operation of
HF01B00/01/02/03/04
VFB
Figure 9—OVP Sample Delay
0.7V
Over Load Protection (OLP)
0.5V
In a flyback converter, the maximum output
power is limited by the maximum switching
frequency and primary peak current. If the load
consumes more than the maximum output power,
output voltage will drop below the set point. This
reduces the current through the optocoupler LED
by the negative feedback control loop, and thus
FB voltage goes up.
VDS
The voltage at the FB Pin is continuously
monitored. When the feedback voltage exceeds
the VOLP threshold—3.7V, the IC stops switching
and enters a safe low-power operating mode that
prevents from any lethal thermal or stress
damage. As soon as the fault disappears, the IC
resumes switching. Thus the circuit operates in a
burst manner, called auto-recovery. During fault
condition, the VCC UVLO lower threshold drops
down from 8V to 5.5V.
Figure 10—Burst Mode Operation
Thermal shutdown (TSD)
To prevents from any lethal thermal damage, the
HF01B00/01/02/03/04 shuts down switching
cycle when the junction temperature exceeds
150 ℃ . As soon as the junction temperature
drops below 110℃, the power supply resumes
operation. During OTP, the lower threshold of the
VCC UVLO drops from 8V to 5.5V
During the start-up phase or load transient, the
FB voltage stays high enough temporarily to
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
Leading Edge Blanking (LEB)
In normal operation, the primary peak current is
sensed by a shunt resistor between the Source
pin and Ground. The turn-off threshold of the
MOSFET is set by FB voltage, Vsense=VFB/3.3.
When the voltage drop of shunt resistor reaches
Vsense, the MOSFET turns off.
During start-up and over-load condition, the
primary peak current threshold is internally
limited to 1V even if VFB voltage is larger than
3.3V to avoid excessive output power and lower
the voltage rating of the switch.
In order to avoid turning off the MOSFET by mis-
trigger spikes shortly after the switch turns on,
the IC implements a 320ns leading edge blanking.
During blanking time, any trigger signal on
source pin is blocked. Figure 11 shows the
primary current sense waveform and the leading
edge blanking.
320ns
Figure 11—Leading Edge Blanking
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
Start
Y
Internal High Voltage
Current Source ON
Vcc Decrease
to 5.5V
N
Vcc<3V?
Shut off the
Switching
Pulse
Y
Latch off the
Switching Pulse
Y
Shut Down
Internal High Voltage
Current Source
Y
N
Vcc>11.8V
OTP=
Logic
High?
N
Y
N
Vcc<8V
Y
OVP=
Logic
High?
N
Soft Start
Thermal
Monitor
Monitor Vcc
Pin Demag
Monitor
Monitor VFB
Vcc<8.5V?
and
Y
Y
OLP=Logic
High
VFB<0.5V
0.5V<VFB<3.7V
VFB>3.7V
N
Continuous
Fault Monitor
Burst Mode
Operation
QR mode Operation
OLP=Logic High
Toff<
7.8uS
N
N
Y
UVLO, OTP & OLP are auto restart, OVP
is latch
VFB>0.7V
Y
Release from the latch condition, need to
unplug from the main input .
Constraint
Toff_min≥7.8uS
Figure 12—Control Flow Chart
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
Unplug from
Regulation
Occurs Here
Vcc
Start up
Over Voltage
Occurs Here
Normal
operation
main input
Normal
operation
Normal
operation
11.8V
8V
5.5V
Driver
Pluses
Driver
High voltage
current source
On
Off
IFault Flag
OLP Fault
Occurs Here
Normal operation
OTP Fault
Occurs Here
OVP Fault
Occurs Here
Normal operation
Normal operation
Normal operation
Figure 13—Evolution of the Signal in Presence of a Fault
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
PACKAGE INFORMATION
PDIP8-7B
0.367(9.32)
0.387(9.83)
8
5
0.240(6.10)
0.260(6.60)
PIN 1 ID
4
1
TOP VIEW
0.320( 8.13)
0.400(10.16)
0.100(2.54)
BSC
0.300(7.62)
0.325(8.26)
0.125(3.18)
0.145(3.68)
0.015(0.38)
0.035(0.89)
0.120(3.05)
0.140(3.56)
0.008(0.20)
0.014(0.36)
0.050(1.27)
0.065(1.65)
0.015(0.38)
0.021(0.53)
SIDE VIEW
FRONT VIEW
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH AND WIDTH DO NOT INCLUDE MOLD FLASH, OR PROTRUSIONS.
3) JEDEC REFERENCE ISMS-001.
4) DRAWING IS NOT TO SCALE.
HF01B00/01/02/03/04 Rev. 1.2
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HF01B00/01/02/03/04–OFF LINE HIGH VOLTAGE QUASI RESONANT REGULATOR
SOIC8-7B
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
0.063(1.60)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.213(5.40)
PIN 1 ID
1
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
0.0075(0.19)
0.0098(0.25)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
SEE DETAIL "A"
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
GAUGE PLANE
0.010(0.25) BSC
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE0.004" INCHES MAX.
0.016(0.41)
0.050(1.27)
0o-8o
5) JEDEC REFERENCE ISMS-012.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
HF01B00/01/02/03/04 Rev. 1.2
www.MonolithicPower.com
16
4/9/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
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