MP2497 [MPS]
3A, 50V, 100kHz Step-Down Converter with Programmable Output OVP Threshold;
| 型号： | MP2497 |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | 3A, 50V, 100kHz Step-Down Converter with Programmable Output OVP Threshold |
| 文件： | 总14页 (文件大小：450K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP2497
3A, 50V, 100kHz Step-Down Converter
with Programmable Output OVP Threshold
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP2497 is a monolithic step-down switch
mode converter with a programmable output
current limit. It achieves 3A continuous output
current over a wide input supply range with
excellent load and line regulation. An internal
2~4ms soft start prevents inrush current at turning
on. And it is capable of providing output line drop
compensation.
•
•
Wide 4.5V to 50V Operating Input Range
Programmable
Protection
Output
Over
Voltage
•
•
•
•
Output Adjustable from 0.8V to 25V
0.15Ω Internal Power MOSFET Switch
Internal 4ms Soft Start
Stable with Low ESR Output Ceramic
Capacitors
•
•
•
•
•
Fixed 100kHz Frequency
Low EMI Signature
Thermal Shutdown
Output Line Drop Compensation
Hiccup Circuit Limit and Short Circuit
Protection
MP2497 achieves low EMI signature with well
controlled switching edges.
Fault condition protection includes hiccup current
limit and short circuit protection, programmable
output over voltage protection and thermal
shutdown.
•
Available in SOIC8 and SOIC8E Package
The MP2497 requires a minimum number of
readily available standard external components.
The MP2497 is available in SOIC8 and SOIC8E
package.
APPLICATIONS
•
•
•
USB Power Supplies
Automotive Cigarette Lighter Adapters
Power Supply for Linear Chargers
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
R6
0O
Efficiency vs.
Output Current
L1
33µH
C6
0.1µF
RSENSE
33mO
C3
C4
V
=5V
C10
0.1µF
OUT
100µF 22µF
95
90
85
80
75
70
65
60
55
C2
BST
SW
VOUT
+
2.2µF
V
=12V
IN
VIN
C5
0.1µF
VIN
D1
C1
220µF
C11
0.1µF
OVP
GND
R3
39kO
R4
10kO
MP2497
GND
V
=24V
IN
ISP
ISN
C7
10nF
R7
1kO
GND
V
=50V
IN
FB
C9
C8
10nF
R5
1kO
150pF
R1
R2
57.6kO
0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9
OUTPUT CURRENT (A)
301kO
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
1
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number
MP2497DS*
MP2497DN**
Package
SOIC8
SOIC8E
Top Marking
MP2497
Operating Temperature (TJ)
-40°C to +125°C
MP2497
-40°C to +125°C
* For Tape & Reel, add suffix –Z (e.g. MP2497DS–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. MP2497DS–LF–Z).
** For Tape & Reel, add suffix –Z (e.g. MP2497DN–Z);
For RoHS, compliant packaging, add suffix –LF (e.g. MP2497DN–LF–Z).
PACKAGE REFERENCE
SOIC8
SOIC8E
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
SOIC8.....................................90...... 45... °C/W
SOIC8E ..................................50...... 10... °C/W
θJA
θJC
Input Voltage VIN .......................................... 60V
VISN, VISP ..............................................0V to 25V
|VISN -VISP| ...........................................0V to 0.4V
Notes:
V
V
SW........................................-0.3V to VIN + 0.3V
BST ................................................... VSW + 6.5V
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
All Other Pins...............................-0.3V to +6.5V
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
(2)
Continuous Power Dissipation (TA = +25°C)
SOIC8...................................................... 1.38W
SOIC8E...................................................... 2.5W
3) The device is not guaranteed to function outside of its
operating conditions.
Recommended Operating Conditions (3)
Input Voltage VIN ..............................4.5V to 50V
Output Voltage VOUT (VIN>26.5V) .....0.8V to 25V
Output Voltage VOUT (VIN<=26.5V)......................
.........................................0.8V to (VIN–1.5)V
Maximum Junction Temp. (TJ)................+125°C
4) Measured on JESD51-7, 4-layer PCB.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
2
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Min
Typ
0.8
10
Max
Units
V
Feedback Voltage
Feedback Bias Current
VFB
0.78
0.82
4.5V ≤ VIN ≤ 50V
IBIAS(FB)
VFB = 0.8V
nA
Output
Reference
Over
Voltage
VOVREF
1.10
1.23
1.36
V
TA=-40°C to +85°C
Input Bias Current (OVP)
Switch On Resistance
Switch Leakage
IBIAS(OVP)
RDS(ON)
VOVP=1.23V
0.1
0.15
0.1
μA
Ω
VOVP = 2V, VSW = 0V
Duty Cycle=10%
VFB = 0.6V
10
μA
Current Limit
5
A
kHz
V
Oscillator Frequency
Boot-Strap Voltage
Minimum On Time
SW Rising Edge
SW Falling Edge
fSW
VBST - VSW
tON
80
100
4.5
100
50
120
ns
ns
ns
tRISE
tFALL
50
Under Voltage Lockout Threshold
Rising
2.9
15
3.4
200
20
3.9
25
V
Under Voltage Lockout Threshold
Hysteresis
mV
Load Line Compensation
Gain
GLLC
VISP-VISN=100mV, check IFB
μA/V
Current Sense Voltage
VISP –VISN VISP, VISN 0.5–15V
IBIAS (ISN,ISP) VISP, VISN 0.5–15V
VOVP = 0V, VFB = 1V
90
-1
100
-0.5
1.2
110
+1
mV
μA
Input Bias Current (ISN, ISP)
Supply Current (Quiescent)
1.5
mA
Thermal Shutdown
150
30
°C
°C
Thermal Shutdown Hysteresis
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
3
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
Name
Description
Supply Voltage. The MP2497 operates from a +4.5V to +50V unregulated input. CIN is
needed to prevent large voltage spikes from appearing at the input. Put CIN as close to
the IC as possible. It is the drain of the internal power device and power supply for the
whole chip.
1
2
3
VIN
Ground. This pin is the voltage reference for the regulated output voltage. For this reason
care must be taken in its layout. This node should be placed outside of the D1 to CIN
ground path to prevent switching current spikes from inducing voltage noise into the part.
Connect exposed pad to GND plane for optimal thermal performance.
GND,
Exposed
Pad
Feedback. An external resistor divider from the output to GND tapped to the FB pin sets
the output voltage. To prevent current limit run away during a short circuit fault condition
the frequency-fold-back comparator lowers the oscillator frequency when the FB voltage
is below 250mV.
FB
Output Over Voltage Protection. Connect OVP to the center point of an external resistor
divider from output to GND. The OVP reference is 1.23V.
4
5
6
OVP
ISN
ISP
Negative Current Sense Input. It is used for load current limiting and output line drop
compensation.
Positive Current Sense Input. It is used for load current limiting and output line drop
compensation.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BST pins to form a floating supply across the
power switch driver. An on-chip regulator is used to charge up the external boot-strap
capacitor. If the on-chip regulator is not strong enough, one optional diode can be
connected from IN or OUT to charge the external boot-strap capacitor.
7
8
BST
SW
Switch Output. It is the source of power device.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
4
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
C1=220μF, C2=2.2μF, C3=100μF, C4=22μF, L=33μH, RSENSE=33mΩ, TA=25ºC，unless otherwise
noted.
Output Line Drop
Compensation
Loop Gain with
Phase Margin
Efficiency vs.
Output Current
V
=12V, V
=5V, I
=3A
V
=5V
IN
OUT
OUT
OUT
Resistor Load
5.02
5
80
60
200
150
100
50
95
90
85
80
75
70
65
60
55
V
=12V
IN
Phase
V
=12V
IN
40
4.98
4.96
4.94
4.92
4.9
20
V
=24V
V
=24V
IN
IN
0
0
Gain
-20
-40
-60
-80
-50
-100
-150
-200
V
=50V
IN
V
=50V
IN
0.1 0.5 0.9 1.3 1.7 2.1 2.5 2.9
(A)
0.1
1
10
100
1000
0
0.5
1
1.5
2
(A)
2.5
3
3.5
I
I
FREQUENCY(kHz)
OUT
OUT
Load Regulation
Connect ISP, ISN to GND
V
vs. Temperature
EMI Radiation
IN OUT
FB
V
=12V
IN
V
=12V, V
=5V, I =3A
OUT
Resistor Load
0.804
0.802
0.8
4.99
4.985
4.98
90
80
70
60
50
40
30
20
10
0
V
=50V
IN
4.975
4.97
V
=12V
IN
EN55022
0.798
0.796
0.794
0.792
4.965
4.96
V
=24V
2.5
IN
4.955
-10
4.95
0
0.5
1
1.5
2
3
3.5
-50 -20 10 40 70 100 130
30
100
FREQUENCY(MHz)
1000
I
(A)
o
OUT
TEMPERATURE ( C)
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
5
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
C1=220μF, C2=2.2μF, C3=100μF, C4=22μF, L=33μH, RSENSE=33mΩ, TA=25ºC，unless otherwise
noted.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
6
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
BLOCK DIAGRAM
VIN
CURRENT SENSE
AMPLIFIER
GND
63mO
Σ
REGULATOR
BST
RAMP
REGULATOR
REFERENCE
OSCILLATOR
DRIVER
RSENSE
CLK
SW
S
R
IN
Q
PWM
COMPARATOR
6.2uA
200mV
600mV
Hiccup
Current Limit
ISP
RS1
RS2
X 6
ISN
FB
R1
6pF
10000kO
10pF
R2
72.8pF
2483kO
800mV
SS Circuit
ERRPR
AMPLIFIER
1.23V
400kO
OVP
COMPARATOR
OVP
Figure 1—Functional Block Diagram
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
7
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
Hiccup Mode Current Limit Protection
OPERATION
Main Control Loop
The MP2497 is a current mode buck regulator.
That is, the EA output voltage is proportional to
the peak inductor current.
The output current information for current limit
protection is sensed via the ISP and ISN pins.
The sense voltage limit threshold is set at
100mV. MP2497 has hiccup over current limit
function. Once the VSENSE exceeds the 100mV,
the current limit loop will turn off high side
switch immediately. Meanwhile, internal soft
start circuit will be reset after FB is lower than
0.3V, and then the high side switch turns on
and MP2497 restarts with a full soft start. This
hiccup process is repeated until the fault is
removed. And, current limit value can be
programmed to be lower by internal current
source and external resistors connected to ISN
and ISP pins, when output voltage is lower than
200mV. Then, the average short circuit current
can be greatly reduced.
At the beginning of a cycle SW is off; the Error
Amplifier output voltage is higher than the
Current Sense Amplifier output. The rising edge
of the 100kHz CLK signal sets the RS Flip-Flop.
Its output turns on SW thus connecting the SW
pin and inductor to the input supply.
The increasing inductor current is sensed and
amplified by the Current Sense Amplifier. Ramp
Compensation is summed to Current Sense
Amplifier output and compared to the Error
Amplifier output by the PWM Comparator.
When the Current Sense Amplifier plus Slope
Compensation signal exceeds the Error
Amplifier output voltage, the RS Flip-Flop is
reset and the MP2497 reverts to its initial SW
off state.
Output Over Voltage Protection
The MP2497 has output over voltage protection.
The OVP reference 1.23V is on the positive
input of the OVP comparator. The output
voltage is fed to OVP pin through an external
resistor divider. If the voltage on OVP pin is
higher than 1.23V, the high side switch will be
turned off immediately and part will be lathed off
after a timer delay.
If the Current Sense Amplifier plus Slope
Compensation signal does not exceed the
COMP voltage, then the falling edge of the CLK
resets the Flip-Flop.
The output of the Error Amplifier integrates the
voltage difference between the feedback and
the reference. The polarity is such that an FB
pin voltage is lower than 0.8V increases the EA
output voltage. Since the EA output voltage is
proportional to the peak inductor current, an
increase in its voltage increases current
delivered to the output. An external Schottky
Diode (D1) carries the inductor current when
SW is off.
Output Line Drop Compensation
If the trace from MP2497 output terminator to
the load is too long, there will be a voltage drop
on the long trace which is variable with load
current. MP2497 is capable of compensating
the output voltage drop to keep a constant
voltage at load, whatever the load current is.
The output voltage is compensated by feeding
a current to the top feedback resistance R1.
The load line compensation gain can be
programmed according to RSENSE and RTRACE
(Figure 2) values.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
8
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
APPLICATION INFORMATION
In the formula above, RSENSE is known. And
RTRACE can be tested or evaluated. So, we can
select a proper top feedback resistor R1
according to the RTRACE and RSENSE to
compensate the output line voltage drop.
Setting the Output Line Drop Compensation
Figure 2 shows the block of output line drop
compensation.
If the trace to the load is long, there is a voltage
drop between VOUT and VLOAD. VOUT (voltage at
output terminator) is not equal to VLOAD(voltage
at load). The voltage drop can be described by:
VOUT
RSENSE
RTRACE1
SW
ISP
RTRACE2
(1)
VDROP = IOUT ×RTRACE
VLOAD
RTRACE
Where, the RTRACE is the resistance of the
Load
output line. (RTRACE = RTRACE1 + RTRACE2
)
X 6
Then, the VLOAD is:
ISN
FB
R1
R2
(2)
VLOAD = VOUT −IOUT ×RTRACE
To keep an accurate and constant load voltage,
the output line drop compensation is necessary.
MP2497 offers a compensation method, by
adjusting the FB voltage slightly according to
the load current.
Hiccup
Current Limit
600mV
The relation between VOUT and VFB can be
described by:
10000kO
10pF
VOUT − VFB VFB IOUT ×RSENSE × 6
0.8V
(3)
=
+
R1
R2
400kΩ
ERRPR
AMPLIFIER
400kO
Where, VFB is 0.8V.
Then, the VOUT can be calculated by:
Internal Block
IOUT ×RSENSE × 6×R1
R1
R2
Figure 2—Output Line Drop Compensation
Setting the Output Voltage
(4)
VOUT = (1+
)×0.8V +
400kΩ
The VLOAD is determined by:
The external resistor divider is used to set the
output voltage (see the typical application circuit
on the front page). The feedback resistor R1 is
decided by output line drop compensation. R2
is then given by:
IOUT ×RSENSE × 6×R1
400kΩ
R1
R2
VLOAD = (1+
)×0.8V +
(5)
−IOUT ×RTRACE
To maintain the VLOAD is not variable with load
current. The equation below should be satisfied:
R1
VOUT
0.8V
R2 =
(8)
− 1
IOUT ×RSENSE × 6×R1
(6)
= IOUT ×RTRACE
400kΩ
Simplify the formula above, we can get:
RTRACE × 400kΩ
R1 =
(7)
6×RSENSE
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
9
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
R3
VOVP
Selecting the Inductor
(11)
R4 =
(kΩ)
A 10µH to 47µH inductor with a DC current
rating of at least 25% percent higher than the
maximum load current is recommended for
most applications. For highest efficiency, the
inductor DC resistance should be less than
200mꢀ. For most designs, the inductance value
can be derived from the following equation.
−1
VOVREF
Where, VOVREF is the OVP reference, 1.23V.
OVP is over voltage protection threshold.
V
Setting the Current Limit
The hiccup current limit can be set by the DC
resistance (DCR) of the inductor, as shown in
Figure 3a.
VOUT ×(V − VOUT
)
IN
L =
(9)
V × ΔIL × fOSC
IN
For more accurate sensing, use a more
accurate sense resistor.
Where ΔIL is the inductor ripple current.
Choose inductor current ripple to be
approximately 30% of the maximum load
current, 3A. The maximum inductor peak
current is:
In Figure 3a, the output current limit is set as:
100mV
(12)
IOUT _L
=
DCR
Where, DCR is the DC resistance of the
inductor winding. Ra and Ca is a low pass filter.
ΔIL
2
IL(MAX) = ILOAD
+
(10)
In Figure 3b, the output current limit is set as:
100mV
Under light load conditions below 100mA, larger
inductance is recommended for improving
efficiency.
(13)
IOUT _L
=
RSENSE
Selecting the Input Capacitor
SW
The input capacitor reduces the surge current
drawn from the input and also the switching
noise from the device. The input capacitor
impedance at the switching frequency should
be less than the input source impedance to
prevent high frequency switching current from
passing to the input. Ceramic capacitors with
Ra
Ca
RS1
ISP
ISN
RS2
X5R
or
X7R
dielectrics
are
highly
recommended because of their low ESR and
small temperature coefficients. For most
applications, a 4.7µF capacitor is sufficient.
(a)
RSENSE
Selecting the Output Capacitor
SW
The output capacitor keeps output voltage small
and ensures regulation loop stability. The
output capacitor impedance should be low at
the switching frequency. Ceramic capacitors
with X5R or X7R dielectrics are recommended.
RS1
ISP
ISN
RS2
Setting the Output OVP Threshold
The output OVP threshold is set by connecting
an external resistor divider (R3, R4 see the
typical application circuit on the front page) at
OVP pin. Choose R3 to be 39kꢀ for lower
power dissipation. Then, R4 is given by:
(b)
Figure 3—Current Sensing Methods
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
10
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
External Bootstrap Diode
Programming the Short Circuit Current Limit
The hiccup current limit at output short
condition can be programmed to be lower by
external resisters (RS1, RS2, RS1=RS2), as shown
in figure 4.
It is recommended that an external bootstrap
diode be added when the system has a 5V
fixed input or the power supply generates a 5V
output. This helps improve the efficiency of the
regulator. The bootstrap diode can be a low
cost one such as IN4148 or BAT54.
When output voltage is lower than 200mV, the
current limit is described by:
This diode is also recommended for high duty
OUT
(14)
IOUT _ SL ×RSENSE + 6.2μA ×RS1 = 100mV
V
V
cycle operation (when
>65%) and high
The current limit at output short condition is:
I N
100mV − 6.2μA ×RS1
output voltage (VOUT>12V) applications.
(15)
IOUT _ SL
=
5V
RSENSE
RSENSE
BS
SW
MP2497
10nF
SW
ISP
ISN
RS1
RS2
Figure 5—External Bootstrap Diode
Design Example
Below is a design example following the
application guidelines for the specifications:
6.2uA
VIN
VOUT
VOVP
FSW
8 to 50V
5V
6V
100kHz
3A
200mV
IOUT-L
The detailed application schematic is shown in
Figure 6. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
possible applications of this device, please refer
to related Evaluation Board Data Sheets.
Figure 4—Short Circuit Current Limit
PC Board Layout
The high frequency path (IN, SW and GND)
should be placed very close to the device with
short, direct and wide traces. The input
capacitor needs to be as close as possible to
the IN and GND pins. The external feedback
resistors should be placed next to the FB pin.
Keep the switching node SW short and away
from the feedback network.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
11
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
D1
NS
R6
0O
VCC
R9
L1
33µH
50mO
C3
C4
C10
0.1µF
C6
100µF 22µF
0.1µF
C2
2.2µF
BST
SW
VOUT
R10
100mO
+
VIN
VIN
C5
0.1µF
R11
910O
D2
PDS560
C1
C11
220µF
0.1µF
R8
100O
OVP
GND
C12
NS
R3
39kO
R13
0O
R4
10kO
MP2497
GND
ISP
ISN
C7
10nF
R7
1kO
GND
FB
C9
150pF
C8
10nF
R5
1kO
R1
301kO
R12
0O
R2
57.6kO
Figure 6—Detailed Application Schematic
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
12
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
0.063(1.60)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.213(5.40)
PIN 1 ID
1
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SEE DETAIL "A"
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
GAUGE PLANE
0.010(0.25) BSC
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE0.004" INCHES MAX.
0.016(0.41)
0.050(1.27)
0o-8o
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
DETAIL "A"
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
13
MP2497 – 3A, 50V, 100kHz STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
0.124(3.15)
0.136(3.45)
8
5
0.150(3.80)
0.157(4.00)
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
PIN 1 ID
1
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.0075(0.19)
0.0098(0.25)
0.013(0.33)
0.020(0.51)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
0.020(0.50)
x 45o
GAUGE PLANE
0.010(0.25) BSC
0.024(0.61)
0.063(1.60)
0.050(1.27)
0.016(0.41)
0.050(1.27)
0o-8o
DETAIL "A"
0.103(2.62)
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
0.138(3.51)
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2497 Rev. 1.12
12/22/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2011 MPS. All Rights Reserved.
14
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