MP28252EL [MPS]
Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14;
| 型号： | MP28252EL |
| 厂家： | 
MONOLITHIC POWER SYSTEMS |
| 描述： | Switching Regulator, Current-mode, 575kHz Switching Freq-Max, PDSO14, 3 X 4 MM, MO-229VGED-3, QFN-14 开关 光电二极管 输出元件 |
| 文件： | 总14页 (文件大小：363K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MP28252
High Efficiency 2A, 21V, 500kHz
Synchronous Step-down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP28252 is a high frequency synchronous
rectified step-down switch mode converter with
built in internal power MOSFETs. It offers a
very compact solution to achieve 2A continuous
output current over a wide input supply range
with excellent load and line regulation. The
MP28252 has synchronous mode operation for
higher efficiency over output current load range.
•
•
•
•
Wide 4.5V to 21V Operating Input Range
2A Output Current
Low Rds(on) Internal Power MOSFETs
Proprietary Switching Loss Reduction
Technique
High Efficiency Synchronous Mode Operation
Fixed 500kHz Switching Frequency
Sync from 300kHz to 2MHz External Clock
Internal Compensation
•
•
•
•
•
•
•
•
Current mode operation provides fast transient
response and eases loop stabilization.
Integrated Bootstrap Diode
OCP Protection and Thermal Shutdown
Output Adjustable from 0.805V
Available in a 3mm x 4mm 14-Pin QFN
Package
Full protection features include OCP and
thermal shut down.
The MP28252 requires a minimum number of
readily available standard external components
and is available in a space saving 3mm x 4mm
14-pin QFN package.
•
APPLICATIONS
•
•
•
•
•
•
Notebook Systems and I/O Power
Networking Systems
Digital Set Top Boxes
Personal Video Recorders
Flat Panel Television and Monitors
Distributed Power Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiencyvs. Output Current
VOUT=1.2V
100
1
6
VIN
IN
BST
90
80
70
VIN=12V
VIN=5V
2, 3
4, 5
VOUT
1.2V@2A
SW
FB
10
60
50
40
30
20
10
0
VCC
MP28252
R1
5K
VIN=21V
R3
100K
8
9
7
Rt
25K
PG
EN
PG
R2
10K
EN/SYNC
GND
11, 12, 13, 14
0
0.5
1
1.5
2
OUTPUT CURRENT (A)
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
1
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
ORDERING INFORMATION
Part Number
Package
Top Marking
MP28252EL
3x4 QFN14
28252
For Tape & Reel, add suffix –Z (e.g. MP28252EL–Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP28252EL–LF–Z)
PACKAGE REFERENCE
TOP VIEW
IN
SW
1
2
3
4
5
6
7
14 GND
13 GND
12 GND
11 GND
10 VCC
SW
SW
SW
BST
9
8
PG
FB
EN/SYNC
EXPOSED PAD
ON BACKSIDE
Thermal Resistance (3)
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
3x4 QFN14..............................48 ...... 11...°C/W
Supply Voltage VIN ....................................... 22V
Notes:
V
V
SW........................-0.3V (-5V for < 10ns) to 23V
BS .......................................................VSW + 6V
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-to-
ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)-
TA)/θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
All Other Pins..................................-0.3V to +6V
Operating Temperature.............. -20°C to +85°C
Continuous Power Dissipation (TA = +25°C) (2)
…………………………………………….......2.6W
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions (2)
Supply Voltage VIN ...........................4.5V to 21V
Operating Junct. Temp (TJ)...... -20°C to +125°C
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
2
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameters
Symbol
IIN
Condition
Min
Typ
Max
Units
μA
Supply Current (Shutdown)
Supply Current (Quiescent)
HS Switch On Resistance
LS Switch On Resistance
VEN = 0V
10
Iq
VEN = 2V, VFB = 1V
0.7
190
60
mA
HSRDS-ON
LSRDS-ON
mΩ
mΩ
V
12V
EN = 0V, VSW = 0V or
Switch Leakage
SWLKG
0
10
μA
Current Limit (5)
ILIMIT
FSW
3
4
A
kHz
fSW
%
Oscillator Frequency
Fold-back Frequency
Maximum Duty Cycle
Sync Frequency Range
Feedback Voltage
VFB = 0.75V
VFB = 300mV
VFB = 700mV
425
500
0.25
90
575
FFB
DMAX
85
0.3
789
FSYNC
VFB
2
MHz
mV
nA
V
805
10
1.3
0.9
0.4
2
821
50
Feedback Current
IFB
VFB = 800mV
EN Rising Threshold
EN Falling Threshold (6)
EN Threshold Hysteresis
VEN_RISING
VEN_FALLING
VEN_HYS
1
1.6
0.75
V
V
VEN = 2V
VEN = 0V
EN Input Current
IEN
μA
0
EN Turn Off Delay
ENTd-Off
VTHPG
VTLPG
Tss
5
μs
VFB
VFB
msec
μs
Power Good High Threshold
Power Good Low Threshold
Output Soft Start Time
Power Good Delay
0.9
0.85
4
PGTd
20
Power Good Sink Current
Capability
VPG
Sink 4mA
0.4
10
V
nA
V
Power Good Leakage Current
IPG_LEAK
INUVVTH
VPG = 3.3V
VIN Under Voltage Lockout
Threshold Rising
3.8
4.0
4.2
VIN Under Voltage Lockout
Threshold Hysteresis
INUVHYS
VCC
880
mV
VCC Regulator
5
5
V
%
VCC Load Regulation
Soft-Start Period
Thermal Shutdown
Icc=2mA
2
4
6.5
ms
°C
TSD
150
Note:
5) Guaranteed by design.
6) EN and frequency Sync. have the same rising and falling thresholds.
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
3
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
PIN FUNCTIONS
Pin #
Name
Description
Supply Voltage. The MP28252 operates from a +4.5V to +21V input rail. C1 is
needed to decouple the input rail. Use wide PCB trace to make the connection.
1
2, 3, 4, 5
6
IN
SW
Switch Output. Use wide PCB trace to make the connection.
Bootstrap. A capacitor connected between SW and BS pins is required to form a
floating supply across the high-side switch driver.
BST
EN=1 to enable the chip. External clock can be applied to EN pin for changing
switching frequency. For automatic start-up, connect EN pin to VIN by proper EN
resistor divider as Figure 2 shows.
7
8
EN/SYNC
FB
Feedback. An external resistor divider from the output to GND, tapped to the FB
pin, sets the output voltage. To prevent current limit run away during a short
circuit fault condition the frequency fold-back comparator lowers the oscillator
frequency when the FB voltage is below 500mV.
Power Good Output. The output of this pin is low if the output voltage is 15% less
than the normal value; otherwise it is an open drain.
9
PG
Bias Supply. Decouple with 0.1μF~0.22μF cap. And the capacitance should be
no more than 0.22μF
10
VCC
System Ground. This pin is the reference ground of the regulated output voltage.
For this reason care must be taken in PCB layout. Suggested to be connected to
GND with copper and vias.
11, 12, 13, 14
GND
Exposed pad has no internal electrical connection, and make sure exposed pad
is connected to GND through a large copper area in PCB layout.
Exposed Pad
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
4
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted.
Disabled Supply Current vs.
Input Voltage
Enabled Supply Current vs.
Input Voltage
Vcc Regulator Line Regulation
VEN=0V
VFB=1V
6
5.5
5
0.20
0.15
0.10
0.05
0
1000
950
900
850
800
750
700
650
600
550
500
4.5
4
-0.05
-0.10
-0.15
-0.20
3.5
0
5
10
15
20
25
0
5
10
15
20
25
0
5
10
15
20
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Line Regulation
Operating Range
Load Regulation
100
0.5
0.4
0.3
0.2
0.1
0
1.0
0.5
0
Dmax Limit
VIN=4.5V
10
1
IOUT=0A
Minimum on time Limit
VIN=21V
-0.1
-0.2
-0.3
-0.4
-0.5
VIN=12V
IOUT=1A
IOUT=2A
-0.5
-1.0
0.1
0
5
10
15
20
25
0
5
10
15
20
25
0
0.5
1
1.5
2
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LOAD CURRENT (A)
Case Temperature Rise
vs. Output Current
10
9
8
7
6
5
4
3
2
1
0
0
0.5
1
1.5
2
2.5
OUTPUT CURRENT (A)
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
5
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted.
Efficiencyvs. Output Current
VOUT=1.2V
Efficiencyvs. Output Current
VOUT=1.8V
Efficiencyvs. Output Current
VOUT=2.5V
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
VIN=5V
VIN=5V
VIN=12V
VIN=12V
VIN=5V
VIN=12V
VIN=21V
VIN=21V
VIN=21V
0
0.5
1
1.5
2
0
0.5
1
1.5
2
0
0.5
1
1.5
2
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
Efficiencyvs. Output Current
VOUT=3.3V
100
90
80
70
60
50
40
30
20
10
0
VIN=5V
VIN=12V
VIN=21V
0
0.5
1
1.5
2
OUTPUT CURRENT (A)
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
6
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1.2V, L = 1.8µH, TA = +25ºC, unless otherwise noted.
Power up with 2A Load
Enable Startup
without Load
Power up without Load
V
V
V
OUT
OUT
OUT
1V/div
1V/div
1V/div
V
V
SW
V
SW
SW
10V/div
10V/div
10V/div
V
V
N
10V/div
V
EN
IN
5V/div
10V/div
I
INDUCTOR
2A/div
I
INDUCTOR
2A/div
I
INDUCTOR
2A/div
4ms/div
10ms/div
10ms/div
Enable Startup
with 2A Load
Input Ripple Voltage
IOUT=2A
Output Ripple Voltage
IOUT=2A
V
OUT
1V/div
V
OUT/AC
20mV/div
V
IN/AC
100mV/div
V
SW
10V/div
V
SW
5V/div
V
EN
5V/div
V
SW
5V/div
I
INDUCTOR
2A/div
I
INDUCTOR
2A/div
4ms/div
Load Transient Response
IOUT=1A-2A
V
OUT/AC
20mV/div
I
LOAD
1A/div
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
7
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
BLOCK DIAGRAM
IN
+
-
VCC
Regulator
Current Sense
Amplifer
VCC
BOOST
Regulator
BST
SW
PG
+
-
Oscillator
HS
Driver
LOGIC
+
-
PG Comparator
Current Limit
Comparator
1pF
Reference
EN/SYNC
FB
400K
50pF
LS
Driver
1MEG
+
-
+
+
-
+
-
PWM Comparator
Error Amplifier
GND
LS ILIM
Comparator
Figure 1—Function Block Diagram
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
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© 2013 MPS. All Rights Reserved.
8
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
1) Enabled by external logic H/L signal
OPERATION
The chip starts up once the enable signal goes
The MP28252 is a high frequency synchronous
rectified step-down switch mode converter with
built in internal power MOSFETs. It offers a very
compact solution to achieve 2A continuous
output current over a wide input supply range
with excellent load and line regulation.
higher than EN/SYNC input high voltage (2V),
and is shut down when the signal is lower than
EN/SYNC input low voltage (0.4V). To disable
the chip, EN must be pulled low for at least 5µs.
The input is compatible with both CMOS and TTL.
2) Enabled by Vin through voltage divider.
The MP28252 operates in a fixed frequency,
peak current control mode to regulate the output
voltage. A PWM cycle is initiated by the internal
clock. The integrated high-side power MOSFET
is turned on and remains on until its current
reaches the value set by the COMP voltage.
When the power switch is off, it remains off until
the next clock cycle starts. If, in 90% of one PWM
period, the current in the power MOSFET does
not reach the COMP set current value, the power
MOSFET will be forced to turn off
Connect EN with Vin through a resistive voltage
divider for automatic startup as the Figure 2
shows.
V
IN
R
EN1
EN
R
EN2
Figure 2—Enable Divider Circuit
Power Good Indicator
Choose the value of the pull-up resistor REN1 and
pull-down resistor REN2 to reset the automatic
start-up voltage:
When the FB is below 0.85VFB, the PG pin will be
internally pulled low. When the FB is above
0.9VFB, the PG becomes an open-drain output.
(REN1 + REN2 ||1MΩ)
V
= VEN_RISING ⋅
Internal Regulator
IN_START
REN2 ||1MΩ
Most of the internal circuitries are powered from
the 5V internal regulator. This regulator takes the
VIN input and operates in the full VIN range.
When VIN is greater than 5.0V, the output of the
regulator is in full regulation. When VIN is lower
than 5.0V, the output decreases. 0.1uF ceramic
capacitor for decoupling purpose is required.
(REN1 + REN2 ||1MΩ)
V
=
VEN-FALLING ⋅
IN_STOP
REN2 ||1MΩ
1ms Turn On Delay
5us Turn Off Delay
VIN_START
VIN_STOP
Vin
VEN_Rising
VEN_Falling
Error Amplifier
EN/Sync
The error amplifier compares the FB pin voltage
with the internal 0.805V reference (REF) and
outputs a current proportional to the difference
between the two. This output current is then used
to charge or discharge the internal compensation
network to form the COMP voltage, which is used
to control the power MOSFET current. The
VCC_Rising
Vcc
Vout
Figure 3—Startup Sequence Using EN Divider
3) Synchronized by External Sync Clock Signal
optimized
internal
compensation
network
The chip can be synchronized to external clock
range from 300kHz up to 2MHz through this pin
2ms right after output voltage is set, with the
internal clock rising edge synchronized to the
external clock rising edge.
minimizes the external component counts and
simplifies the control loop design.
Enable/Sync Control
EN/Sync is a digital control pin that turns the
regulator on and off. Drive EN high to turn on the
regulator, drive it low to turn it off. There is an
internal 1MEG resistor from EN/Sync to GND
thus EN/Sync can be floated to shut down the
chip.
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
9
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
Thermal Shutdown
Thermal shutdown is implemented to prevent the
chip from operating at exceedingly high
temperatures. When the silicon die temperature
is higher than 150°C, it shuts down the whole
chip. When the temperature is lower than its
lower threshold, typically 140°C, the chip is
enabled again.
Floating Driver and Bootstrap Charging
The floating power MOSFET driver is powered by
an external bootstrap capacitor. This floating
Figure 4—Startup Sequence Using External
driver has its own UVLO protection. This UVLO’s
rising threshold is 2.2V with a hysteresis of
150mV. The bootstrap capacitor voltage is
regulated internally by VIN through D1, M3, C4,
L1 and C2 (Figure 5). If (VIN-VSW) is more than
5V, U2 will regulate M3 to maintain a 5V BST
voltage across C4.
Sync Clock Signal
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented to
protect the chip from operating at insufficient
supply voltage. The MP28252 UVLO comparator
monitors the output voltage of the internal
regulator, VCC. The UVLO rising threshold is
about 4.0V while its falling threshold is a
consistent 3.2V.
Internal Soft-Start
The soft-start is implemented to prevent the
converter output voltage from overshooting
during startup. When the chip starts, the internal
circuitry generates a soft-start voltage (SS)
ramping up from 0V to 1.2V. When it is lower
than the internal reference (REF), SS overrides
REF so the error amplifier uses SS as the
reference. When SS is higher than REF, REF
regains control. The SS time is internally fixed to
4ms.
SW
Figure 5—Internal Bootstrap Charging Circuit
Startup and Shutdown
Over-Current-Protection and Hiccup
If both VIN and EN are higher than their
appropriate thresholds, the chip starts. The
reference block starts first, generating stable
reference voltage and currents, and then the
internal regulator is enabled. The regulator
provides stable supply for the remaining
circuitries.
The MP28252 has cycle-by-cycle over current
limit when the inductor current peak value
exceeds the set current limit threshold.
Meanwhile, output voltage starts to drop until FB
is below the Under-Voltage (UV) threshold,
typically 30% below the reference. Once a UV is
triggered, the MP28252 enters hiccup mode to
periodically restart the part. This protection mode
is especially useful when the output is dead-short
to ground. The average short circuit current is
greatly reduced to alleviate the thermal issue and
to protect the regulator. The MP28252 exits the
hiccup mode once the over current condition is
removed.
Three events can shut down the chip: EN low,
VIN low and thermal shutdown. In the shutdown
procedure, the signaling path is first blocked to
avoid any fault triggering. The COMP voltage and
the internal supply rail are then pulled down. The
floating driver is not subject to this shutdown
command.
MP28252 Rev. 1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
10
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
Where ΔIL is the inductor ripple current.
APPLICATION INFORMATION
Choose inductor ripple current to be
approximately 30% if the maximum load current,
2A. The maximum inductor peak current is:
Setting the Output Voltage
The external resistor divider is used to set the
output voltage (see Typical Application on page
1). The feedback resistor R1 also sets the
feedback loop bandwidth with the internal
compensation capacitor (see Typical Application
on page 1). Choose R1 to be around 40.2kꢀ for
optimal transient response. R2 is then given by:
ΔIL
IL(MAX) = ILOAD
+
2
Under light load conditions below 100mA, larger
inductance is recommended for improved
efficiency.
R1
R2 =
Selecting the Input Capacitor
VOUT
−1
The input current to the step-down converter is
discontinuous, therefore a capacitor is required to
supply the AC current to the step-down converter
while maintaining the DC input voltage. Use low ESR
capacitors for the best performance. Ceramic
capacitors with X5R or X7R dielectrics are highly
recommended because of their low ESR and
small temperature coefficients. For most
applications, a 22µF capacitor is sufficient.
VFB
The T-type network is highly recommended when
Vo is low, as Figure 6 shows.
R1
Rt
1
FB
VOUT
R2
Figure 6— T-type Network
Since the input capacitor (C1) absorbs the input
switching current it requires an adequate ripple
current rating. The RMS current in the input capacitor
can be estimated by:
Table 1 lists the recommended T-type resistors
value for common output voltages.
Table 1—Resistor Selection for Common
Output Voltages
⎛
⎞
⎟
VOUT
VIN
VOUT
VIN
⎜
IC1 = ILOAD
×
× 1−
⎜
⎝
⎟
⎠
VOUT
(V)
R1
R2
Rt
L
COUT
(kΩ) (kΩ) (kΩ) (uH) (uF, Ceramic)
The worse case condition occurs at VIN = 2VOUT,
where:
1.05 4.99 16.5 24.9 1-4.7
47
47
47
47
47
47
47
1.2
1.5
1.8
2.5
3.3
5
4.99 10.2 24.9 1-4.7
4.99 5.76 24.9 1-4.7
4.99 4.02 24.9 1-4.7
ILOAD
IC1
=
2
For simplification, choose the input capacitor
whose RMS current rating greater than half of the
maximum load current.
40.2 19.1
40.2 13
40.2 7.68
0
0
0
1-4.7
1-4.7
1-4.7
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
Note:
The above feedback resistor table applies to a specific load
capacitor condition as shown in the table 1. Other capacitive loading
conditions will require different values.
capacitors,
a
small, high quality ceramic
capacitor, i.e. 0.1μF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple caused by capacitance can
be estimated by:
Selecting the Inductor
A 1µH to 10µH inductor with a DC current rating
of at least 25% percent higher than the maximum
load current is recommended for most
applications. For highest efficiency, the inductor
DC resistance should be less than 15mꢀ. For
most designs, the inductance value can be
derived from the following equation.
VOUT × (VIN − VOUT
VIN × ΔIL × fOSC
)
L =
MP28252 Rev. 1.1
12/25/2013
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11
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
and compensation components as close to
the chip as possible.
⎛
⎜
⎝
⎞
⎟
⎟
⎠
ILOAD
VOUT
VIN
VOUT
⎜
ΔV
=
×
× 1−
IN
fS × C1
V
IN
4) Route SW away from sensitive analog
areas such as FB.
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
preferred to keep the output voltage ripple low.
The output voltage ripple can be estimated by:
5) Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
6) Adding RC snubber circuit from IN pin to
SW pin can reduce SW spikes.
⎛
⎜
⎝
⎞
⎟
⎟
⎠
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
VOUT
VIN
1
⎜
⎜
ΔVOUT
=
× 1−
× RESR
+
fS × L
8 × fS × C2
Where L is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VOUT
8 × fS2 × L × C2
VOUT
⎜
ΔVOUT
=
× 1−
V
IN
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
Top Layer
VOUT
VOUT
⎛
⎞
ΔVOUT
=
× ⎜1−
⎟ ×RESR
⎜
⎟
fS ×L
VIN
⎝
⎠
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP28252 can be optimized for a wide range of
capacitance and ESR values.
PCB Layout
PCB layout is very important to achieve stable
operation. Please follow these guidelines and
take Figure 7 for references.
1) Keep the connection of input ground and
GND pin as short and wide as possible.
2) Keep the connection of input capacitor and
IN pin as short and wide as possible.
Bottom Layer
Figure 7—PCB Layout
3) Ensure all feedback connections are short
and direct. Place the feedback resistors
MP28252 Rev. 1.1
12/25/2013
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12
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator, the applicable
conditions of external BST diode is:
VOUT
z Duty cycle is high: D=
>65%
VIN
In this case, an external BST diode is
recommended from the VCC pin to BST pin, as
shown in Figure 8
External BST Diode
IN4148
BST
CBST
MP28252
5V or 3.3V
SW
+
COUT
L
Figure 8—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BST diode is
IN4148, and the BST cap is 0.1~1µF.
MP28252 Rev. 1.1
12/25/2013
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© 2013 MPS. All Rights Reserved.
13
MP28252 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS
PACKAGE INFORMATION
3mm x 4mm QFN14
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP28252 Rev.1.1
12/25/2013
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
14
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