MP3312LGC-Z [MPS]

LED Driver,;
MP3312LGC-Z
型号: MP3312LGC-Z
厂家: MONOLITHIC POWER SYSTEMS    MONOLITHIC POWER SYSTEMS
描述:

LED Driver,

驱动 接口集成电路
文件: 总16页 (文件大小:433K)
中文:  中文翻译
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MP3312L  
2.7V-5.5V Input , 38V OVP,  
Dual-Channel White LED Driver  
The Future of Analog IC Technology  
DESCRIPTION  
FEATURES  
The MP3312L is a dual-channel, step-up WLED  
driver with an integrated 40V MOSFET. It  
supports a 2.7V to 5.5V power supply input and  
uses peak current mode to regulate the LED  
current, which is set by an external resistor.  
2.7V~5.5V Input Voltage  
600kHz Switching Frequency  
Dual Channels Support up to 30mA/String  
1% Current Matching between LED Channels  
+/-2% Current Accuracy  
38V OVP  
The MP3312L employs a 600kHz fixed switching  
frequency. It supports both PWM input analog  
dimming and digital analog dimming to regulate  
the dimming current accurately.  
PWM Input Analog Dimming Mode  
5kHz to100kHz PWM Input Analog Dimming  
1-Wire Interface for Digital Dimming  
9-Bit Dimming Resolution  
Internal Soft Start to Reduce Inrush Current  
Available in WLCSP1.35x1.35-9mm Package  
The MP3312L integrates a current source to  
balance the LED current, which leads to good  
ILED matching and accuracy performance.  
APPLICATIONS  
In addition, the MP3312L has both LED open and  
short protection, cycle-by-cycle current limit  
protection, and thermal shutdown protection. It is  
Feature Phones and Smart Phones  
Tablets  
GPS Receivers  
<10 Inch LCD Video Displays with One-Cell  
Li-Ion Battery  
available in  
package.  
a
tiny WLCSP1.35x1.35-9mm  
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For  
MPS green status, please visit the MPS website under Quality Assurance.  
“MPS” and “The Future of Analog IC Technology” are registered trademarks of  
Monolithic Power Systems, Inc.  
TYPICAL APPLICATION  
89.8  
89.6  
89.4  
89.2  
89  
88.8  
88.6  
88.4  
88.2  
88  
87.8  
2.5  
3
3.5  
4
4.5  
5
5.5  
6
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
1
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
ORDERING INFORMATION  
Part Number*  
Package  
Top Marking  
MP3312LGC  
WLCSP1.35x1.35-9mm  
See Below  
* For Tape & Reel, add suffix –Z (e.g. MP3312LGC–Z)  
TOP MARKING  
DM: Product code of MP3312LGC  
Y: Year code  
LLL: Lot number  
PACKAGE REFERENCE  
Package Diagram  
WLCSP1.35x1.35-9mm  
ABSOLUTE MAXIMUM RATINGS (1)  
VIN.................................................. -0.3V to +6V  
VSW…………………………………....-1V to +40V  
VLED1, VLED2 ………………………...-0.3V to +40V  
All other pins................................. –0.3V to +6V  
Junction temperature...............................150°C  
Lead temperature ....................................260°C  
Thermal Resistance (4)  
WLCSP1.35x1.359mm....…………120…..12..°C/W  
θJA θJC  
NOTES:  
1) Exceeding these ratings may damage the device.  
2) The maximum allowable power dissipation is a function of the  
maximum junction temperature TJ (MAX), the junction-to-  
ambient thermal resistance θJA, and the ambient temperature  
TA. The maximum allowable continuous power dissipation at  
any ambient temperature is calculated by PD (MAX) = (TJ  
(MAX)-TA)/θJA. Exceeding the maximum allowable power  
dissipation will produce an excessive die temperature,  
causing the regulator to go into thermal shutdown. Internal  
thermal shutdown circuitry protects the device from  
permanent damage.  
(2)  
Continuous power dissipation (TA = 25°C)  
WLCSP1.35x1.35-9mm ...........................1.04W  
Recommended Operating Conditions (3)  
Supply voltage (VIN) ....................... 2.7V to 5.5V  
Operating junction temp...........-40°C to +125°C  
3) The device is not guaranteed to function outside of its  
operating conditions.  
4) Measured on JESD51-7, 4-layer PCB.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
2
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
ELECTRICAL CHARACTERISTICS  
VIN = 3.7V, VEN = VPWM = high, typical values are at TA = 25°C, unless otherwise noted.  
Parameters  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
Power Supply  
Operating input voltage  
VIN  
IQ  
2.7  
5.5  
2
V
VIN = 3.7V, VEN = VPWM = high,  
no load with switching  
Supply current (quiescent)  
1
mA  
Supply current (shutdown)  
Input UVLO threshold  
Input UVLO hysteresis  
Oscillator  
IST  
VEN = 0V, VIN = 3.7V  
1
μA  
V
VIN_UVLO Rising edge  
2.4  
2.6  
200  
mV  
Switching frequency  
Maximum duty cycle  
Minimum on time(5)  
Power Switch  
fSW  
500  
93  
600  
95  
720  
kHz  
%
DMAX  
TON_MIN  
100  
ns  
Main switch on resistance  
Error Amplifier  
RDSON_M VIN = 3.7V  
0.2  
Error amplifier transconductance  
Max sink/source current  
Current Regulation  
VLEDx regulation voltage  
ISET voltage  
gm  
370  
42  
µS  
μA  
VREG  
VISET  
KISET  
ILED1 = ILED2 = 20mA  
240  
1.232  
1020  
mV  
V
1.207  
-2  
1.247  
Current multiplier  
IISET = 20µA,  
(|IMIN-IISET|/IISET,|IMAX-IISET|/  
Current accuracy  
Current matching  
2
2
%
IISET  
)
IISET = 20µA,  
(IMAX –IMIN) /IAVG  
1
%
Current sink max output current  
EN & PWM Logic  
30  
1.2  
1.2  
mA  
PWM input high threshold  
PWM input low threshold  
EN high voltage  
VPWM_HI  
VPWM rising  
V
V
VPWM_LO VPWM falling  
VEN_HIGH VEN rising  
0.4  
0.4  
V
EN low voltage  
VEN_LOW  
RPD  
VEN falling  
V
EN & PWM pull-down resistor  
800  
kΩ  
EN low logic  
TSD_EN  
EN high to low  
2.5  
20  
ms  
ms  
to shutdown time  
PWM low logic  
to shutdown time  
TSD_PWM PWM high to low  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
3
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
ELECTRICAL CHARACTERISTICS (continued)  
VIN = 3.7V, VEN = VPWM = high, typical values are at TA = 25°C, unless otherwise noted.  
Parameters  
Symbol  
Condition  
Min  
Typ  
Max  
Unit  
Protection  
OVP voltage  
VOVP  
ILIM  
ILIM_START  
TLIM_HALF  
37  
38  
1.8  
1
39.5  
V
A
Cycle-by-cycle current limit  
Start-up current limits(5)  
Time step for half current limit(5)  
LEDx threshold when no switching  
LEDx over-voltage threshold  
Thermal shutdown threshold  
Thermal shutdown hysteresis  
1-Wire Interface  
Max duty cycle  
Max duty cycle  
1.2  
A
6
ms  
mV  
V
560  
5
VOVP_LED  
TST  
4.5  
5.5  
150  
25  
°C  
°C  
1-wire detection delay time  
1-wire detection time  
tDELAY  
tDETECTION  
tWIN  
100  
260  
1
μs  
μs  
ms  
μs  
μs  
μs  
1-wire detection window  
Start time of program stream  
End time of program stream  
High time of logic 0 bit  
tSTART  
tEOS  
2
2
360  
180  
tH_LB  
5
Low time of logic 0 bit  
tL_LB  
3* tH_LB  
360  
μs  
High time of logic 1 bit  
tH_HB  
tL_HB  
tACKval  
tACK  
3* tL_HB  
360  
180  
2
μs  
μs  
μs  
μs  
Low time of logic 1 bit  
5
Acknowledge valid time  
Duration of acknowledge signal  
512  
Open  
RPULLUP = 15kΩ  
to VIN  
drain,  
Acknowledge output voltage low(6)  
VACKL  
0.4  
V
NOTES:  
5) Guaranteed by design and characterization.  
6) ACK signal is active 0 (when ACK signal is true, the data line is pulled down by the chip). This signal only replies when the RFA bit is set  
to 1. If you want to use the ACK signal, the master should have an open-drain output, and the data line should be pulled high by the  
master with a resistor load.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
4
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
TYPICAL CHARACTERISTICS  
350  
300  
250  
200  
350  
300  
250  
200  
150  
100  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
150  
100  
50  
0
0.1  
0
50  
0
-50 -30 -10 10 30 50 70 90 110130  
-50 -30 -10 10 30 50 70 90 110130  
-50 -30 -10 10 30 50 70 90 110130  
1.242  
1.24  
1.238  
1.236  
1.234  
1.232  
1.23  
1.228  
-50 -30 -10 10 30 50 70 90 110130  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
5
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
TYPICAL PERFORMANCE CHARACTERISTICS  
VIN = 3.7V, 6*LEDs/string, ILED1 = ILED2 = 20mA, L = 10µH, TA = 25°C, unless otherwise noted.  
5
4
3
2
1
45  
40  
35  
30  
25  
45  
40  
35  
30  
25  
20  
15  
10  
5
0
20  
15  
-1  
-2  
-3  
10  
5
0
-4  
-5  
00  
20  
40  
60  
80  
100  
0
20  
40  
60  
80 100  
2.5  
3
3.5  
4
4.5  
5
5.5  
6
90  
88  
86  
84  
82  
80  
78  
76  
0
20  
40  
60  
80  
100  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
6
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
TYPICAL PERFORMANCE CHARACTERISTICS (continued)  
VIN = 3.7V, 6*LEDs/string, ILED1 = ILED2 = 20mA, L = 10µH, TA = 25°C, unless otherwise noted.  
V
V
SW  
SW  
V
10V/div.  
SW  
10V/div.  
10V/div.  
V
IN  
V
OUT  
2V/div.  
10V/div.  
V
IN  
2V/div.  
I
L
I
I
LED  
L
200mA/div.  
20mA/div.  
200mA/div.  
I
I
I
LED  
50mA/div.  
LED  
L
50mA/div.  
500mA/div.  
V
V
V
SW  
SW  
SW  
10V/div.  
10V/div.  
10V/div.  
V
PWM  
V
V
EN  
EN  
5V/div.  
5V/div.  
5V/div.  
V
I
I
OUT  
L
L
20V/div.  
200mA/div.  
200mA/div.  
I
I
I
LED  
LED  
LED  
50mA/div.  
50mA/div.  
20mA/div.  
V
SW  
V
SW  
20V/div.  
V
SW  
10V/div.  
20V/div.  
V
LED1  
20V/div.  
V
COMP  
1V/div.  
V
OUT  
I
L
V
EN/1-WIRE  
2V/div.  
20V/div.  
200mA/div.  
I
L
200mA/div.  
I
LED  
I
I
LED  
LED  
50mA/div.  
20mA/div.  
20mA/div.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
7
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
PIN FUNCTIONS  
Pin #  
Name  
Description  
Full scale LED current set. Connecting a resistor between ISET and GND sets the full  
scale current.  
A1  
ISET  
A2  
A3  
LED2  
LED1  
LED2 current sink.  
LED1 current sink.  
PWM signal input. A 5kHz to 100kHz PWM signal is recommended for PWM for analog  
current dimming. Low logic for >20ms shuts down the IC.  
B1  
PWM  
B2  
B3  
C1  
COMP  
GND  
EN  
Internal error amplifier output . Connect a capacitor to compensate the system.  
Ground.  
Enable and 1-wire input. Logic high enables the IC, and low logic >2.5ms shuts down the  
IC.  
C2  
C3  
VIN  
SW  
Power supply input. Connect a ceramic capacitor close to VIN to bypass the IC.  
Drain connection of the internal N-channel power MOSFET.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
8
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
FUNCTIONAL BLOCK DIAGRAM  
L1  
D1  
VOUT  
VIN  
C1  
C2  
SW  
VIN  
OVP  
Shutdown  
OSC  
PWM  
Control  
EN  
EN  
Detection  
RAMP  
PWM  
Analog  
Dimming  
PWM  
Comparator  
VREF  
EA  
LED1  
COMP  
GND  
Feedback  
Control  
Current Control  
LED2  
ISET  
R2  
C3  
Min.  
Max.  
Short  
Protection  
EN  
R1  
Figure 1: Functional Block Diagram  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
9
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
OPERATION  
The MP3312L employs a fixed switching  
frequency, peak-current-mode control  
power delivered to the output. This forms a  
closed loop that regulates the output voltage.  
architecture, and two regulated current sinks to  
power the LED array (see Figure 1).  
Dimming Control  
The MP3312L supports analog dimming and 1-  
wire digital set dimming mode to regulate the  
WLED current.  
System Start-Up  
Pulling EN and PWM high enables the IC while  
pulling EN to GND for >2.5ms (or pulling PWM  
to GND for >20ms) shuts down the IC.  
For analog dimming, apply a PWM signal to  
PWM by adjusting the LED current amplitude.  
The internal filter is integrated, and the PWM  
signal (5k~100kHz range) is supported. The  
internal dimming signal duty detection circuit  
changes the internal reference linearly to  
regulate the current automatically.  
When enabled, the MP3312L checks the  
topology connection first. Also, the MP3312L  
checks UVLO and over-temperature protection  
(OTP). If all the protections pass, the chip starts  
boosting the step-up converter with an internal  
soft start.  
In addition, EN supports a 1-wire interface for  
current dimming control.  
It is recommended that the enable signal occurs  
after the establishment of the input voltage and  
PWM dimming signal during the start-up  
sequence to avoid large inrush current.  
1-Wire Interface  
1-wire interface is based on a master-slave  
structure, which is designed for digital dimming.  
EN is a multipurpose single port that receives  
LED brightness data. The rate to detect the bit  
ranges from 1.39kit/sec to 50kBit/sec.  
Switching Operation  
At the start of each oscillator cycle, the main  
low-side FET (M1) is turned on through the  
control circuitry. To prevent sub-harmonic  
oscillation at a duty cycle greater than 50%, a  
stabilizing ramp is added to the output of the  
current sense amplifier; the result is fed into the  
positive input of the PWM generation  
comparator. When this voltage equals the  
output voltage of the error amplifier, the main  
power FET is turned off. Then the inductor  
current flows through the free-wheeling diode,  
which forces the inductor current to decrease.  
The output voltage of the internal error amplifier  
is an amplified signal of the difference between  
the reference voltage and the feedback voltage.  
The converter chooses the lowest active LEDX  
pin voltage automatically to provide a high  
enough bus voltage to power all the LED arrays.  
The command sent to the chip (slave) contains  
24 bits and 9-bit dimming data. Also, an 8-bit  
device address and RFA bit are included. The  
chip detects the bit in the series and transmits  
the LSB first and the MSB last.  
Refer to Figure 2 and the description of the  
control bits below:  
D0-D8 are the dimming data bits, which  
achieve a 9-bit dimming resolution.  
Bit 9 and bit 11-bit 15 are reserved. Set to 0.  
The RFA bit indicates if the master needs to  
request acknowledgment or not.  
The device address byte is DA0-DA7. The  
device address byte is set to 0x8F.  
If the feedback voltage drops below the  
reference, the output of the error amplifier  
increases. This results in more current flowing  
through the MOSFET, thus increasing the  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
10  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
Figure 2: 1-Wire Command Structure  
EN must distinguish the EN signal and the  
digital dimming signal when setting up the boost  
driver. The chip only receives the 1-wire signal  
when the EN signal matches the 1-wire protocol  
during the 1ms 1-wire detection window. The 1-  
wire dimming sequence is described below and  
shown in Figure 4.  
The 1-wire interface defines logic 0 and logic 1  
by comparing the time between the signal’s low  
level and high level; 1 cycle means 1 logic bit.  
The bit detection starts with a falling edge on  
EN and ends with the next falling edge. Low  
logic (logic 0): tLOW3* tHIGH. High logic (logic 1):  
tHIGH3* tLOW (see Figure 3).  
1. VIN and PWM are pulled high.  
2. The data line is pulled from low to high for  
tDELAY (1-wire detection delay time, 100µs).  
This rising edge is the start of the 1-wire  
detection window.  
3. After the 1-wire detection delay time, the data  
line pulls low for more than tDETECTION (1-wire  
detection time, 260µs). Then the data line  
pulls high.  
4. The sum of the 1-wire detection delay time  
and the 1-wire detection time should be less  
than tWIN (the time of 1-wire detection window,  
1ms).  
Figure 3: 1-Wire Bit Definition  
Figure 4: 1-Wire Dimming Sequence  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
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© 2015 MPS. All Rights Reserved.  
11  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
In addition, before the chip starts to receive each  
Whether the ACK signal feedback is sent to the  
master or not is dependent on the RFA bit. If  
ACK is needed, the master should have an open-  
drain output, and the data line should be pulled  
high by the master with a resistor load.  
command with the first falling edge, the data line  
should remain high for tSTART (minimum, 2µs). The  
transmission of each command is completed with  
low levels for tEOS (minimum 2µs). See Figure 5.  
Figure 5: Data-Line Timing When RFA = 0  
Figure 6: Data-Line Timing When RFA=1  
If RFA = 0, there is no ACK signal feedback.  
the slave for tACK (max. 512µs). If the master  
reads this low logic, it means the chip has  
received the 1-wire data successfully, and the  
data line is pulled to static high (see Figure 6).  
After all 24 bits of data are transferred, the data  
line remains low for a tEOS (minimum 2µs) delay,  
and then it is pulled to static high (see Figure 5).  
If RFA = 1, the ACK signal feedback is sent to  
the master. After all 24 bits of data are  
transferred, the data line remains low for tACKval  
(maximum, 2µs), then the data line should be  
released to output high impedance. After this  
occurs, the master is ready to detect the ACK  
signal from the slave. After tACKval, if the ACK  
signal is “false” (1-wire data is not received  
successfully), the data line will be pulled high  
directly. After tACKval, if the ACK signal is “true” (1-  
wire data is received successfully), the data line  
is pulled low continuously (VACKL (max. 0.4V)) by  
The MP3312L has a 9 bit DAC for digital  
dimming control; the dimming resolution is 1/511.  
The default code value of D0 (LSB)-D8(MSB) is  
“111111111” when the device is first enabled.  
The LED current is dependent on the internal  
register value D0-D8 according to Equation (1):  
code  
ILED = ILEDfull ×  
(1)  
511  
ILEDfull is the full scale output current set by RISET  
to ISET. The code is the DEC value of the  
resolution bit (D0-D8).  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
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© 2015 MPS. All Rights Reserved.  
12  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
Short-String Protection  
Cycle-by-Cycle Current Limit Protection  
The MP3312L monitors the LEDX voltage to  
detect if the short string has occurred. If one  
string is short, the respective LEDX pin is pulled  
up to the boost output and tolerates high voltage  
stress. If the LEDX voltage is higher than 5V and  
the LED current is larger than the 8% of the full-  
scale setting current, the short-string condition is  
detected. If this condition lasts longer than 8ms,  
the fault string current source is disabled until  
VIN and EN are reset for enable.  
The MP3312L provides cycle-by-cycle current  
limit protection to avoid damage caused by too  
large of a current rating. During start-up, the  
current limit is clamped to 1A for around 6ms to  
avoid output overshoot and inrush current. After  
start-up, the current limit returns back to a normal  
1.8A.  
Open-String Protection  
Open-string protection is achieved by detecting  
VOUT. If the LED string is open, the feedback  
voltage is lower than the reference voltage, and  
thus the COMP rises up and keeps the charge of  
the output capacitor until VOUT hits the  
protection point OVP. Then the IC stops  
switching and shuts down until VIN and EN are  
reset for enable.  
Thermal Shutdown Protection  
To prevent the IC from operating at exceedingly  
high temperatures, thermal shutdown is  
implemented in this chip by detecting the silicon  
die temperature. When the die temperature  
exceeds the upper threshold (150°, typically), the  
IC shuts down. It resumes normal operation once  
the die temperature drops below the lower  
threshold. Typically, the hysteresis value is 25°C.  
Unused LED Channel  
In some cases, if one LED current channel is not  
used, LEDX must be connected to the  
corresponding GND to remove it from the control  
loop.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
13  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
APPLICATION INFORMATION  
In order to avoid hitting the current limit, the  
worst-case inductor peak current should be less  
than 80% of the current limit (ILIM). Generally, a  
4.7µH~10µH inductor will suffice for most  
applications. Note that the system efficiency is  
dependent on the DC resistance of the inductor,  
and a larger DC resistance causes more power  
loss.  
Setting the LED Current  
The full scale LED current is set through the  
current-setting resistor on FB using Equation (2).  
V
ISET(V)  
ILED(mA) =  
*1020  
(2)  
RISET(kΩ)  
For VISET = 1.232V and RISET = 63.4k, the LED  
current is set to 20mA. Please do NOT leave  
ISET open.  
Selecting the Output Capacitor  
The output capacitor keeps the output voltage  
ripple small and ensures feedback loop stability.  
The output capacitor impedance must be low at  
the switching frequency. Ceramic capacitors with  
X7R dielectrics are recommended for their low  
ESR characteristics. Please note that ceramic  
capacitance is also dependent on the voltage  
rating; DC bias voltage and the value can lose as  
much as 50% of its capacitance at its rated  
voltage rating. Please leave a high enough  
voltage rating margin when selecting the  
component. However, if the capacitance is too  
low, it will cause loop instability. For most  
applications, a 1μF~4.7μF ceramic capacitor will  
suffice.  
Selecting the Input Capacitor  
The input capacitor reduces the surge current  
drawn from the input supply and the switching  
noise from the device. The input capacitor  
impedance at the switching frequency should be  
much less than the input source impedance to  
prevent the high-frequency switching current  
from passing through to the input. Use ceramic  
capacitors with X5R or X7R dielectrics for their  
low ESR and small temperature coefficients. For  
most applications,  
capacitor will suffice.  
a
1µF~4.7μF ceramic  
Selecting the Inductor  
The MP3312L requires an inductor to supply a  
higher output voltage while being driven by the  
input voltage. A larger value inductor results in  
less ripple current, resulting in lower peak  
inductor current, which reduces stress on the  
internal N-channel MOSFET. However, the larger  
value inductor has a larger physical size, a higher  
series resistance, and a lower saturation current.  
Selecting the External Schottky Diode  
To optimize efficiency, a high-speed and low-  
reverse recovery current Schottky diode is  
recommended. Make sure the diode’s average  
and peak current ratings exceed the output  
average LED current and the peak inductor  
current. In addition, the diode’s breakdown  
voltage rating should be larger than the  
maximum voltage across the diode. Usually,  
unexpected high-frequency spikes in the voltage  
can be seen across the diode when the diode  
turns off. When selecting a diode, always leave a  
sufficient voltage rating margin to guarantee  
normal, long-term operation.  
Choose an inductor that does not saturate under  
the worst-case load conditions. Select the  
minimum inductor value to ensure that the boost  
converter works in continuous conduction mode  
with high efficiency and good EMI performance.  
Calculate the required inductance value using  
Equation (3) and Equation (4):  
PCB Layout Guidelines  
η× VOUT × D×(1D)2  
L ≥  
(3)  
(4)  
Efficient PCB layout is critical to prevent noise  
and electromagnetic interference. If the loop of  
MP3312L’s internal low-side MOSFET, Schottky  
diode, and output capacitor flows with a high  
frequency ripple current, it MUST be minimized.  
The input and output capacitor should be placed  
2× fSW × ILOAD  
V
IN  
D = 1−  
VOUT  
Where VIN and VOUT are the input and output  
voltages, fSW is the switching frequency, ILOAD is  
the total LED load current, and η is the efficiency.  
The switching current is used for the peak-  
current-mode control.  
as  
close  
to  
the  
IC  
as  
possible.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
14  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
TYPICAL APPLICATION CIRCUITS  
10µH  
1µF  
1µF  
63.4k  
330nF  
Figure 7: Typical Application for Dual String 6 LEDs, 20mA/String  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
15  
MP3312L 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER  
PACKAGE INFORMATION  
WLCSP1.35X1.35-9  
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.  
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS  
products into any application. MPS will not assume any legal responsibility for any said applications.  
MP3312L Rev. 1.0  
8/11/2015  
www.MonolithicPower.com  
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.  
© 2015 MPS. All Rights Reserved.  
16  

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