MSHN2P [MSI]

Selectable Highpass/Notch Filter;


型号：	MSHN2P
厂家：	Mixed Signal Integration
描述：	Selectable Highpass/Notch Filter
文件：	总6页 (文件大小：137K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Fe a t u r e s

D e s cr i p t i o n

Six Filter Types In One Package

No External Components

Switched-Capacitor Filters

Low Power Operation

Low Voltage Operation

Input Multiplexor

Adjustable Gain 0, 10 or 20 dB

Small Package Size

Low Cost

The selectable highpass/ notch filter IC Is a

CMOS chip that can be configured for either

a highpass or a notch filter. The highpass re-

sponse can be an 8 pole Butterworth, a 7

pole Elliptic or an 8 pole Bessel filter. The

notch response can be narrow, wide or

deep.The device uses switched-capacitor fil-

ters and no external components (except for

decoupling capacitors) are required, Only an

external CMOS level clock is needed. An on-

chip lowpass filter is included to reduce output

noise. The -3dB point is at approximately 0.2

of the clock frequency.

On Chip Power Save Pin

Ap p l i ca t i o n s

General Purpose Systems

Portable Systems

Telecommunications

Tracking Filters

Harmonic Analysis

Noise Analysis

Data Communication

Wireless Applications

A four input multiplexor and externally select-

able gain setting pin, along with a power down

and clock to corner ratio select pin are in-

cluded in the 16 pin version. An 8 pin version

is also available for PC board area savings.

Typical current consumption is as low as 200

uA and the minimum operating voltage is 2.7

volts, making the device ideal for portable ap-

plications. MSHN3, MSHN4 and MSHN6 are

low current, lower frequency versions.

Hig h p a s s Re s p o n s e s

N o t ch Re s p o n s e s

-20

Narrow

Bessel

-20

-40

Butterworth

Wide

-40

-60

-80

Elliptic

-60

-80

-100

-120

Deep

-100

250

450

650

850

1050

1250

1450

1650

1850

850

875

900

925

950

975

1000

1025

1050

1075

1100

1125

1150

Web Site “www.mix-sig.com”

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Ele ctr ica l Ch a r a cte r is tics _______

(VDD = +5.0V, T = 25 ^oC)

PARAMETER

DC Specifications

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Operating Voltage

Supply Current

Supply Current (Power Down)

AC Specifications

Gain

Noise

Distortion

Signal Swing

Input Impedance

Output Drive

VDD

IDD

2.7

200

100

5.5

1.5

300

200

MSHN1, MSHN2, MSHN5

MSHN3, MSHN4, MSHN6

MSHN2, MSHN4

-0.5

250

-72

4.5

0.5

uVrms

V p-p

Mohm

To 1/ 2 Sample

A weighted

1 kHz

THD

ZIN

Output Impedance

Output Capacitive Load

Clock to Corner

Center Frequency Range

Ripple

500

1000

100

1000

ohm

MSHN5, MSHN6

MSHN1, MSHN3

MSHN2, MSHN4, Fo=0

MSHN2, MSHN4, Fo=1

MSHN1, MSHN2

MSHN3, MSHN4

MSHN5

900

1020

101

1020

500

900

0.001

kHz

MSHN6

Elliptic Highpass

Stop Band Rejection

Elliptic/ Butterworth Highpass

-3 dB top Notch Bandwidth

Narrow

0.2

Normalized Fo

0.92

0.88

0.89

1.08

1.12

1.11

Wide

Deep

Bottom Notch Bandwidth

Narrow

Wide

Normalized Fo

0.99

0.97

0.99

1.00

1.01

1.03

1.01

Deep

Notch depth

Narrow

Wide

Deep

-70

-60

-80

Web Site “www.mix-sig.com”

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Ap p lica tio n Sch e m a tics fo r M SHN 1 , M SHN 3 , M SHN 5 a n d M SHN 6

VCC

47kohm

100nF

FSEL

OUT

HIGHPASS_NOTCH

FILTER_OUTPUT

BU_BE_EL_D_N_W

FILTER_INPUT

GND

VSS

VDD

TYPE

CLK

MSHN1_3_5_6

300kHz 5V

100nF

Sin g le Su p p ly

VDD

VSS

2.5V

-2.5V

FSEL

OUT

HIGHPASS_NOTCH

FILTER_INPUT

GND

FILTER_OUTPUT

TYPE

CLK

VSS

MSHN1_3_5_6

BU_BE_EL_D_N_W

VDD

100nF

P2V5_N2V5_300kHz

Du a l Su p p ly

Web Site “www.mix-sig.com”

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Ap p lica tio n Sch e m a tics fo r M SHN 2 a n d M SHN 4

VCC

100nF

47kohm

TYPE

BU_BE_EL_FL_3_6

SELECT3_4

SELECT_1_2

OUT

FSEL

IN4

FILTER_OUTPUT

LOWPASS_BANDPASS

INPUT_4

CLK

100nF

0_10_20dB

POWERDOWN

50_100

VDD

IN3

MSFS2_4

100nF

IN2

INPUT_3

INPUT_2

INPUT_1

VSS

IN1

GND

100nF

300kHz 5V

Sin g le Su p p ly

VDD

2.5V

VSS

-2.5V

100nF

TYPE

BU_BE_EL_FL_3_6

SELECT3_4

SELECT_1_2

CLK

OUT

FSEL

IN4

FILTER_OUTPUT

LOWPASS_BANDPASS

INPUT_4

100nF

0_10_20dB

POWERDOWN

50_100

VDD

IN3

MSFS2_4

IN2

INPUT_3

INPUT_2

INPUT_1

VSS

IN1

GND

P2V5_N2V5_300kHz

100nF

Du a l Su p p ly

Web Site “www.mix-sig.com”

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Filte r Se le ctio n ________________

G a in a n d Fr e q u e n cy Se le ctio n ____

The filter type is selected using the two filter select pins,

TYPE and FSEL, FSEL is a CMOS level pin that selects

highpass or notch (highpass = 0, notch = 1). TYPE Is a

tertiary control pin that selects the filter response. State

0 is VSS, state 1 is GND and state 2 is VDD.

The Gain control pin G is a tertiary control pin where

state 0 is VSS, state 1 is GND level and state 2 is VDD.

Gain

OdB

10dB

20dB

TYPE

Highpass

Notch

The frequency control pin F0 is a CMOS level pin

where high is clock to corner of 1000 to 1 and low is

clock to corner of 100 to 1.

Butterworth

Bessel

Elliptic

Deep

Narrow

Wide

P in De s cr ip tio n ________________

P i n Co n f i g u r a t i o n

1. TYPE

2. S2

3. CLK

4. G

Filter Response Select Pin.

Input Multiplexor Select Pin

Clock Input

FSEL

OUT

TYPE

CLK

Gain Select Pin

8 P in

5. VDD

Positive Power Supply, Typically 2.5

Volts for Split Supply 5.0 Volts for

Single Supply

Power Down Pin, CMOS level,

Hi = Power Down

GND

VSS

VDD

6. PD

7, VSS

Negative Power Supply, Typically -2.5

Volts for Split Supply. 0 Volts for Single

Supply

8. F0

9. GND

Clock to Corner Select Pin

GND Pin, OV for Split Supplies

2.5 Volts Typical for Single Supply

Input 1, Select Code 00

Input 2, Select Code 01

Input 3, Select Code 10

Input 4, Select Code 11

Selects Filter.

TYPE

OUT

FSEL

CLK

10. IN1

11. IN2

12. IN3

13. IN4

14. FSEL

IN4

IN3

IN2

IN1

GND

VDD

VSS

O = High Pass, 1 = Notch

Filter Output

Input Multiplexor Select Pin

15. Out

16. S1

1 6 P in

Web Site “www.mix-sig.com”

6/ 2002

S e l e ct a b l e H i g h p a s s / N o t ch F i l t e r

D a t a S h e e t

Blo ck Dia g r a m ________________

IN1

IN2

IN3

IN4

SCF

Section

One

Adjustable

Gain

Input

MUX

Filter

and

Clock

Select

(TYPE, FSEL, Fo)

Single

Out

SCF

Section

Two

Pole

SCF

Section

Three

SCF

Section

Four

Lowpass

Two

Buffer

Ab s o lu te M a x im u m Ra tin g s

D i g i t a l Le v e l s

Power Supply Voltage

Storage Temperature

Operating Temperature

+6V

-60 to +150 C

0 to 70 C

All the clock and control pins (except FSEL and

G) are referenced between GND and VDD. In

single supply applications, the digital levels

should be CMOS levels from VSS to VDD. In

dual supply systems, the digital levels should

be CMOS levels from GND to VDD.

O r d e r in g In fo r m a tio n __________

Part Number

Package

Clock to Corner Ratio

MSHN1P

MSHN2P

MSHN3P

MSHN4P

MSHN5P

MSHN6P

MSHN1S

MSHN2S

MSHN3S

MSHN4S

MSHN5S

MSHN6S

8 Pin DIP

16 Pin DIP

8 Pin DIP

16 Pin DIP

8 Pin DIP

100

100 or 1000

100

100 or 1000

1000

100

100 or 1000

100

100 or 1000

1000

I n p u t S e l e ct i o n

The input is selected using the Input Select Pins

S1 and S2.

Input

8 Pin DIP

8 Pin SOIC

16 Pin SOIC

8 Pin SOIC

16 Pin SOIC

8 Pin SOIC

1000

Web Site “www.mix-sig.com”

Mixed Signal Integration Corporation reserves the right to to change any product or specification without notice at any time. Mixed Signal Integration

products are not designed or authorized for use in life support systems. Mixed Signal Integration assumes no responsibility for errors in this docu-

ment.

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