MSTHDA [MSI]
Total Harmonic Distortion Analyzer;
| 型号： | MSTHDA |
| 厂家： | 
Mixed Signal Integration |
| 描述： | Total Harmonic Distortion Analyzer |
| 文件： | 总8页 (文件大小：120K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
6/2017
To ta l Ha r m o n ic Dis to r tio n An a ly z e r
Da ta Sh e e t
De s cr ip tio n
Fe a tu r e s
th
Selectable Power Modes as low as 2 mA (3V)
Power Down Mode to 400 uA
Operates from 3.0V to 5.5 VDC
5 6 pole Bandpass filters in one package
Digitally controlled gain stage
The MSTHDA is a single chip 1/6 octave-wide
5 harmonic Total Harmonic Distortion analyzer
whose center frequencies are controlled by a
single master clock. The center frequencies are
set at the fundamental, second harmonic, third
harmonic, fourth harmonic and fifth harmonic fre-
quency. The sample to corner is 25:1 for the
fifth-harmonic output and 125:1 at the funda-
mental output (Double Sampled). The fifth har-
monic output is 3.4 MHz when clocked at 42.5
MHz(MSTHDA-1).
Two Uncommitted Op Amps
No Microprocessor Needed
Ap p lica tio n s
Multi-standard RFID Readers (MSTHDA-1)
Real-Time DistortionAnalysis
Audio and Ultrasonic Analysis
Vibration Analysis
The MSTHDA includes two uncommitted op
amps for adding additional fixed gain for micro-
phone or other low level applications. A digital-
ly programmable gain stage provides 0, 10 or
20 dB of gain. The PD pin selects power
down, low power for ultrasonic applications and
regular power for high frequency operation.
O r d e r in g In fo r m a tio n
Part Number
Package
Operating Temperature
o o
-40 to +85 C
MSTHDAN
SOIC-16N
Ab s o lu te M a x im u m Ra tin g s
Power Supply Voltage
+6V
o
The MSTHDAis fabricated in 0.6 um CMOS
process for low power consumption and opera-
tion from 3.0 to 5.5 VDC. All packages are
Storage Temperature Range
Operating Temperature Range
-60 to +150 C
o
-40 to +85 C
150 mil wide (Narrow SOIC)
0
-10
-20
-30
-40
-50
-60
-70
FREQUENCY (Hz)
Figure 1: Normalized Frequency Response
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Electrical Characteristics
(VDD = +5.0V, T = 25 C)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
------------------------------------------------------------------------------------------------------------------------------------------------------------
DC Specifications
------------------------------------------------------------------------------------------------------------------------------------------------------------
Operating Voltage
------------------------------------------------------------------------------------------------------------------------------------------------------------
Supply Current IDD PD=VDD RBias=100k 110 mA
------------------------------------------------------------------------------------------------------------------------------------------------------------
VDD
3.3
5.0
5.5
V
Supply Current
IDD
PD=VDD
15
mA
Supply Current
IDD
PD=VDD/2
5
mA
------------------------------------------------------------------------------------------------------------------------------------------------------------
Powerdown Current IDD PD=VSS 400 μA
------------------------------------------------------------------------------------------------------------------------------------------------------------
Input Impedance RI 10 MΩ
------------------------------------------------------------------------------------------------------------------------------------------------------------
Output Impedance RO 500
------------------------------------------------------------------------------------------------------------------------------------------------------------
Supply Current IDD PD=1/2VDD VDD=3.3V 0.5 1.0 2.0 mA
PD
Ω
*
------------------------------------------------------------------------------------------------------------------------------------------------------------
AC Specifications
------------------------------------------------------------------------------------------------------------------------------------------------------------
-40 dB Bandwidth
0.76
1.32
Hz/Hz
------------------------------------------------------------------------------------------------------------------------------------------------------------
Maximum Center Frequency
Maximum Center Frequency
Bandpass Q
Output 5 PD=VDD/2V
Output 5 PD=5V
1
2
MHz
MHz
Q
9.0
------------------------------------------------------------------------------------------------------------------------------------------------------------
Output Capacitive Load 20 pF
------------------------------------------------------------------------------------------------------------------------------------------------------------
Output Signal Swing RL = 10 MΩ 4.0 Vpp
------------------------------------------------------------------------------------------------------------------------------------------------------------
Noise To 1/2 Sample 180 μVrms
------------------------------------------------------------------------------------------------------------------------------------------------------------
e
n
Clock to Corner Filter 1
Clock to Corner Filter 2
Clock to Corner Filter 3
Clock to Corner Filter 4
Clock to Corner Filter 5
Sample Rate is 2xClock
Sample Rate is 2xClock
Sample Rate is 2xClock
Sample Rate is 2xClock
Sample rate is 2x Clock
62.5
Hz/Hz
Hz/Hz
Hz/Hz
Hz/Hz
Hz/Hz
31.25
20.83
15.625
12.5
------------------------------------------------------------------------------------------------------------------------------------------------------------
Gain -0.5 0.0 0.5 dB
------------------------------------------------------------------------------------------------------------------------------------------------------------
Output Offset Voltage VOS V = 1 Vrms 50 mV
A
V
IN
------------------------------------------------------------------------------------------------------------------------------------------------------------
Distortion THD -71 dB
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Blo ck Dia g r a m
Mixed Signal Integration Corporation reserves the right to change any product or specification without notice at any time. Mixed Signal
Integration products are not designed or authorized for use in life support systems. Mixed Signal Integration assumes no responsibility
for errors in this document.
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P in De s cr ip tio n
1. INB Inverting Uncommitted Op Amp Input B
9. PD
Power Down; When CMOS high,
device is powered down.
2. OUTA Op Amp Output A
10. OUT1 Fundamental Filter Output
3. INA Inverting Op Amp Input A
11. OUT2 Second Harmonic Filter Output
12. OUT3 Third Harmonic Filter Output
13. OUT4 Fourth Harmonic Filter Output
14. OUT5 Fifth Harmonic Filter Output
15. VDD Positive Supply Typically 5.0 VDC
16. OUTB Uncommitted Op Amp B Output.
4. BIAS Bias Input on MSTHD-1
IPA
Noninverting OpAmp Input A MSTHD
5. AGND Connect to 1/2 VDD
6. CLK
7. VSS
CMOS Clock adjusts position of
bandpass filter outputs.
Negative Supply; Tie to 0VDC
8. GAIN Tertiary Control: 0V, 0 dB,
1/2 VDD 10 dB
VDD 20 dB
INB
OUTA
16 OUTB
1
2
3
VDD
15
14
INA
OUT5
OUT4
BIAS/IPA
4
5
13
12
OUT3
OUT2
AGND
CLK
11
6
OUT1
PD
10
9
VSS
7
GAIN
8
Figure 3: MSTHDA/MSTHDA-1 Pinout
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