MX23L8100TC-12 [Macronix]

8M-BIT MASK ROM(8/16 BIT OUTPUT); 8M - BIT MASK ROM ( 8/16位输出)
MX23L8100TC-12
型号: MX23L8100TC-12
厂家: MACRONIX INTERNATIONAL    MACRONIX INTERNATIONAL
描述:

8M-BIT MASK ROM(8/16 BIT OUTPUT)
8M - BIT MASK ROM ( 8/16位输出)

输出元件 有原始数据的样本ROM
文件: 总9页 (文件大小:736K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MX23L8100  
8M-BIT MASK ROM(8/16 BIT OUTPUT)  
FEATURES  
ORDER INFORMATION  
• Bit organization  
- 1M x 8 (byte mode)  
- 512K x 16 (word mode)  
• Fast access time  
- Random access: 100ns (max.)  
• Current  
- Operating: 20mA  
- Standby: 5uA  
• Supply voltage  
- 3.3V±10%  
• Package  
- 44 pin SOP (500mil)  
- 42 pin PDIP (600mil)  
- 48 pin TSOP (type 1)  
- 44 pin TSOP (type 2)  
Part No.  
Access Time Package  
MX23L8100MC-10  
MX23L8100MC-12  
MX23L8100MC-15  
MX23L8100PC-10  
MX23L8100PC-12  
MX23L8100PC-15  
MX23L8100TC-10  
MX23L8100TC-12  
MX23L8100TC-15  
MX23L8100RC-10  
MX23L8100RC-12  
MX23L8100RC-15  
MX23L8100YC-10  
MX23L8100YC-12  
MX23L8100TI-10  
100ns  
120ns  
150ns  
100ns  
120ns  
150ns  
100ns  
120ns  
150ns  
100ns  
120ns  
150ns  
100ns  
120ns  
100ns  
44 pin SOP  
44 pin SOP  
44 pin SOP  
42 pin PDIP  
42 pin PDIP  
42 pin PDIP  
48 pin TSOP*  
48 pin TSOP  
48 pin TSOP  
48 pin RTSOP*  
48 pin RTSOP  
48 pin RTSOP  
44 pin TSOP  
44 pin TSOP  
48 pin TSOP*  
Note: 1.48-TSOP and 48-RTSOP support word mode only,  
not for byte mode.  
PIN CONFIGURATION  
2.MX23L8100TI-10 is for industrial grade, tempera-  
ture -40~85°C  
44 SOP/44TSOP  
42 PDIP  
48TSOP (for word mode only)  
1
2
3
4
5
6
7
8
NC  
A16  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VSS  
VSS  
D15  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
VCC  
NC  
D11  
D3  
D10  
D2  
D9  
NC  
44  
NC  
NC  
A8  
A9  
A18  
A17  
A7  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
1
NC  
A8  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
2
A18  
A17  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A9  
3
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BYTE  
VSS  
D15/A-1  
D7  
A6  
4
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BYTE  
VSS  
D15/A-1  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
A5  
5
9
A4  
6
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
A8  
A3  
7
NC  
VSS  
NC  
A18  
A17  
A7  
A6  
A5  
A4  
A3  
A2  
8
MX23L8100  
(Normal Type)  
A1  
9
A0  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
A0  
CE  
VSS  
OE  
D0  
CE  
VSS  
OE  
D0  
D8  
D1  
D9  
D2  
D10  
D3  
D11  
D1  
D8  
D0  
OE  
VSS  
VSS  
A2  
A1  
A0  
CE  
D14  
D6  
D8  
D1  
D13  
D5  
D9  
48 ReverseTSOP (for word mode only)  
D2  
D12  
D4  
D10  
D3  
48  
47  
46  
45  
44  
43  
42  
41  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
NC  
A16  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
VSS  
VSS  
D15  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
VCC  
NC  
D11  
D3  
D10  
D2  
D9  
D1  
D8  
D0  
OE  
VSS  
VSS  
VCC  
D11  
40  
39  
38  
A8  
NC  
VSS  
NC  
A18  
A17  
A7  
A6  
A5  
A4  
A3  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
MX23L8100  
(Reverse Type)  
A2  
A1  
A0  
CE  
P/N:PM0464  
REV. 1.7,AUG. 20, 2001  
1
MX23L8100  
MODE SELECTION  
PIN DESCRIPTION  
Symbol Pin Function  
A0~A18 Address Inputs  
D0~D14 Data Outputs  
D15/A-1 D15(Word Mode)/LSB Address (Byte  
Mode)  
CE OE Byte D15/A-1 D0~D7 D8~D15 Mode Power  
H
L
L
L
X
H
L
X
X
H
L
X
X
High Z High Z  
High Z High Z  
-
-
Stand-by  
Active  
Output D0~D7 D8~D15 Word  
Input D0~D7 High Z Byte  
Active  
L
Active  
CE  
Chip Enable Input  
Output Enable Input  
Word/Byte Mode Selection  
Power Supply Pin  
Ground Pin  
OE  
Byte  
VCC  
VSS  
NC  
No Connection  
BLOCK DIAGRAM  
D0  
A0  
Address  
Buffer  
Memory  
Array  
Page  
Buffer  
Word/  
Output  
Buffer  
Byte  
D15/(D7)  
A18  
CE  
BYTE  
OE  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
Ratings  
Voltage on any Pin Relative to VSS  
Ambient OperatingTemperature  
StorageTemperature  
VIN  
-1.3V to VCC+2.0V (Note)  
0°C to 70°C  
Topr  
Tstg  
-65°C to 125°C  
Note: Minimum DC voltage on input or I/O pins is -0.5V.  
During voltage transitions, inputs may undershoot VSS  
to -1.3V for periods of up to 20ns. Maximum DC voltage  
on input or I/O pins is VCC+0.5V. During voltage transi-  
tions, input may overshoot VCC to VCC+2.0V for peri-  
ods of up to 20ns.  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
2
MX23L8100  
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)  
Item  
Symbol  
VOH  
VOL  
MIN.  
MAX.  
-
Conditions  
IOH = -0.4mA  
IOL = 1.6mA  
Output High Voltage  
Output Low Voltage  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage Current  
Operating Current  
Standby Current (TTL)  
Standby Current (CMOS)  
Input Capacitance  
Output Capacitance  
24V  
-
0.4V  
VCC+0.3V  
0.8V  
5uA  
VIH  
2.2V  
VIL  
-0.3V  
ILI  
-
-
-
-
-
-
-
0V, VCC  
ILO  
5uA  
0V, VCC  
ICC1  
ISTB1  
ISTB2  
CIN  
20mA  
1mA  
5uA  
f=10MHz, all output open  
CE=VIH  
CE> VCC - 0.2V  
Ta = 25°C, f = 1MHZ  
Ta = 25°C, f = 1MHZ  
10pF  
10pF  
COUT  
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.3V±10%)  
Item  
Symbol  
23L8100-10  
MIN. MAX.  
100ns  
23L8100-12  
23L8100-15  
MIN.  
MAX.  
-
MIN.  
MAX.  
Read Cycle Time  
tRC  
tAA  
-
120ns  
150ns  
-
Address Access Time  
Chip Enable Access Time  
Output Enable Time  
Output Hold After Address  
Output High Z Delay  
-
100ns  
100ns  
50ns  
-
-
120ns  
120ns  
60ns  
-
-
150ns  
150ns  
70ns  
-
tACE  
tOE  
tOH  
tHZ  
-
-
-
-
-
-
0ns  
-
0ns  
-
0ns  
-
20ns  
20ns  
20ns  
Note:Output high-impedance delay (tHZ) is measured  
from OE or CE going high, and this parameter guaran-  
teed by design over the full voltage and temperature op-  
erating range - not tested.  
AC Test Conditions  
IOH (load)=-0.4mA  
Input Pulse Levels  
Input Rise and Fall Times  
Input Timing Level  
Output Timing Level  
Output Load  
0.4V~2.4V  
10ns  
DOUT  
1.4V  
1.4V  
IOL (load)=1.6mA  
C<100pF  
See Figure  
Note:No output loading is present in tester load board.  
Active loading is used and under software programming control.  
Output loading capacitance includes load board's and all stray capacitance.  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
3
MX23L8100  
TIMING DIAGRAM  
RANDOM READ  
ADD  
ADD  
ADD  
ADD  
tRC  
tACE  
CE  
OE  
tOE  
tHZ  
tOH  
tAA  
VALID  
VALID  
VALID  
DATA  
Note:CE, OE are enable  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
4
MX23L8100  
PACKAGE INFORMATION  
42-PIN PLASTIC DIP(600 mil)  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
5
MX23L8100  
44-PIN PLASTIC SOP  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
6
MX23L8100  
48-PIN PLASTICTSOP  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
7
MX23L8100  
REVISION HISTORY  
Revision Description  
Page  
Date  
1.4  
1.5  
1.6  
Add new 44pin TSOP (type 2)  
AC CHARACTERISTICS tOH 10ns-->0ns  
CorrectTyping error  
Jul/17/1998  
FEB/01/1999  
JUL/16/2001  
P3  
P1  
Modify Package Information  
Added MX23L8100TI-10 in Order Information  
P5~7  
P1  
1.7  
AUG/20/2001  
P/N:PM0464  
REV. 1.7, AUG. 20, 2001  
8
MX23L8100  
MACRONIX INTERNATIONAL CO., LTD.  
HEADQUARTERS:  
TEL:+886-3-578-6688  
FAX:+886-3-563-2888  
EUROPE OFFICE:  
TEL:+32-2-456-8020  
FAX:+32-2-456-8021  
JAPAN OFFICE:  
TEL:+81-44-246-9100  
FAX:+81-44-246-9105  
SINGAPORE OFFICE:  
TEL:+65-348-8385  
FAX:+65-348-8096  
TAIPEI OFFICE:  
TEL:+886-2-2509-3300  
FAX:+886-2-2509-2200  
MACRONIX AMERICA, INC.  
TEL:+1-408-453-8088  
FAX:+1-408-453-8488  
CHICAGO OFFICE:  
TEL:+1-847-963-1900  
FAX:+1-847-963-1909  
http : //www.macronix.com  
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.  
9

相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9136_11

Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY