MX25L1602 [Macronix]
16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM; 16M - BIT [ 16M ×1 ] CMOS串行EEPROM FLASH
| 型号： | MX25L1602 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 16M-BIT [16M x 1] CMOS SERIAL FLASH EEPROM |
| 文件： | 总24页 (文件大小：406K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX25L1602
16M-BIT[16Mx1]CMOSSERIALFLASHEEPROM
FEATURES
GENERAL
SOFTWAREFEATURES
• 16,777,216 x 1 bit structure
• Input Data Format
• 256 Equal Sectors with 8K-byte each
- Any sector can be erased
- 1-byte Command code, 3-byte address, 1-byte byte
address
• 4096 Equal Segments with 512-byte each
- Provides sequential output within any segment
• Single Power Supply Operation
• 512-byte Sequential Read Operation
• Built in 9-bit (A0 to A8) pre-settable address counter
to support the 512-byte sequential read operation
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected
sector
- 3.0 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is equal to or less than 2.5V
- Automatically programs and verifies data at selected
page by an internal algroithm that automatically times
the program pulse widths (Any page to be programed
should have page in the erased state first)
• Status Register Feature
PERFORMANCE
• High Performance
- Fast access time: 20MHz serial clock (50pF + 1TTL
Load)
- Fast program time: 5ms/page (typical, 128-byte per
page)
- Provides detection of program and erase operation
completion.
- Fast erase time: 300ms/sector (typical, 8K-byte per
sector)
- Provides auto erase/ program error report
• Low Power Consumption
HARDWAREFEATURES
• SCLK Input
- Low active read current: 10mA (typical) at 17MHz
- Low active programming current: 10mA (typical)
- Low active erase current: 10mA (typical)
- Low standby current: 30uA (typical, CMOS)
• Minimum 100,000 erase/program cycle
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• PACKAGE
- 28-pin SOP (330mil)
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MX25L1602
GENERAL DESCRIPTION
specified page locations will be executed. Program
command is executed on a page (128 bytes) basis, and
erase command is executed on both chip and sector (8K
bytes) basis.
The MX25L1602 is a CMOS 16,777,216 bit serial Flash
EEPROM,whichisconfiguredas2,097,152x8internally.
TheMX25L1602featuresaserialperipheralinterfaceand
software protocol allowing operation on a simple 3- wire
bus. The three bus signals are a clock input (SCLK), a
serial data input (SI), and a serial data output (SO). SPI
access to the device is enabled by CS input.
To provide user with ease of interface, a status register is
includedtoindicatethestatusofthechip. Thestatusread
command can be issued to detect completion and error
flag status of a program or erase operation.
The MX25L1602 provide sequential read operation on
whole chip. The sequential read operation is executed on
a segment (512 byte) basis. User may start to read from
any byte of the segment. While the end of the segment is
reached,thedevicewillwraparoundtothebeginningofthe
segmentandcontinuouslyoutputsdatauntilCSgoeshigh.
WhenthedeviceisnotinoperationandCSishigh, itisput
in standby mode and draws less than 30uA DC current.
The MX25L1602 utilizes MXIC's proprietary memory cell
whichreliablystoresmemorycontentsevenafter100,000
program and erase cycles.
After program/erase command is issued, auto program/
erase algorithms which program/erase and verify the
PIN CONFIGURATIONS
28-PIN SOP (330 mil)
PIN DESCRIPTION
SYMBOL
CS
DESCRIPTION
Chip Select
1
NC
NC
TEST
DU
28
27
26
25
24
23
22
21
20
19
18
17
16
15
TEST(1)
SI
Test Mode Select
Serial Data Input
Serial Data Output
Clock Input
2
GND
VCC
NC
3
4
NC
SO
5
NC
NC
SCLK
VCC
GND
DU(2)
NC
6
NC
NC
7
SI
NC
+ 3.3V Power Supply
Ground
8
SO
NC
9
CS
NC
10
11
12
13
14
SCLK
NC
NC
Do Not Use(for Test Mode only)
NoInternalConnection
NC
NC
NC
NC
NC
NC
NC
Note:
1.TESTinputisusedforin-housetestingandmustbetied
togroundduringnormaluseroperation.
2.DU pin is used for in-house testing and can be tied to
VCC, GND or open for normal operation.
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MX25L1602
BLOCK DIAGRAM
Address
Generator
Memory Array
(4096 x 4096)
Page Buffer
Y-Decoder
Data
Register
SI
Output
Buffer
Sense
Amplifier
Mode
Logic
State
Machine
CS
HV
Generator
SO
Clock Generator
SCLK
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MX25L1602
COMMAND DEFINITION
Com-
mand
(byte)
1st
Read
Array
Status
Read
Clear
Read
ID
Sector
Erase
Chip
Page
Status
Erase
Program
52H
AD1
AD2
AD3
BA
83H
X
89H
85H
X
F1H
AD1
AD2
F4H
X
F2H
AD1
AD2
AD3
BA
2nd
3rd
X
4th
5th
6th
X
7th
X
8th
X
9th
X
Action
n bytes
readout
until
CS goes
high
Output
status
byte
Clear
status
byte
Output
vendor
code
Start to
erase at
CS
Start to
erase at
CS rising
edge
Load
n bytes
data to
buffer
until
until
rising
edge
CS goes
high
CS goes
high
until
CS goes
high &
start to
program
Note:
1.X is dummy cycle and is necessary
2.AD1 to AD3 are address input data
3.BA is byte address
1-byte command code
Bit7(MSB) Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
3-byteaddress(0to0FFFH)
AD1:
AD2:
AD3:
X
X
X
X
A20
A12
X
A19
A11
X
A18
A10
A8
A17
A9
A16
X
A15
X
A14
X
A13
X
A7
1-byte byte address(0 to 7FH)
BA:
X
A6
A5
A4
A3
A2
A1
A0
Note:
A20 to A13=Sector address
A20 to A9=Segment address
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MX25L1602
DEVICE OPERATION
1.Before a command is issued, status register should be checked to ensure device is ready for the intended operation.
2.When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until
next CS falling edge. In standby mode, SO pin of this LSI should be High-Z.
3.WhencorrectcommandisinputtedtothisLSI,thisLSIbecomesactivemodeandkeepstheactivemodeuntilnextCSB
risingedge.
COMMAND DESCRIPTION
(1) Read Array
Thiscommandissentwiththe4-byteaddress(commandincluded), andthebyteaddress, followedbyfourdummybytes
sent to give the device time to stabilize. The device will then send out data starting at the byte address until CS goes
high. The clock to clock out the data is supplied by the master SPI. The read operation is executed on a segment (512
bytes) basis. If the end of the segment is reached then the device will wrap around to the beginning of the segment.
(2) Read Status Register
When this command is sent, the device will continuously send out the status register contents starting at bit7. The clock
to clock out the data is supplied by the master SPI.
bit7
bit6
NA
bit5
NA
bit4
erase
error
bit3
program
error
bit2
NA
bit1
NA
bit0
ready/busy
program/erase
completion
Note1
1=error
1=error
1=ready
0=busy
Bit 6,5,2,1 = Reserve for future use.
Bit 4 = "1" -----> There is an error occurred in last erase operation.
= "0" -----> There is no error occurred in last erase operation.
Bit 3 = "1" -----> There is an error occurred in last program operation.
= "0" -----> There is no error occurred in last program operation.
Bit 0 ="1" -----> Device is in ready mode.
="0"-----> Device is in busy mode.
Note 1:The initial value of Bit7 is "1". Bit7 will have "1" to "0" transit only after program/erase operation is completed. Bit7
will shift from "0" to "1" only after issued program/erase/Clear status register command.
(3)ClearStatusRegister
Thiscommandonlyresetseraseerrorbit(bit4)andprogramerrorbit(bit3). Thesetwobitsaresetbyon-chipstatemachine
during program/erase operation, and can only be reset by issuing a clear status register command or by powering down
VCC .
Ifstatusregisterindicatesthaterroroccurredinthelastprogram/eraseoperation,anyfurtherprogram/eraseoperationwill
be prohibited until status register is cleared.
(4) Read ID
Thiscommandissentwithanextradummybyte(a2-bytecommand). Thedevicewillclockoutmanufacturercode(C2H)
and device code (01H) when this command is issued. The clock to clock out the data is supplied by the master SPI.
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MX25L1602
(5)Sector/ChipErase
This command is sent with the sector address(A20~A13) when operating Sector Erase. The device will start the erase
sequenceafterCSgoeshighwithoutanyfurtherinput. Asectorshouldbeerasedinatypicalof300ms.Theaveragecurrent
is less than 10mA. The chip erase operation does not require the sector address input but two extra dummy bytes are
necessary. During this operation, customer can also access Read Status & Read ID operations.
(6) Page Program
Thiscommandissentwiththepagenumber(A20~A7),andbyteaddress(A6~A0),followedbyprogrammingdata.Oneto
128 bytes of data can be loaded into the buffer of the device until CS goes high. If the end of the page is reached, then
thedevicewillwraparoundtothebeginningofthepage.Thedevicewillprogramthespecifiedpagewithbuffereddata(Until
CS goes high) without any further input. The typical page program time is 5ms. The average current is less than 10mA.
During this operation, customer can also access Read Status & Read ID operations.
(7)StandbyMode
When CS is high and there is no operation in progress, the device is put in standby mode. Typical standby current is less
than 30uA.
POWER-ON STATE
After power-up, the device is placed in the standby state with following status:
The status register is reset with following status :
Bit 7 = "1" -----> Refer to page 5 for detail.
Bit 6,5,2,1 = Reserve for future use.
Bit 4 = "0" -----> Erase error flag is reset.
Bit 3 = "0" -----> Program error flag is reset.
Bit 0="1" -----> Device is in ready state.
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MX25L1602
DATA SEQUENCE
Output data is serially sent out through SO pin, synchronized with the rising edge of SCLK, whereas input data is serially
read in through SI pin, synchronized with the rising edge of SCLK. The bit sequence for both input and output data is bit
7 (MSB) first, then bit 6, bit 5, ...., and bit 0.(LSB)
ADDRESS SEQUENCE
The address assignment is described as follows :
BA: Byte address Bit sequence:
AD1:First Address Bit sequence:
X
X
A6 A5
A4
X
A3
A2
A1
A0
X
X
A20 A19 A18 A17
AD2:Second Address Bit sequence: A16 A15 A14 A13 A12 A11 A10 A9
AD3:Thrid Address Bit sequence:
X
X
X
X
X
X
A8
A7
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MX25L1602
Auto Chip Erase Flow Chart
Auto Page Program Flow Chart
START
F2H
START
F4H
Set Chip Erase
Command.
AD1
Dummy
Dummy
Set Page Program
Command.
AD2
AD3
83H
Set Read Status
Register Command.
BA
Dummy
Data are written
Read Status Register
(Until CS goes high)
NO
83H
Set Read Status
Bit 7= 0?
YES
Register Command.
Dummy
Read Status Register
NO
Bit 4 = 0?
YES
NO
Bit7 = 0?
Erase Error
Chip Erase Completed
NO
YES
To Continue Other
Operation, Do Clear
Status Register
Operation Done,
Device stays at Read
Status Register Mode
until CS goes high.
NO
Bit3 = 0?
Command First
YES
Pgae Program Completed
Program Error
To Continue Other
Operation, Do Clear
Status Register
Program
Another
Page
YES
Command First.
NO
Operation Done,
Device stays at Read
Status Register Mode
until CS goes high.
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MX25L1602
Auto Sector Erase Flow Chart
START
F1H
Set Sector Eraes
Command.
AD1
AD2
83H
Set Read Status
Register Command.
Dummy
Read Status Register
NO
Bit7 = 0?
YES
NO
Bit4 = 0?
YES
Sector Erase Completed
Erase Error
To Continue Other
Operation, Do Clear
Status Register
Erase
YES
Another Sector ?
Command First.
NO
Operation Done,
Device stays at Read
Status Register Mode
until CS goes high.
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MX25L1602
NOTICE:
ELECTRICAL SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
1.Stresses greater than those listed under ABSOLUTE
MAXIMUM RATINGS may cause permanent damage to the
device. This is stress rating only and functional operational
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended period may
affect reliability.
RATING
VALUE
AmbientOperatingTemperature 0°C to 70°C
StorageTemperature
Applied Input Voltage
AppliedOutputVoltage
VCC to Ground Potential
-55°Cto125°C
-0.5V to 4.6V
-0.5V to 4.6V
-0.5V to 4.6V
2.Specifications contained within the following tables are
subject to change.
3.During voltage transitions, all pins may overshoot to 4.6V or
-0.5V for period up to 20ns.
4.All input and output pins may overshoot to VCC+0.5V while
VCC+0.5V is smaller than or equal to 4.6V.
Maximum Positive Overshoot Waveform
Maximum Negative Overshoot Waveform
20ns
4.6V
0V
3.6V
-0.5V
20ns
CAPACITANCE TA = 25°C, f = 1.0 MHz
SYMBOL
CIN
PARAMETER
MIN.
TYP
MAX.
10
UNIT
pF
CONDITIONS
VIN = 0V
Input Capacitance
Output Capacitance
COUT
10
pF
VOUT = 0V
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MX25L1602
INPUT TEST WAVEFORMS AND MEASURESMENT LEVEL
3.0V
AC
1.5V
Measurement
Level
0V
Note:Input pulse rise and fall time are < 10ns
OUTPUT LOADING
DEVICE UNDER
TEST
+3.3V
CL
DIODES=IN3064
OR EQUIVALENT
CL=50pF Including jig capacitance
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MX25L1602
DC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
SYMBOL PARAMETER
NOTES MIN.
TYP
MAX.
UNITS TESTCONDITIONS
IIL
InputLoad
1
±10
uA
uA
uA
mA
VCC = VCC Max
VIN = VCC or GND
VCC = VCC Max
VIN = VCC or GND
VCC = VCC Max
CS = VCC ± 0.2V
VCC = VCC Max
CS = VIH
Current
ILO
OutputLeakage
Current
1
1
±10
60
3
ISB1
ISB2
VCCStandby
Current(CMOS)
VCCStandby
Current(TTL)
30
1
ICC1
ICC2
VCCRead
1
1
10
10
30
30
mA
mA
f=20MHz
VCCProgram
Current
PrograminProgress
ICC3
VIL
VCCEraseCurrent
Input Low Voltage
Input High Voltage
OutputLowVoltage
OutputHighVoltage
1
10
30
mA
V
Erase in Progress
-0.5
2.0
0.8
VIH
VCC+0.5
0.4
V
VOL
VOH
V
IOL = 500uA
IOH = -100uA
2.4
V
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at VCC = 3.3V, T = 25°C. These currents are valid
for all product versions (package and speeds).
2. Typical value is calculated by simulation.
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MX25L1602
AC CHARACTERISTICS (Temperature = 0°C to 70°C, VCC = 3.0V ~ 3.6V)
SYMBOL
fSCLK
tCYC
tSKH
tSKL
tR
PARAMETER
Min.
Typ.
Max.
Units
MHz
ns
Conditions
ClockFrequency
Clock Cycle Time
Clock High Time
Clock Low Time
Clock Rise Time
Clock Fall Time
CS Lead Clock Time
CS Lag Clock Time
CS High Time
20
50
25
25
ns
ns
6
6
ns
tF
ns
tCSA
tCSB
tCSH
tDS
50
50
100
5
ns
ns
ns
SI Setup Time
ns
tDH
SI Hold Time
25
ns
tAA
Access Time
30
ns
tDOH
tDOZ
tECY
tPCY
SO Hold Time
5
0
ns
SO Floating Time
Erase Cycle Time
Program Cycle Time
20
ns
300
5
1600
15
ms
ms
NOTES:
1. Typical value is calculated by simulation.
SERIAL DATA INPUT/OUTPUT TIMING
tCSB
tCSH
tCSA
CS
tR
tF
tCYC
SCLK
tSKH
tSKL
SI
BIT 6
BIT 0
BIT 7
tDH
tDS
BIT 7
BIT 0
SO
tDOH
tAA
tDOZ
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MX25L1602
STANDBY TIMING WAVEFORM
CS
SCLK
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SI
Hi-Z
1st byte
SO
When incorrect command is inputted to this LSI, this LSI becomes standby mode and keeps the standby mode until next
CS falling edge. In standby mode, SO pin of this LSI should be High-Z. While CS=VIH, current=standby current, while
CS=VIL and commands are issuing, or commands are invalid, current=5mA(typ.) to 15mA(max.).
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MX25L1602
READ ARRAY TIMING WAVEFORM
C S
SC LK
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
SI
Hi-Z
SO
1st byte (52h)
2nd byte (AD1)
C S
SC LK
SI
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
SO
9th byte (Dumm y)
1st data output byte
2nd data output byte
C S
SC LK
SI
Hi-Z
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
SO
(N-1)th data output byte
Nth data output byte
NOTES:
1. 1st Byte='52h'
2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2, A20=BIT3.
3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7
4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1
5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6
6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care)
7. From Byte 10, SO Would Output Array Data
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MX25L1602
READ STATUS REGISTER TIMING WAVEFORM
CS
SCLK
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
SI
Hi-Z
SO
1st byte (83h)
2nd byte (Dumm y)
CS
SCLK
SI
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
SO
2nd byte (Dumm y)
1st status output byte
2nd status output byte
CS
SCLK
SI
Hi-Z
B it 3
B it 2
B it 1
B it 0
B it 7
B it 6
B it 5
B it 4
B it 3
B it 2
B it 1
B it 0
SO
status output byte
Nth status output byte
(N-1)th
NOTES:
1. BIT 7=0 ==> Program/Erase completed
2. BIT 4=1 ==>Erase Error
3. BIT 3=1 ==>Program Error
4. BIT 1,2,5,6 ==> Reserve for future use
5. Bit 0=1 ==> Device is in ready state
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MX25L1602
CLEAR STATUS REGISTER TIMING WAVEFORM
CS
SCLK
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SI
Hi-Z
1st byte (89h)
SO
NOTES:
1. 1st Byte='89h' ==> CLEAR STATUS REGISTER
2. SO at Hi-Z state
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MX25L1602
READ ID TIMING WAVEFORM
CS
SCLK
Bit7
Bit6
Bit0
Bit7
Bit6
Bit0
SI
Hi-Z
1st byte (85h)
Bit7
Bit6
Bit0
Bit7
Bit6
SO
2nd byte (Dummy)
1st ID byte (C2h)
2nd ID byte (01H)
CS
SCLK
SI
Hi-Z
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SO
(N-1) ID byte
N ID byte
NOTES:
1. 1st Byte:85h.
2. 2nd Byte:Dummy Byte.
3.3rdByte:OutputManufactureCode(C2h).
4. 4th Byte:Output Device Code(01H).
5. The 2 bytes ID output will be wrap around.
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MX25L1602
AUTO PAGE PROGRAM TIMING WAVEFORM
CS
SCLK
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
SI
Hi-Z
1st byte (F2h)
SO
2nd byte (AD1)
CS
SCLK
SI
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
SO
5th byte (BA)
1st write data byte
2nd write data byte
CS
SCLK
SI
Bit3
Bit2
Bit1
Bit0
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Hi-Z
SO
(N-1)th write data byte
Nth write data byte
NOTES:
1. 1st Byte:F2h.
2. 2nd Byte:Address AD1.
3. 3rd Byte:Address AD2
4. 4th Byte:Address AD3
5. 5th Byte:Address BA.
6. 6th byte:1st write data byte.
7. When the last byte of the page will be written, the Byte Address will be wrap around to the first byte of the Page.
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MX25L1602
AUTO SECTOR/CHIP ERASE TIMING WAVEFORM
CS
SCLK
Bit7
Bit6
Bit5
Bit0
Bit7
Bit6
Bit5
Bit0
Bit7
Bit6
Bit0
SI
Hi-Z
Hi-Z
SO
1st byte
2nd byte
3rd byte
- F1h for Sector Erase
- F4h for Chip Erase
- AD1 for Sector
- Dummy for Chip
- AD2 for Sector
- Dummy for Chip
NOTES:
1. 1st byte:F1h for Sector Erase, F4h for Chip Erase.
2. 2nd byte:Address AD1 for Sector Erase, Dummy byte for Chip erase.
3. 3rd byte:Address AD2 for Sector Erase, Dummy byte for Chip erase.
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MX25L1602
ERASE AND PROGRAMMING PERFORMANCE
PARAMETER
TYP.(1)
Max.(2)
1,600
15
UNIT
ms
ms
s
Comments
Sector/Chip Erase Time
PageProgrammingTime
ChipProgrammingTime
300
5
Excludes system level
overhead(3)
48
240
Note:
1.Typical program and erase time assumes the following conditions: 25°C,3.3V, and checker board pattern.
2.Under worst conditions of 0°C and 3.0V.
3.System-level overhead is the time required to execute the first-bus-cycle sequence for the programming command.
4.The maximum chip programming time is evaluated under the worst conditions of 0°C, VCC=3.0V, and 100K cycle
with 90% confidence level.
ORDERING INFORMATION
PARTNO.
ACCESS TIME
OPERATING
CURRENT
10mA
STANDBY
CURRENT
30uA
PACKAGE
MX25L1602MC-50
20MHz
28 pin SOP
(330mil)
P/N:PM0819
REV. 1.0, MAR. 04, 2003
21
MX25L1602
PACKAGE IMFORMATION
P/N:PM0819
REV. 1.0, MAR. 04, 2003
22
MX25L1602
REVISION HISTORY
RevisionNo. Description
Page
Date
1.0
1. Remove "Advanced Information" title
P1
MAR/04/2003
P/N:PM0819
REV. 1.0, MAR. 04, 2003
23
MX25L1602
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24
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