MX27C4100PI-10 [Macronix]
4M-BIT [512K x 8/256K x 16] CMOS EPROM; 4M- BIT [ 512K ×8 / 256K ×16 ]的CMOS EPROM型号: | MX27C4100PI-10 |
厂家: | MACRONIX INTERNATIONAL |
描述: | 4M-BIT [512K x 8/256K x 16] CMOS EPROM |
文件: | 总18页 (文件大小:769K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MX27C4100/27C4096
4M-BIT [512K x 8/256K x 16] CMOS EPROM
FEATURES
• 256K x 16 organization(MX27C4096, JEDEC pin
out)
• 512K x 8 or 256K x 16 organization(MX27C4100,
ROM pin out compatible)
• +12.5V programming voltage
• Fast access time: 100/120/150 ns
• Totally static operation
• Completely TTL compatible
• Operating current: 60mA
• Standby current: 100uA
• Package type:
- 40 pin plastic DIP
- 44 pin PLCC
- 40 pin SOP
GENERAL DESCRIPTION
The MX27C4100/4096 is a 5V only, 4M-bit, One Time
Programmable Read Only Memory. It is organized as
256K words by 16 bits per word(MX27C4096), 512K x 8
or 256K x 16(MX27C4100), operates from a single + 5
volt supply,hasastaticstandby mode,andfeaturesfast
single address location programming. All programming
signals are TTL levels, requiring a single pulse. For
programmingoutsidefromthesystem,existingEPROM
programmers may be used. The MX27C4100/4096
supports a intelligent fast programming algorithm which
canresultinprogrammingtimeoflessthantwominutes.
This EPROM is packaged in industry standard 40 pin
dual-in-line packages, 40 lead SOP, and 44 lead PLCC
packages.
PIN CONFIGURATIONS
SOP/PDIP(MX27C4100)
BLOCK DIAGRAM (MX27C4100)
CE
Q0~Q14
CONTROL
LOGIC
OUTPUT
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
GND
OE
Q0
Q8
Q1
Q9
Q2
Q10
Q3
Q11
1
2
3
4
5
6
7
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
OE
Q15/A-1
BUFFERS
BYTE/VPP
A10
A11
A12
A13
A14
A15
A16
BYTE/VPP
GND
Q15/A-1
Q7
Q14
Q6
Q13
Q5
Q12
Q4
VCC
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
Y-SELECT
9
A0~A17
10
11
12
13
14
15
16
17
18
19
20
4M BIT
CELL
ADDRESS
INPUTS
MAXTRIX
VCC
GND
P/N: PM0197
REV. 3.4, AUG. 22, 2001
1
MX27C4100/27C4096
PIN CONFIGURATIONS
PDIP(MX27C4096)
PIN CONFIGURATIONS
PLCC(MX27C4096)
VPP
CE
1
2
3
4
5
6
7
8
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
6
1
44
40
39
Q15
Q14
Q13
Q12
Q11
Q10
Q9
Q8
GND
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0
OE
A13
A12
A11
A10
A9
Q12
Q11
Q10
Q9
7
Q8
9
MX27C4096
GND
NC
A8
GND
NC
12
34
10
11
12
13
14
15
16
17
18
19
20
Q7
A7
Q6
A6
Q5
A5
Q4
17
29
28
A4
A3
A2
A1
18
23
A0
BLOCK DIAGRAM (MX27C4096)
CE
CONTROL
LOGIC
OUTPUT
Q0~Q15
BUFFERS
OE
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
Y-SELECT
A0~A17
ADDRESS
INPUTS
4M BIT
CELL
MAXTRIX
VCC
VPP
GND
P/N: PM0197
REV. 3.4, AUG. 22, 2001
2
MX27C4100/27C4096
PIN DESCRIPTION(MX27C4096)
PIN DESCRIPTION(MX27C4100)
SYMBOL
A0~A17
Q0~Q14
CE
PIN NAME
SYMBOL
A0~A17
Q0~Q15
CE
PIN NAME
Address Input
Address Input
Data Input/Output
Data Input/Output
Chip Enable Input
Output Enable Input
Program Supply Voltage
Power Supply Pin (+5V)
Ground Pin
Chip Enable Input
OE
Output Enable Input
OE
BYTE/VPP
Q15/A-1
VCC
Word/Byte Selection/Program Supply Voltage
Q15(Word mode)/LSB addr. (Byte mode)
Power Supply Pin (+5V)
Ground Pin
VPP
VCC
GND
GND
TRUTH TABLE OF BYTE FUNCTION(MX27C4100)
BYTE MODE(BYTE = GND)
CE
H
OE
X
Q15/A-1
MODE
Q0-Q7
High Z
High Z
DOUT
SUPPLY CURRENT
Standby(ICC2)
X
Non selected
Non selected
Selected
L
H
X
Operating(ICC1)
Operating(ICC1)
L
L
A-1 input
WORD MODE(BYTE = VCC)
CE
OE
X
Q15/A-1
High Z
High Z
DOUT
MODE
Q0-Q14
High Z
High Z
DOUT
SUPPLY CURRENT
Standby(ICC2)
H
Non selected
Non selected
Selected
L
H
Operating(ICC1)
Operating(ICC1)
L
L
NOTE : X = H or L
P/N: PM0197
REV. 3.4, AUG. 22, 2001
3
MX27C4100/27C4096
TheverificationshouldbeperformedwithOEandCE at
VIL(for MX27C4096), OE at VIL and CE at VIH(for
MX27C4100) and VPP at its programming voltage.
FUNCTIONAL DESCRIPTION
THE PROGRAMMING OF THE MX27C4100/4096
AUTO IDENTIFY MODE
When the MX27C4100/4096 is delivered, or it is
erased, the chip has all 4M bits in the "ONE" or HIGH
state. "ZEROs" are loaded into the MX27C4100/4096
through the procedure of programming.
Theautoidentifymodeallowsthereadingoutofabinary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programming equipment for the purpose of
automatically matching the device to be programmed
with its corresponding programming algorithm. This
mode is functional in the 25°C± 5°C ambient
temperature range that is required when programming
the MX27C4100/4096.
Forprogramming,thedatatobeprogrammedisapplied
with 16 bits in parallel to the data pins.
VCC must be applied simultaneously or before VPP,
and removed simultaneously or after VPP. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across VPP and ground to suppress spurious
voltage transients which may damage the device.
To activate this mode, the programming equipment
must force 12.0 ±0.5VonaddresslineA9ofthedevice.
Two identifier bytes may then be sequenced from the
device outputs by toggling address line A0 from VIL to
VIH. All other address lines must be held at VIL during
auto identify mode.
FAST PROGRAMMING
Thedeviceissetupinthefastprogrammingmodewhen
the programming voltage VPP = 12.75V is applied, with
VCC = 6.25 V and OE = VIH (Algorithm is shown in
Figure 1). The programming is achieved by applying a
single TTL low level 100us pulse to the CE input after
addresses and data line are stable. If the data is not
verified, an additional pulse is applied for a maximum of
25 pulses. This process is repeated while sequencing
through each address of the device. When the
programmingmodeiscompleted,thedatainalladdress
is verified at VCC = VPP = 5V ±10%.
Byte 0 ( A0 = VIL) represents the manufacturer code,
andbyte1(A0=VIH), thedeviceidentifiercode. Forthe
MX27C4100/4096, these two identifier bytes are given
intheModeSelectTable. Allidentifiersformanufacturer
and device codes will possess odd parity, with the MSB
(Q15) defined as the parity bit.
READ MODE
TheMX27C4100/4096hastwocontrolfunctions,bothof
which must be logically satisfied in order to obtain data
at the outputs. Chip Enable (CE) is the power control
andshouldbeusedfordeviceselection. OutputEnable
(OE) is the output control and should be used to gate
datatotheoutputpins, independentofdeviceselection.
Assuming that addresses are stable, address access
time(tACC)isequaltothedelayfromCEtooutput(tCE).
DataisavailableattheoutputstOEafterthefallingedge
of OE's, assuming that CE has been LOW and
addresses have been stable for at least tACC - t OE.
PROGRAM INHIBIT MODE
ProgrammingofmultipleMX27C4100/4096'sinparallel
with different data is also easily accomplished by using
theProgramInhibitMode. ExceptforCEandOE,alllike
inputs of the parallel MX27C4100/4096 may be
common. A TTL low-level program pulse applied to an
MX27C4100/4096 CE input with VPP = 12.5 ±0.5 V will
program the MX27C4100/4096. A high-level CE input
inhibits the other MX27C4100/4096s from being
programmed.
WORD-WIDE MODE
PROGRAM VERIFY MODE
With BYTE/VPP at VCC ±0.2V outputs Q0-7 present
data Q0-7 and outputs Q8-15 present data Q8-15, after
CE and OE are appropriately enabled.
Verification should be performed on the programmed
bits to determine that they were correctly programmed.
P/N: PM0197
REV. 3.4, AUG. 22, 2001
4
MX27C4100/27C4096
BYTE-WIDE MODE
used between VCC and GND for each eight devices.
The location of the capacitor should be close to where
With BYTE/VPP at GND ±0.2V, outputs Q8-15 are tri-
stated. IfQ15/A-1=VIH, outputsQ0-7presentdatabits
Q8-15. If Q15/A-1 = VIL, outputs Q0-7 present data bits
Q0-7.
the power supply is connected to the array.
STANDBY MODE
The MX27C4100/4096 has a CMOS standby mode
which reduces the maximum VCC current to 100 uA. It
is placed in CMOS standby when CE is at VCC ±0.3 V.
The MX27C4100/4096 also has a TTL-standby mode
which reduces the maximum VCC current to 1.5 mA. It
is placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
TWO-LINE OUTPUT CONTROL FUNCTION
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connectedtotheREADlinefromthesystemcontrolbus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
SYSTEM CONSIDERATIONS
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
outputcapacitanceloadingofthedevice. Ataminimum,
a0.1uFceramiccapacitor(highfrequency,lowinherent
inductance) should be used on each device between
Vcc and GND to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
P/N: PM0197
REV. 3.4, AUG. 22, 2001
5
MX27C4100/27C4096
MODE SELECT TABLE (MX27C4096)
PINS
MODE
CE
OE
VIL
VIH
X
A0
X
A9
X
VPP
VCC
VCC
VCC
VCC
VPP
VPP
VPP
VCC
VCC
OUTPUTS
DOUT
High Z
High Z
High Z
DIN
Read
VIL
Output Disable
Standby (TTL)
Standby (CMOS)
Program
VIL
X
X
VIH
X
X
VCC±0.3V
VIL
X
X
X
VIH
VIL
VIH
VIL
VIL
X
X
Program Verify
Program Inhibit
Manufacturer Code(3)
Device Code(3)
VIH
X
X
DOUT
High Z
00C2H
0151H
VIH
X
X
VIL
VIL
VIH
VH
VH
VIL
3. A1 - A8 = A10 - A17 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
NOTES: 1. VH = 12.0 V ±0.5 V
2. X = Either VIH or VIL
MODE SELECT TABLE (MX27C4100)
BYTE/
MODE
CE
OE
VIL
VIL
VIL
A9
X
A0
X
Q15/A-1
Q15 Out
VIH
VPP(5)
VCC
GND
GND
X
Q8-14
Q0-7
Read (Word)
VIL
VIL
VIL
VIL
VIH
VIL
VIH
VIH
VIL
VIL
Q8-14 Out
High Z
High Z
High Z
High Z
Q8-14 In
Q8-14 Out
High Z
00H
Q0-7 Out
Q8-15 Out
Q0-7 Out
High Z
High Z
Q0-7 In
Q0-7 Out
High Z
C2H
Read (Upper Byte)
Read (Lower Byte)
Output Disable
Standby
X
X
X
X
VIL
VIH
X
X
X
High Z
High Z
Q15 In
Q15 Out
High Z
0B
X
X
X
Program
VIH
VIL
VIH
VIL
VIL
X
X
VPP
VPP
VPP
VCC
VCC
Program Verify
Program Inhibit
Manufacturer Code(3)
Device Code(3)
X
X
X
X
VH
VH
VIL
VIH
1B
38H
00H
NOTES: 1. VH = 12.0V ±0.5V
4. See DC Programming Characteristics for VPP voltages.
5. BYTE/VPP is intended for operation under DC Voltage conditions
only.
2. X = Either VIH or VIL
3. A1 - A8, A10 - A17 = VIL(for auto select)
6. Manufacture code = 00C2H
Device code = B800H
P/N: PM0197
REV. 3.4, AUG. 22, 2001
6
MX27C4100/27C4096
FIGURE 1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V
VPP = 12.75V
X = 0
PROGRAM ONE 100us PULSE
INCREMENT X
INTERACTIVE
SECTION
YES
X = 25?
NO
FAIL
VERIFY BYTE
?
PASS
NO
LAST ADDRESS
INCREMENT ADDRESS
FAIL
YES
VCC = VPP = 5.25V
VERIFY SECTION
FAIL
DEVICE FAILED
VERIFY ALL BYTES
?
PASS
DEVICE PASSED
P/N: PM0197
REV. 3.4, AUG. 22, 2001
7
MX27C4100/27C4096
SWITCHING TEST CIRCUITS
1.8K ohm
+5V
DEVICE
UNDER
TEST
DIODES = IN3064
CL
OR EQUIVALENT
6.2K ohm
CL = 100 pF including jig capacitance(30pF for 100 ns parts)
SWITCHING TEST WAVEFORMS
2.0V
0.8V
2.0V
TEST POINTS
AC driving levels
0.8V
OUTPUT
INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade , 3.0V/0V for industrial grade.
Input pulse rise and fall times are <10ns.
1.5V
1.5V
TEST POINTS
AC driving levels
OUTPUT
INPUT
AC TESTING: (1)AC driving levels are 3.0V/0V for both commercial grade and industrial grade.
Input pulse rise and fall times are < 10ns.
(2)For MX27C4100/4096-10
P/N: PM0197
REV. 3.4, AUG. 22, 2001
8
MX27C4100/27C4096
ABSOLUTE MAXIMUM RATINGS
NOTICE:
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
RATING
VALUE
Ambient Operating Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
A9 & VPP
-40oC to 85oC
-65oC to 125oC
-0.5V to 7.0V
-0.5V to VCC + 0.5V
-0.5V to 7.0V
NOTICE:
Specifications contained within the following tables are subject to
change.
-0.5V to 13.5V
DC/AC Operating Conditions for Read Operation
MX27C4100/4096
-10
-12
-15
Operating Temperature
Vcc Power Supply
Commercial
Industrial
0°C to 70°C
-40°C to 85°C
5V ±5%
0°C to 70°C
-40°C to 85°C
5V ±10%
0°C to 70°C
-40°C to 85°C
5V ±10%
DC CHARACTERISTICS
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
V
CONDITIONS
Output High Voltage
Output Low Voltage
Input High Voltage
2.4
IOH = -0.4mA
IOL = 2.1mA
0.4
V
2.0
-0.3
-10
-10
VCC + 0.5
0.8
V
VIL
Input Low Voltage
V
ILI
Input Leakage Current
Output Leakage Current
VCC Power-Down Current
VCC Standby Current
VCC Active Current
10
uA
uA
uA
mA
mA
uA
VIN = 0 to 5.5V
ILO
10
VOUT = 0 to 5.5V
CE = VCC ±0.3V
ICC3
ICC2
ICC1
IPP
100
1.5
CE = VIH
60
CE = VIL, f=5MHz, Iout = 0mA
CE = OE = VIL, VPP = 5.5V
VPP Supply Current Read
10
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL
CIN
PARAMETER
TYP.
8
MAX.
12
UNIT
pF
CONDITIONS
VIN = 0V
Input Capacitance
Output Capacitance
VPP Capacitance
COUT
CVPP
8
12
pF
VOUT = 0V
VPP = 0V
18
25
pF
P/N: PM0197
REV. 3.4, AUG. 22, 2001
9
MX27C4100/27C4096
AC CHARACTERISTICS
27C4100/4096-10 27C4100/4096-12
27C4100/4096-15
SYMBOL
tACC
tCE
PARAMETER
MIN.
MAX.
100
100
45
MIN.
MAX.
120
120
50
MIN.
MAX. UNIT CONDITIONS
Address to Output Delay
Chip Enable to Output Delay
Output Enable to Output Delay
OE High to Output Float,
or CE High to Output Float
Output Hold from Address,
CE or OE which ever occurred first
150
150
65
ns
ns
ns
ns
CE = OE = VIL
OE = VIL
tOE
CE = VIL
tDF
0
0
30
0
0
35
0
0
50
tOH
ns
AC CHARACTERISTICS(Continued)
27C4100-10
27C4100-12
27C4100-15
MIN. MAX.
SYMBOL
CONDITIONS
tBHA
PARAMETER
MIN.
MAX.
MIN.
MAX.
UNIT
BYTE Access Time
100
70
120
70
150
ns
ns
ns
ns
tOHB
BYTE Output Hold Time
BYTE Output Delay Time
BYTE Output Set Time
0
0
0
tBHZ
70
tBLZ
10
10
10
DC PROGRAMMING CHARACTERISTICS TA = 25oC ±5°C
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
V
CONDITIONS
IOH = -0.40mA
IOL = 2.1mA
Output High Voltage
2.4
Output Low Voltage
0.4
V
Input High Voltage
2.0
VCC + 0.5
0.8
V
VIL
Input Low Voltage
-0.3
-10
V
ILI
Input Leakage Current
A9 Auto Select Voltage
VCC Supply Current (Program & Verify)
VPP Supply Current(Program)
Fast Programming Supply Voltage
10
uA
V
VIN = 0 to 5.5V
VH
11.5
12.5
50
ICC3
IPP2
VCC1
mA
mA
V
30
CE = VIL, OE = VIH
6.00
12.5
6.50
VPP1
Fast Programming Voltage
13.0
V
AC PROGRAMMING CHARACTERISTICS TA = 25oC ±5°C
SYMBOL
tAS
PARAMETER
MIN.
2.0
2.0
2.0
0
MAX.
UNIT
us
CONDITIONS
Address Setup Time
OE Setup Time
tOES
tDS
us
Data Setup Time
us
tAH
Address Hold Time
Data Hold Time
us
tDH
2.0
0
us
tDFP
tVPS
tPW
Output Enable to Output Float Delay
VPP Setup Time
130
105
150
ns
2.0
95
us
PGM Program Pulse Width
VCC Setup Time
us
tVCS
tOE
2.0
us
Data valid from OE
ns
P/N: PM0197
REV. 3.4, AUG. 22, 2001
10
MX27C4100/27C4096
WEFORMS(MX27C4096)
READ CYCLE(WORD MODE)
ADDRESS
INPUTS
DATA ADDRESS
tACC
CE
OE
tCE
tDF
DATA
OUT
VALID DATA
tOE
tOH
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM
PROGRAM VERIFY
VIH
Addresses
VIL
tAH
tAS
Hi-z
DATA OUT VALID
DATA
VPP
DATA IN STABLE
tDFP
tDS
tDH
VPP1
VCC
tVPS
tVCS
VCC1
VCC
VCC
CE
VIH
VIL
tOES
tOE
Max
tPW
VIH
VIL
OE
P/N: PM0197
REV. 3.4, AUG. 22, 2001
11
MX27C4100/27C4096
WAVEFORMS(MX27C4100)
READ CYCLE (BYTE MODE)
HIGH-Z
HIGH-Z
A-1
tACC
tOH
BYTE/VPP
Q0-Q7
VALID DATA
VALID DATA
VALID DATA
tBHA
tOHB
Q15-Q8
tBHZ
tBLZ
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM
VERIFY
VIH
Addresses
VALID ADDRESS
VIL
tAH
tAS
tDS
DATA OUT VALID
DATA SET
DATA
tDFP
tDH
VPP1
VCC
BYTE/VPP
tVPS
tVCS
VCC1
VCC
VCC
CE
VIH
VIL
tOE
tOES
tPW
VIH
VIL
OE
P/N: PM0197
REV. 3.4, AUG. 22, 2001
12
MX27C4100/27C4096
ORDERING INFORMATION
PLASTIC PACKAGE
PART NO.
ACCESS TIME OPERATING
STANDBY
OPERATING
PACKAGE
(ns) CURRENT MAX.(mA) CURRENT MAX.(uA) TEMPERATURE
MX27C4100PC-10 100
MX27C4100PC-12 120
MX27C4100PC-15 150
MX27C4100MC-10 100
MX27C4100MC-12 120
MX27C4100MC-15 150
MX27C4096PC-10 100
MX27C4096PC-12 120
MX27C4096PC-15 150
MX27C4096QC-10 100
MX27C4096QC-12 120
MX27C4096QC-15 150
MX27C4100PI-10 100
MX27C4100PI-12 120
MX27C4100PI-15 150
MX27C4100MI-10 100
MX27C4100MI-12 120
MX27C4100MI-15 150
MX27C4096PI-10 100
MX27C4096PI-12 120
MX27C4096PI-15 150
MX27C4096QI-10 100
MX27C4096QI-12 120
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
100
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
--40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
40 Pin DIP(ROM pin out)
40 Pin DIP(ROM pin out)
40 Pin DIP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin DIP(JEDEC pin out)
40 Pin DIP(JEDEC pin out)
40 Pin DIP(JEDEC pin out)
44 Pin PLCC
44 Pin PLCC
44 Pin PLCC
40 Pin DIP(ROM pin out)
40 Pin DIP(ROM pin out)
40 Pin DIP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin SOP(ROM pin out)
40 Pin DIP(JEDEC pin out)
40 Pin DIP(JEDEC pin out)
40 Pin DIP(JEDEC pin out)
44 Pin PLCC
44 Pin PLCC
MX27C4096QI-15 150
60
100
-40°C to 85°C
44 Pin PLCC
P/N: PM0197
REV. 3.4, AUG. 22, 2001
13
MX27C4100/27C4096
PACKAGE INFORMATION
40-PIN PLASTIC DIP(600 mil)
P/N: PM0197
REV. 3.4, AUG. 22, 2001
14
MX27C4100/27C4096
40-PIN PLASTIC SOP(450 mil)
P/N: PM0197
REV. 3.4, AUG. 22, 2001
15
MX27C4100/27C4096
44-PIN PLASTIC LEADED CHIP CARRIER(PLCC)
P/N: PM0197
REV. 3.4, AUG. 22, 2001
16
MX27C4100/27C4096
Revision History
Revision No. Description
Pgae
Date
3.0
1) Eliminate Interactive Programming Mode
6/13/1997
2) 40-CDIP package quartz lens, change to square shape.
IPP1 100uA to 10uA
Cancel 32pin ceramic DIP Package
Modify Commercial range 0~55°C-->0~70°C
Cancel "Ultraviolet Erasable" wording in General Description
To modify Package Information
3.1
3.2
3.3
3.4
7/17/1997
P1,2,4,13,14 FEB/25/2000
P9
P1
P14~16
MAY/03/2000
AUG/22/2001
P/N: PM0197
REV. 3.4, AUG. 22, 2001
17
MX27C4100/27C4096
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
EUROPE OFFICE:
TEL:+32-2-456-8020
FAX:+32-2-456-8021
JAPAN OFFICE:
TEL:+81-44-246-9100
FAX:+81-44-246-9105
SINGAPORE OFFICE:
TEL:+65-348-8385
FAX:+65-348-8096
TAIPEI OFFICE:
TEL:+886-2-2509-3300
FAX:+886-2-2509-2200
MACRONIX AMERICA, INC.
TEL:+1-408-453-8088
FAX:+1-408-453-8488
CHICAGO OFFICE:
TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
18
相关型号:
©2020 ICPDF网 联系我们和版权申明