MX27C8000MC-12 [Macronix]
8M-BIT [1M x8] CMOS EPROM; 8M - BIT [ 1M ×8 ] CMOS EPROM型号: | MX27C8000MC-12 |
厂家: | MACRONIX INTERNATIONAL |
描述: | 8M-BIT [1M x8] CMOS EPROM |
文件: | 总15页 (文件大小:934K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MX27C8000
8M-BIT [1M x8] CMOS EPROM
FEATURES
• 1M x 8 organization
• Operating current: 60mA
• Single +5V power supply
• +12.5Vprogrammingvoltage
• Fast access time: 100/120/150 ns
• Totally static operation
• Standby current: 100uA
• Package type:
- 32 pin plastic DIP
- 32 pin PLCC/SOP
- 32 pin TSOP
• Completely TTL compatible
GENERAL DESCRIPTION
programmersmaybeused. TheMX27C8000supports
aintelligentfastprogrammingalgorithmwhichcanresult
in programming time of less than two minutes.
The MX27C8000 is a 5V only, 8M-bit, One Time
ProgrammableReadOnlyMemory.Itisorganizedas1M
words by 8 bits per word, operates from a single +5 volt
supply, has a static standby mode, and features fast
singleaddresslocationprogramming. Allprogramming
signals are TTL levels, requiring a single pulse. For
programmingoutsidefromthesystem,existingEPROM
This EPROM is packaged in industry standard 32 pin
dual-in-linepackages,32leadPLCC,32leadTSOPand
32 lead SOP packages.
PIN CONFIGURATIONS
32 PLCC
32 PDIP/SOP
32 TSOP
VCC
A18
A17
A14
A13
A8
A19
A16
A15
A12
A7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
A11
A9
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE/VPP
A10
CE
2
2
4
5
1
32
30
29
A8
3
3
A14
A13
A8
A7
A6
A5
A4
A3
A2
A1
A0
Q0
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A7
4
Q7
4
5
Q6
5
6
Q5
A6
6
7
Q4
A9
A5
7
A9
8
Q3
A11
OE/VPP
A10
CE
A4
8
MX27C8000
9
GND
Q2
A11
OE/VPP
A10
CE
9
25
A3
9
MX27C8000
10
11
12
13
14
15
16
A2
10
11
12
13
14
15
16
Q1
A1
Q0
Q7
A0
A0
Q6
Q0
A6
A1
Q5
Q1
13
14
Q7
21
A5
A2
17
20
Q4
Q2
A4
A3
Q3
GND
BLOCK DIAGRAM
PIN DESCRIPTION
CE
CONTROL
OUTPUT
SYMBOL
A0~A19
Q0~Q7
CE
PIN NAME
Q0~Q7
LOGIC
BUFFERS
OE/VPP
Address Input
Data Input/Output
Chip Enable Input
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
Y-DECODER
X-DECODER
Y-SELECT
OE/VPP
VCC
Output Enable Input/Program Supply Voltage
Power Supply Pin (+5V)
A0~A19
8M BIT
CELL
ADDRESS
INPUTS
MAXTRIX
GND
Ground Pin
VCC
GND
REV. 3.5, AUG. 20, 2001
P/N: PM00259
1
MX27C8000
AUTO IDENTIFY MODE
FUNCTIONAL DESCRIPTION
Theautoidentifymodeallowsthereadingoutofabinary
code from an EPROM that will identify its manufacturer
and device type. This mode is intended for use by
programmingequipmentforthepurposeofautomatically
matching the device to be programmed with its
corresponding programming algorithm. This mode is
functional in the 25°C ±5°C ambient temperature range
thatisrequiredwhenprogrammingtheMX27C8000.
THEPROGRAMMINGOFTHEMX27C8000
When theMX27C8000 isdelivered, or it iserased, the
chip hasall8Mbitsinthe"ONE"orHIGHstate."ZEROs"
areloadedintotheMX27C8000throughtheprocedureof
programming.
Forprogramming,thedatatobeprogrammedisapplied
with 8 bits in parallel to the data pins.
Toactivatethismode,theprogrammingequipmentmust
force 12.0 ±0.5 V on address line A9 of the device. Two
identifier bytes may then be sequenced from the device
outputs by toggling address line A0 from VIL to VIH. All
other address lines must be held at VIL during auto
identify mode.
Vcc must be applied simultaneously or before Vpp, and
removed simultaneously or after Vpp. When
programming an MXIC EPROM, a 0.1uF capacitor is
required across Vpp and ground to suppress spurious
voltage transients which may damage the device.
Byte0(A0=VIL)representsthemanufacturercode,and
byte 1 (A0 = VIH), the device identifier code. For the
MX27C8000, these two identifier bytes are given in the
Mode Select Table. All identifiers for manufacturer and
devicecodeswillpossessoddparity, withtheMSB(Q7)
defined as the parity bit.
FASTPROGRAMMING
Thedeviceissetupinthefastprogrammingmodewhen
the programming voltage OE/VPP = 12.75V is applied,
withVCC=6.25V(AlgorithmisshowninFigure1). The
programming is achieved by applying a single TTL low
level50uspulsetotheCEinputafteraddressesanddata
line are stable. If the data is not verified, an additional
pulse is applied for a maximum of 25 pulses. This
process is repeated while sequencing through each
address of the device. When the programming mode is
completed,thedatainalladdressisverifiedatVCC= 5V
±10%.
READMODE
TheMX27C8000hastwocontrolfunctions,bothofwhich
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
shouldbeusedfordeviceselection. OutputEnable(OE)
is the output control and should be used to gate data to
the output pins, independent of device selection.
Assuming that addresses are stable, address access
time(tACC)isequaltothedelayfromCEtooutput(tCE).
DataisavailableattheoutputstOEafterthefallingedge
ofOE's,assumingthatCEhasbeenLOWandaddresses
have been stable for at least tACC - tOE.
PROGRAMINHIBITMODE
Programming of multiple MX27C8000s in parallel with
different data is also easily accomplished by using the
Program Inhibit Mode. Except for CE and OE, all like
inputs of the parallel MX27C8000 may be common. A
TTL low-level program pulse applied to an MX27C8000
CE input with OE/VPP = 12.5 ±0.5 Vwill program that
MX27C8000. A high-level CE input inhibits the other
MX27C8000sfrombeingprogrammed.
STANDBYMODE
The MX27C8000 has a CMOS standby mode which
reduces the maximum VCC current to 100 uA. It is
placedinCMOSstandbywhenCEisatVCC±0.3V. The
MX27C8000 also has a TTL-standby mode which
reduces the maximum VCC current to 1.5 mA. It is
placed in TTL-standby when CE is at VIH. When in
standby mode, the outputs are in a high-impedance
state, independent of the OE input.
PROGRAMVERIFYMODE
Verificationshouldbeperformedontheprogrammedbits
todeterminethattheywerecorrectlyprogrammed. The
verification should be performed with OE /VPPand CE,
at VIL, data should be verified tDV after the falling edge
of CE.
REV. 3.5, AUG. 20, 2001
P/N: PM00259
2
MX27C8000
TWO-LINEOUTPUTCONTROLFUNCTION
SYSTEMCONSIDERATIONS
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
During the switch between active and standby
conditions, transient current peaks are produced on the
rising and falling edges of Chip Enable. The magnitude
of these transient current peaks is dependent on the
outputcapacitanceloadingofthedevice. Ataminimum,
a0.1uFceramiccapacitor(highfrequency,lowinherent
inductance) should be used on each device between
VCCandGNDtominimizetransienteffects. Inaddition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on EPROM
arrays, a 4.7 uF bulk electrolytic capacitor should be
usedbetweenVCCandGNDforeacheightdevices. The
location of the capacitor should be close to where the
power supply is connected to the array.
1. Low memory power dissipation,
2. Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and
connectedtotheREADlinefromthesystemcontrolbus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
MODE SELECT TABLE
PINS
MODE
CE
OE/VPP
VIL
A0
X
A9
X
OUTPUTS
DOUT
High Z
High Z
High Z
DIN
Read
VIL
Output Disable
Standby (TTL)
Standby (CMOS)
Program
VIL
VIH
X
X
X
VIH
X
X
VCC±0.3V
VIL
X
X
X
VPP
VIL
X
X
Program Verify
Program Inhibit
Manufacturer Code(3)
Device Code(3)
VIL
X
X
DOUT
High Z
C2H
VIH
VPP
VIL
X
X
VIL
VIL
VIH
VH
VH
VIL
VIL
80H
3. A1 - A8 = A10 - A19 = VIL(For auto select)
4. See DC Programming Characteristics for VPP voltage during
programming.
NOTES: 1. VH = 12.0 V ±0.5 V
2. X = Either VIH or VIL
REV. 3.5, AUG. 20, 2001
P/N: PM00259
3
MX27C8000
FIigure 1. FAST PROGRAMMING FLOW CHART
START
ADDRESS = FIRST LOCATION
VCC = 6.25V
OE/VPP = 12.75V
PROGRAM ONE 50 us PULSE
LAST
NO
INCREMENT ADDRESS
ADDRESS ?
YES
ADDRESS = FIRST LOCATION
X = 0
INCREMENT ADDRESS
NO
LAST
PASS
FAIL
INCREMENT X
VERIFY BYTE
ADDRESS ?
YES
NO
X = 25 ?
PROGRAM ONE 50us PULSE
YES
VCC = 5.25V
OE/VPP = VIL
COMPARE
ALL BYTES
TO ORIGINAL
DATA
FAIL
DEVICE FAILED
PASS
DEVICE PASSED
REV. 3.5, AUG. 20, 2001
P/N: PM00259
4
MX27C8000
SWITCHING TEST CIRCUITS
DEVICE
UNDER
TEST
1.8K ohm
+5V
DIODES = IN3064
OR EQUIVALENT
CL
6.2K ohm
CL = 100 pF including jig capacitance(60pF for 100ns parts)
SWITCHING TEST WAVEFORMS
2.0V
0.8V
2.0V
TEST POINTS
AC driving levels
0.8V
OUTPUT
INPUT
AC TESTING: AC driving levels are 2.4V/0.4V for commercial grade.
Input pulse rise and fall times are < 10ns.
REV. 3.5, AUG. 20, 2001
P/N: PM00259
5
MX27C8000
NOTICE:
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended period may affect reliability.
RATING
VALUE
Ambient Operating Temperature
Storage Temperature
Applied Input Voltage
Applied Output Voltage
VCC to Ground Potential
V9 & VPP
0oC to 70oC
-65oC to 125oC
-0.5V to 7.0V
NOTICE:
-0.5V to VCC + 0.5V
-0.5V to 7.0V
Specifications contained within the following tables are subject to
change.
-0.5V to 13.5V
DC/AC Operating Condition for Read Operation
MX27C8000
-10
-12
-15
Operationg Temperature
Vcc Power Supply
Commercial
0°C to 55°C
5V ±10%
0°C to 70°C
5V ±10%
0°C to 70°C
5V ±10%
DC CHARACTERISTICS
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
Output High Voltage
Output Low Voltage
2.4
V
V
IOH = -0.4mA
IOL = 2.1mA
0.4
Input High Voltage
2.0
-0.3
-10
-10
VCC + 0.5
V
VIL
Input Low Voltage
0.8
10
V
ILI
Input Leakage Current
Output Leakage Current
VCC Power-Down Current
VCC Standby Current
VCC Active Current
VPP Supply Current Read
uA
uA
uA
mA
mA
uA
VIN = 0 to 5.5V
ILO
10
VOUT = 0 to 5.5V
CE = VCC ±0.3V
ICC3
ICC2
ICC1
IPP
100
1.5
60
CE = VIH
CE = VIL, f=5MHz, Iout = 0mA
CE = OE = VIL, VPP = 5.5V
10
CAPACITANCE TA = 25oC, f = 1.0 MHz (Sampled only)
SYMBOL
CIN
PARAMETER
TYP.
8
MAX.
12
UNIT
pF
CONDITIONS
VIN = 0V
Input Capacitance
Output Capacitance
VPP Capacitance
COUT
CVPP
8
12
pF
VOUT = 0V
VPP = 0V
18
25
pF
REV. 3.5, AUG. 20, 2001
P/N: PM00259
6
MX27C8000
AC CHARACTERISTICS
27C8000-10
27C8000-12
27C8000-15
SYMBOL PARAMETER
MIN.
MAX.
MIN.
MAX.
MIN.
MAX. UNIT CONDITIONS
tACC
tCE
Address to Output Delay
100
100
40
120
120
50
150
150
65
ns
ns
ns
ns
CE = OE = VIL
OE = VIL
Chip Enable to Output Delay
Output Enable to Output Delay
OE High to Output Float,
tOE
tDF
CE = VIL
0
0
30
0
0
35
0
0
50
or CE High to Output Float
Output Hold from Address,
CE or OE which ever occurred first
tOH
ns
DC PROGRAMMING CHARACTERISTICS TA = 25oC ±5oC
SYMBOL
VOH
VOL
VIH
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
IOH = -0.40mA
IOL = 2.1mA
Output High Voltage
2.4
V
Output Low Voltage
0.4
V
Input High Voltage
2.0
VCC + 0.5
0.8
V
VIL
Input Low Voltage
-0.3
-10
V
ILI
Input Leakage Current
A9 Auto Select Voltage
VCC Supply Current (Program & Verify)
VPP Supply Current(Program)
Fast Programming Supply Voltage
Fast Programming Voltage
10
uA
V
VIN = 0 to 5.5V
CE = VIL
VH
11.5
12.5
50
ICC3
IPP2
VCC1
VPP1
mA
mA
V
30
6.00
12.5
6.50
13.0
V
AC PROGRAMMING CHARACTERISTICS TA = 25oC ±5oC
SYMBOL
tAS
PARAMETER
MIN.
2.0
2.0
0
TYP.
MAX.
UNIT
us
us
us
us
ns
us
us
us
ns
us
us
Address Setup Time
Data Setup Time
tDS
tAH
Address Hold Time
Data Hold Time
tDH
2.0
0
tDFP
tVPS
tPW
Chip Enable to Output Float Delay
VPP Setup Time
130
150
2.0
CE Program Pulse Width
VCC Setup Time
50
tVCS
tDV
2.0
Data Valid from CE
OE/VPP Hold Time
OE/VPP Recovery Time
tOEH
tVR
2.0
2.0
REV. 3.5, AUG. 20, 2001
P/N: PM00259
7
MX27C8000
WAVEFORMS
READ CYCLE
ADDRESS
INPUTS
DATA ADDRESS
tACC
CE
OE
tCE
tDF
DATA
OUT
VALID DATA
tOE
tOH
FAST PROGRAMMING ALGORITHM WAVEFORMS
PROGRAM
PROGRAM VERIFY
VIH
Addresses
VIL
tAS
Hi-z
DATA OUT VALID
DATA
tDV
tDS
tDH
tDFP
tAH
VPP1
VIL
OE/VPP
CE
tVPS
tVPS
tVR
tPW
VIH
VIL
tVCS
VCC1
VCC
VCC
REV. 3.5, AUG. 20, 2001
P/N: PM00259
8
MX27C8000
ORDERING INFORMATION
PLASTICPACKAGE
PART NO.
ACCESS TIME(ns) OPERATING CURRENT MAX.(mA) STANDBY CURRENT MAX.(uA) PACKAGE
MX27C8000PC-10 100
MX27C8000QC-10 100
MX27C8000MC-10 100
MX27C8000TC-10 100
MX27C8000PC-12 120
MX27C8000QC-12 120
MX27C8000MC-12 120
MX27C8000TC-12 120
MX27C8000PC-15 150
MX27C8000QC-15 150
MX27C8000MC-15 150
MX27C8000TC-15 150
60
60
60
60
60
60
60
60
60
60
60
60
100
100
100
100
100
100
100
100
100
100
100
100
32 Pin DIP
32 Pin PLCC
32 Pin SOP
32 Pin TSOP
32 Pin DIP
32 Pin PLCC
32 Pin SOP
32 Pin TSOP
32 Pin DIP
32 Pin PLCC
32 Pin SOP
32 Pin TSOP
REV. 3.5, AUG. 20, 2001
P/N: PM00259
9
MX27C8000
PACKAGE INFORMATION
32-PIN PLASTIC DIP(600 mil)
REV. 3.5, AUG. 20, 2001
P/N: PM00259
10
MX27C8000
32-PIN PLASTIC SOP(450 mil)
REV. 3.5, AUG. 20, 2001
P/N: PM00259
11
MX27C8000
32-PINPLASTICLEADEDCHIPCARRIER(PLCC)
REV. 3.5, AUG. 20, 2001
P/N: PM00259
12
MX27C8000
32-PIN PLASTIC TSOP
REV. 3.5, AUG. 20, 2001
P/N: PM00259
13
MX27C8000
REVISION HISTORY
RevisionNo. Description
Page
Date
2.0
1) Eliminate Interactive Programming Mode.
5/30/1997
2) Programming pulse change from 100us to 50us.
1)Partial specification change for 100ns speed grade
1-1) SWITCHING TEST Condition CL = 100pF---> CL = 60pF
1-2) Operating Temperature 0°C to 70°C ----> 0°Cto55°C
1-3) Vcc, 5V ±10%----> 5V ±5%
3.0
7/18/1997
2)IPP1 100uA ----> 10uA.
3.1
1)Partial specification change for 100ns speed grade,
VCC:5V ±5% ----->5V ±10%
12/19/1997
3.2
3.3
3.4
3.5
Added 32pin TSOP package type
CorrectingOrderingInformation
Cancel ceramic DIP package type
Cancel"UltravioletErasable"wordinginGeneralDescription
To modify Package Information
P1,12
P9
P1,2,9,10
P1
OCT/20/1999
OCT/21/1999
MAR/02/2000
AUG/20/2001
P10~13
REV. 3.5, AUG. 20, 2001
P/N: PM00259
14
MX27C8000
MACRONIX INTERNATIONAL CO., LTD.
HEADQUARTERS:
TEL:+886-3-578-6688
FAX:+886-3-563-2888
EUROPE OFFICE:
TEL:+32-2-456-8020
FAX:+32-2-456-8021
JAPAN OFFICE:
TEL:+81-44-246-9100
FAX:+81-44-246-9105
SINGAPORE OFFICE:
TEL:+65-348-8385
FAX:+65-348-8096
TAIPEI OFFICE:
TEL:+886-2-2509-3300
FAX:+886-2-2509-2200
MACRONIX AMERICA, INC.
TEL:+1-408-453-8088
FAX:+1-408-453-8488
CHICAGO OFFICE:
TEL:+1-847-963-1900
FAX:+1-847-963-1909
http : //www.macronix.com
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.
15
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