2SK3794 [NEC]
SWITCHING N-CHANNEL POWER MOSFET; 切换N沟道功率MOSFET型号: | 2SK3794 |
厂家: | NEC |
描述: | SWITCHING N-CHANNEL POWER MOSFET |
文件: | 总8页 (文件大小:151K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3794
SWITCHING
N-CHANNEL POWER MOS FET
DESCRIPTION
ORDERING INFORMATION
The 2SK3794 is N-channel MOS Field Effect Transistor
PART NUMBER
2SK3794
PACKAGE
designed for high current switching applications.
TO-251 (MP-3)
TO-252 (MP-3Z)
2SK3794-Z
FEATURES
• Low On-state resistance
(TO-251)
RDS(on)1 = 44 mΩ MAX. (VGS = 10 V, ID = 10 A)
RDS(on)2 = 78 mΩ MAX. (VGS = 4.0 V, ID = 10 A)
• Low Ciss: Ciss = 760 pF TYP.
• Built-in gate protection diode
• TO-251/TO-252 package
(TO-252)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC) (TC = 25°C)
Drain Current (pulse) Note1
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
60
±20
V
V
±20
A
±50
A
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
Channel Temperature
30
W
W
°C
°C
A
PT2
1.0
Tch
150
−55 to +150
15
Storage Temperature
Tstg
Single Avalanche Current Note2
Single Avalanche Energy Note2
Repetitive Avalanche Energy Note3
IAS
EAS
23
mJ
mJ
EAR
23
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Starting Tch = 25°C, VDD = 30 V, RG = 25 Ω, VGS = 20 → 0 V
3. IAR ≤ 15 A, Tch ≤ 150°C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D16778EJ2V0DS00 (2nd edition)
Date Published August 2004 NS CP(K)
Printed in Japan
The mark
shows major revised points.
2004
2SK3794
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
µA
µA
V
IDSS
VDS = 60 V, VGS = 0 V
10
10
VGS = 20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 10 A
VGS = 10 V, ID = 10 A
VGS = 4.0 V, ID = 10 A
VDS = 10 V
IGSS
Gate Cut-off Voltage
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
1.5
5
2.0
10
2.5
Note
Forward Transfer Admittance
S
Note
mΩ
mΩ
pF
pF
pF
ns
Drain to Source On-state Resistance
35
44
78
54
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
760
150
71
Coss
Crss
VGS = 0 V
f = 1 MHz
td(on)
tr
VDD = 30 V, ID = 10 A
VGS = 10 V
13
170
43
ns
RG = 10 Ω
Turn-off Delay Time
Fall Time
td(off)
tf
ns
34
ns
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
VDD = 48 V
17
nC
nC
nC
V
QGS
QGD
VF(S-D)
trr
VGS = 10 V
3.0
4.7
1.0
39
ID = 10 A
Note
Body Diode Forward Voltage
IF = 20 A, VGS = 0 V
IF = 20 A, VGS = 0 V
di/dt = 100 A/µs
Reverse Recovery Time
Reverse Recovery Charge
Note Pulsed
ns
Qrr
62
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
D.U.T.
L
RG
= 25 Ω
V
GS
R
L
90%
PG.
GS = 20 → 0 V
V
GS
VGS
10%
V
DD
50 Ω
Wave Form
0
RG
V
PG.
VDD
90%
ID
90%
10%
BVDSS
ID
IAS
V
0
GS
10%
I
D
0
VDS
Wave Form
ID
td(on)
tr
td(off)
t
f
VDD
τ
ton
toff
τ = 1 s
µ
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG
= 2 mA
RL
PG.
VDD
50 Ω
2
Data Sheet D16778EJ2V0DS
2SK3794
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
35
30
100
80
60
40
20
0
25
20
15
10
5
0
0
20
40 60
80 100 120 140 160
20 40
60
80 100 120 140 160
0
TC
- Case Temperature - ˚C
TC
- Case Temperature - ˚C
FORWARD BIAS SAFE OPERATING AREA
1000
100
10
ID(pulse)
I
D(DC)
DC
1
TC
= 25˚C
Single Pulse
0.1
0.1
1
10
100
VDS
-
Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
R
th(ch-A) = 125 ˚C/W
10
1
R
th(ch-C) = 4.17 ˚C/W
0.1
0.01
Single Pulse
100 1000
µ
10
1 m
10 m
100 m
1
10
100
µ
PW - Pulse Width - s
3
Data Sheet D16778EJ2V0DS
2SK3794
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
50
40
1000
100
Pulsed
Pulsed
V
GS =10 V
30
20
T
A
= −55˚C
25˚C
10
1
75˚C
4.0 V
150˚C
10
0
V
DS = 10 V
5
0.1
6
1
2
3
4
0
1
2
3
4
VGS - Gate to Source Voltage - V
VDS - Drain to Source Voltage - V
GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3.0
100
10
1
V
= 10 V
D=S 1 mA
I
D
2.5
2.0
1.5
1.0
T
A
= 150˚C
75˚C
25˚C
−50˚C
0.1
0.5
0
0.01
0.01
−50
0
50
100
150
0.1
1
10
100
Tch - Channel Temperature - ˚C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
100
80
Pulsed
90
80
70
60
70
60
50
40
30
20
V
GS = 4.0 V
50
40
30
20
10
0
10 V
I
D
= 10 A
10
0
0
2
4
6
8
10 12 14 16 18 20
0.1
1
10
100
VGS - Gate to Source Voltage - V
I
D
- Drain Current - A
4
Data Sheet D16778EJ2V0DS
2SK3794
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
10000
1000
120
V
GS = 0 V
Pulsed
f = 1 MHz
100
80
C
iss
V
GS = 4.0 V
10 V
60
40
20
0
100
10
C
oss
C
rss
I
D
= 10 A
150
ch - Channel Temperature - ˚C
0.1
1
10
100
−50
0
50
100
V
DS - Drain to Source Voltage - V
T
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
16
SWITCHING CHARACTERISTICS
1000
80
60
40
t
r
14
12
10
t
f
V
DD = 48 V
30 V
100
10
1
t
d(on)
12 V
8
6
4
2
t
d(off)
V
GS
20
0
V
DS
I
D
= 20 A
0.1
1
10
100
4
0
8
12 16 20 24
- Gate Charge - nC
28 32
I
D
- Drain Current - A
Q
G
REVERSE RECOVERY TIME vs.
DRAIN CURRENT
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
1000
100
100
10
1
µ
di/dt = 100 A/ s
GS = 0 V
Pulsed
GS = 10 V
V
V
0 V
10
1
0.1
0.01
0.1
1
10
100
0
0.5
1.0
1.5
I
F
- Drain Foward Current - A
VF(S-D) - Source to Drain Voltage - V
5
Data Sheet D16778EJ2V0DS
2SK3794
SINGLE AVALANCHE ENERGY
DERATING FACTOR
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD
160
140
120
100
80
100
10
V
R
V
I
DD = 30 V
= 25 Ω
GS = 20 → 0 V
AS ≤ 15 A
G
I
AS = 15A
60
1
40
V
DD = 30V
= 25 Ω
GS = 20→0 V
20
R
G
V
0.1
10
0
µ
100
µ
1m
10m
25
50
75
100
125
150
Starting Tch - Starting Channel Temperature - ˚C
L - Inductive Load - H
6
Data Sheet D16778EJ2V0DS
2SK3794
PACKAGE DRAWINGS (Unit: mm)
1) TO-251 (MP-3)
2) TO-252 (MP-3Z)
2.3 0.2
0.5 0.1
6.5 0.2
5.0 0.2
4
6.5 0.2
2.3 0.2
0.5 0.1
5.0 0.2
4
1
2
3
1
2
3
1.1 0.2
0.9
0.8
1.1 0.2
MAX. MAX.
2.3 2.3
0.5 +−00..12
0.5 +−00..21
0.8
1. Gate
2.3 2.3
2. Drain
3. Source
4. Fin (Drain)
1. Gate
2. Drain
3. Source
4. Fin (Drain)
EQUIVALENT CIRCUIT
Drain
Body
Diode
Gate
Gate
Protection
Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
7
Data Sheet D16778EJ2V0DS
2SK3794
•
The information in this document is current as of August, 2004. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
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•
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M8E 02. 11-1
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