UPA2709GR-E1 [NEC]
Power Field-Effect Transistor, 13A I(D), 30V, 0.015ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, POWER SOP-8;
| 型号： | UPA2709GR-E1 |
| 厂家： | 
NEC |
| 描述： | Power Field-Effect Transistor, 13A I(D), 30V, 0.015ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, POWER SOP-8 |
| 文件： | 总6页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
μ PA2709GR
SWITCHING
N-CHANNEL POWER MOSFET
DESCRIPTION
PACKAGE DRAWING (Unit: mm)
The μ PA2709GR is N-channel MOS Field Effect Transistor
designed for DC/DC converter and power management
applications of notebook computer.
8
5
1, 2, ꢀ : Source
4
: Gate
5, 6, 7, 8: Drain
FEATURES
• Low on-state resistance
6.0 0.ꢀ
4.4
RDS(on)1 = 10.5 mΩ MAX. (VGS = 10 V, ID = 7.0 A)
RDS(on)2 = 15 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A)
• Low QGD: QGD = 3.3 nC TYP. (VDD = 15 V, ID = 13 A)
• Built-in gate protection diode
1
4
5.ꢀ7 MAX.
0.8
0.5 0.2
• Small and surface mount package (Power SOP8)
0.10
1.27 0.78 MAX.
+0.10
–0.05
0.40
0.12 M
ORDERING INFORMATION
PART NUMBER
μ PA2709GR-E1-A
μ PA2709GR-E2-A
PACKAGE
Power SOP8
Power SOP8
Note
Note
Note Pb-free (This product does not contain Pb in external electrode and other parts.)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
VDSS
VGSS
ID(DC)
ID(pulse)
PT1
30
V
V
EQUIVALENT CIRCUIT
20
Drain
13
A
Drain Current (pulse) Note1
52
A
Total Power Dissipation Note2
Total Power Dissipation (PW = 10 sec) Note2
Channel Temperature
1.1
W
W
°C
°C
A
Body
Diode
Gate
PT2
2.5
150
Tch
Storage Temperature
Tstg
–55 to +150
13
Gate
Single Avalanche Current Note3
Single Avalanche Energy Note3
Notes 1. PW ≤ 10 μs, Duty Cycle ≤ 1%
Protection
Diode
IAS
Source
EAS
17
mJ
2. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm
3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V, L = 100 μH
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When
this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated
voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G17515EJ1V0DS00 (1st edition)
Date Published September 2005 NS CP(K)
Printed in Japan
2005
μ PA2709GR
ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
VDS = 30 V, VGS = 0 V
MIN.
TYP.
MAX.
UNIT
Zero Gate Voltage Drain Current
Gate Leakage Current
IDSS
IGSS
VGS(off)
| yfs |
RDS(on)1
RDS(on)2
Ciss
10
10
μA
μA
V
VGS = 20 V, VDS = 0 V
VDS = 10 V, ID = 1 mA
VDS = 10 V, ID = 7.0 A
VGS = 10 V, ID = 7.0 A
VGS = 4.5 V, ID = 7.0 A
VDS = 10 V
Gate Cut-off Voltage
1.5
7
2.5
Note
Forward Transfer Admittance
S
Note
Drain to Source On-state Resistance
8.3
10.6
1270
320
110
10
10.5
15
mΩ
mΩ
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Coss
Crss
td(on)
tr
VGS = 0 V
f = 1 MHz
VDD = 15 V, ID = 7.0 A
VGS = 10 V
5.3
40
Turn-off Delay Time
Fall Time
td(off)
tf
RG = 10 Ω
7.8
11
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
VDD = 15 V
QGS
QGD
VF(S-D)
trr
VGS = 5 V
3.8
3.3
0.8
25
ID = 13 A
Note
Body Diode Forward Voltage
IF = 13 A, VGS = 0 V
IF = 13 A, VGS = 0 V
di/dt = 100 A/μs
f = 1 MHz
Reverse Recovery Time
Reverse Recovery Charge
Gate Resistance
ns
nC
Ω
Qrr
22
RG
1.2
Note Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
D.U.T.
V
V
GS
RG
= 25 Ω
50 Ω
R
L
90%
V
GS
Wave Form
V
GS
10%
0
R
G
PG.
V
DD
PG.
GS = 20 → 0 V
V
DD
V
DS
90%
d(on)
90%
V
DS
V
0
GS
BVDSS
10% 10%
V
DS
Wave Form
0
I
AS
V
DS
I
D
τ
t
tr
t
d(off)
tf
V
DD
t
on
t
off
τ = 1
μs
Duty Cycle ≤ 1%
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
= 2 mA
IG
R
L
50 Ω
PG.
V
DD
2
Data Sheet G17515EJ1V0DS
μ PA2709GR
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
FORWARD BIAS SAFE OPERATING AREA
100
10
120
100
80
I
I
D(pulse)
D(DC)
d
)
e
t
i
V
m
0
i
1
L
)
=
n
o
(
VGS
RDS
t
1
60
a
(
40
0.1
0.01
T
A
= 25°C
Single Pulse
Mounted on glass epoxy board
(25.4 mm2 x 0.8 mm)
20
0
0
20
40 60
80 100 120 140 160
0.01
0.1
1
10
100
T
A
- Ambient Temperature - ˚C
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
100
10
rth(ch-A) = 114°C/W
1
Mounted on a glass epoxy board (25.4 mm2 × 0.8mm) , T
Single Pulse
A
= 25°C
0.1
100 μ
1 m
10 m
100 m
PW - Pulse Width - s
1
10
100
1000
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
60
50
40
30
20
10
0
100
10
1
V
GS = 10 V
TA
= 150°C
75°C
25°C
−55°C
4.5 V
0.1
V
DS = 10 V
Pulsed
Pulsed
0.01
0
0.2
0.4
0.6
0.8
0
1
2
3
4
5
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
3
Data Sheet G17515EJ1V0DS
μ PA2709GR
GATE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
3
2
1
0
100
10
1
TA
= 150°C
75°C
25°C
−55°C
V
DS = 10 V
= 1 mA
V
DS = 10 V
I
D
Pulsed
0.1
-50
0
50
100
150
0.01
0.1
1
10
100
Tch - Channel Temperature - °C
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
30
30
Pulsed
ID = 7.0 A
20
10
0
20
V
GS = 4.5 V
10 V
10
0
Pulsed
0
5
10
15
20
0.01
0.1
1
10
100
VGS - Gate to Source Voltage - V
ID - Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
25
10000
1000
100
I
D
= 7.0 A
Pulsed
20
15
10
5
C
iss
V
GS = 4.5 V
C
C
oss
rss
10 V
10
0
0.1
1
10
100
-50
0
50
100
150
VDS - Drain to Source Voltage - V
Tch - Channel Temperature - °C
4
Data Sheet G17515EJ1V0DS
μ PA2709GR
SWITCHING CHARACTERISTICS
DYNAMIC INPUT CHARACTERISTICS
6
5
4
3
2
1
0
100
10
1
t
d(off)
V
DD = 24 V
15 V
t
f
6 V
t
d(on)
t
r
V
V
DD = 15 V
GS = 10 V
I
D
= 13 A
12
RG = 10 Ω
0.1
1
10
100
0
2
4
6
8
10
14
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
100
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
100
10
Pulsed
V
GS = 0 V
10
1
0.1
0.01
V
GS = 0 V
di/dt = 100 A/μs
1
0
0.2
0.4
0.6
0.8
1
1.2
0.1
1
10
100
VF(S-D) - Source to Drain Voltage - V
IF - Diode Forward Current - A
5
Data Sheet G17515EJ1V0DS
μ PA2709GR
•
The information in this document is current as of September, 2005. The information is subject to
change without notice. For actual design-in, refer to the latest publications of NEC Electronics data
sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not
all products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
• No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
•
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•
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M8E 02. 11-1
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