UPC1658G-E1 [NEC]

LOW NOISE, HIGH FREQUENCY Si MMIC AMPLIFIER; 低噪声,高频硅MMIC放大器
UPC1658G-E1
型号: UPC1658G-E1
厂家: NEC    NEC
描述:

LOW NOISE, HIGH FREQUENCY Si MMIC AMPLIFIER
低噪声,高频硅MMIC放大器

射频和微波 射频放大器 微波放大器
文件: 总12页 (文件大小:74K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DATA SHEET  
BIPOLAR ANALOG INTEGRATED CIRCUIT  
µPC1658G  
LOW NOISE, HIGH FREQUENCY Si MMIC AMPLIFIER  
DESCRIPTION  
The µPC1658G is a silicon monolithic integrated circuit designed as amplifier for high frequency system  
applications. Bandwidth and output power level can be determined according to external resistor constants of  
negative feedback and final stage collector. This IC is available in 8-pin plastic SOP.  
This IC is manufactured using NEC’s 10 GHz fT NESATTM II silicon bipolar process. This process uses silicon  
nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and  
prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.  
FEATURES  
Low noise figure  
: NF 3 dB  
Due to the external negative feedback circuit, the power gain can be adjustable by selecting appropriate  
resistance constants.  
: GP 40 dB @ Without negative feedback resistor  
: GP 18 dB @ With negative feedback resistor  
Wideband response  
: f3dB = 1.0 GHz @ GP = 18 dB  
External resistor can vary the collector current of the final transistor in the IC to adjust the saturated output level.  
APPLICATIONS  
IF buffer amplifier of high frequency system  
Measurement equipment  
ORDERING INFORMATION  
Part Number  
Package  
8-pin plastic SOP (225 mil)  
Marking  
1658  
Supplying Form  
µPC1658G-E1  
Embossed tape 12 mm wide.  
1 pin is tape pull-out direction.  
Qty 2.5 kp/reel.  
Remark To order evaluation samples, please contact your local NEC sales office.  
(Part number for sample order: µPC1658G)  
Caution TO-99 CAN package (µPC1658A) and 8-pin plastic DIP package (µPC1658C) products are  
discontinued.  
Caution Electro-static sensitive devices  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
Document No. P11120EJ3V0DS00 (3rd edition)  
Date Published September 1999 N CP(K)  
Printed in Japan  
The mark  
shows major revised points.  
©
1996, 1999  
µPC1658G  
PIN CONNECTIONS  
Pin No.  
Pin Name  
GND  
(Top View)  
7 6  
1
2
3
4
5
6
7
8
8
5
Test Point  
Output  
VCC  
Test Point  
Input  
1
2
3
4
Bypass  
Bypass  
PIN EXPLANATION  
Pin No.  
1
Pin Name  
GND  
Function and Applications  
Internal Equivalent Circuit  
Ground pin. This pin should be connected to  
system ground with minimum inductance.  
Ground pattern on the board should be formed  
as possible. All the ground pins must be  
connected together with wide ground pattern to  
decrease impedance difference.  
2
Test Point  
Test Point pin. The collector current of Q2 and  
Q3 can be varied by connecting an appropriate  
external resistance between this pin and GND  
or by shorting this pin to GND. By increasing  
the collector current of Q3, the output level  
improves and the IC can operate as a low-  
distortion amplifier.  
4 VCC  
R3  
R1  
5 Test point  
R4  
3
4
Output  
VCC  
Signal output pin. This pin must be coupled to  
signal source with capacitor for DC cut.  
Q2  
Q1  
Q3  
R7  
Input 6  
Power supply pin. This pin should be externally  
equipped with bypass capacitor to minimize its  
impedance.  
3 Output  
Bypass 7  
Bypass 8  
2 Test point  
R2  
R5  
R6  
R8  
5
6
Test Point  
By connecting this pin to the power supply  
through an appropriate external resistance or by  
shorting this pin directly to the power supply,  
the gain can be adjustable (when using pin 2,  
short the pin 5 to the power supply).  
1 GND  
Input  
Signal input pin. Through negative feedback  
from output pin with an external circuit, the IC  
operates as a wideband amplifier.  
7
8
Bypass  
Emitter bypass pins of Q1. Bypass these pins  
to GND with a capacitor.  
2
Data Sheet P11120EJ3V0DS00  
µPC1658G  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Supply Voltage  
Symbol  
Conditions  
Rating  
Unit  
V
VCC  
IQ3  
TA = +25 °C  
TA = +25 °C  
12  
40  
Output Transistor Current  
Power Dissipation  
mA  
mW  
PD  
Mounted on double copper clad 50 × 50 × 1.6 mm  
epoxy glass PWB (TA = +70 °C)  
280  
Operating Ambient Temperature  
Storage Temperature  
TA  
–40 to +75  
°C  
°C  
Tstg  
–55 to +150  
ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 10.0 V, ZS = ZL = 50 , Test circuit 1)  
Parameter  
Circuit Current  
Symbol  
ICC  
Conditions  
MIN.  
9
TYP.  
MAX.  
18  
Unit  
mA  
dB  
dB  
dB  
dB  
dB  
No signal  
Power Gain 1  
Power Gain 2  
Power Gain 3  
Noise Figure 1  
Noise Figure 2  
GP1  
f = 10 MHz  
f = 100 MHz  
f = 500 MHz  
f = 100 MHz  
f = 500 MHz  
37  
28  
14  
41  
45  
GP2  
31  
34  
GP3  
17  
20  
NF1  
NF2  
1.5  
2.0  
2.5  
3.0  
TEST SET-UP  
Power Supply  
0.01 µF  
Spectrum Analyzer or  
Network Analyzer  
Signal Generator  
INPUT  
OUTPUT  
Test Circuit  
1 to 3  
ZL = 50  
ZS = 50 Ω  
3
Data Sheet P11120EJ3V0DS00  
µPC1658G  
TEST CIRCUITS  
TEST CIRCUIT 1 (Low-noise amplifier)  
Input  
0.1  
µ
F
8
0.01  
5
F
µ
7
2
6
3
1
4
VCC  
0.01  
F
µ
0.01 F  
µ
Output  
TEST CIRCUIT 2 (Wideband low-noise amplifier)  
Input  
0.01  
5
µF  
µ
0.1  
F
8
7
2
6
3
RF  
1
4
V
CC  
µ
0.01 F  
0.01  
F
µ
0.01  
F
µ
Output  
TEST CIRCUIT 3 (Wideband low-noise amplifier with improved output level)  
Input  
0.01  
5
F
µ
0.1  
F
8
µ
7
2
6
220  
1
3
4
V
CC  
µ
0.01 F  
180  
0.01  
F
µ
0.01  
µF  
Output  
4
Data Sheet P11120EJ3V0DS00  
µPC1658G  
ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD  
µ
PC1658G  
1
GND  
OUT  
IN  
C1  
C3  
VCC  
Notes 1. 50 × 50 × 0.4 mm double sided copper clad polyimide board.  
2. Back side: GND pattern  
3. Solder plated on pattern  
4.  
: Through holes  
COMPONENT LIST  
Value  
0.01 µF  
0.1 µF  
OpenNote  
180 Ω  
Remarks  
C1 to C3  
C4  
Necessary to all the test circuits  
R1  
In the case of Low-noise Amplifier  
In the case of Wideband Low-noise Amplifier with improved output level  
Note In the case of Low-noise Amplifier, R1 is not mounted.  
5
Data Sheet P11120EJ3V0DS00  
µPC1658G  
TYPICAL CHARACTERISTICS (TA = +25 °C, unless otherwise specified)  
POWER DISSIPATION vs. OPERATING  
AMBIENT TEMPERATURE  
CIRCUIT CURRENT vs. SUPPLY VOLTAGE  
800  
600  
50  
40  
Test circuit 3  
30  
20  
10  
400  
200  
0
Test circuit 1 and 2  
0
–50  
0
+50  
+100  
+150  
2
4
6
8
10  
12  
Operating Ambient Temperature TA (°C)  
Supply Voltage VCC (V)  
INSERTION POWER GAIN AND NOISE  
FIGURE vs. FREQUENCY  
INSERTION POWER GAIN vs. FREQUENCY  
VCC = 10 V  
50  
40  
30  
20  
10  
0
50  
40  
30  
20  
10  
0
VCC = 10 V  
Test Circuit 1  
RF = ∞  
Test Circuit 2  
GP  
RF = 470 Ω  
RF = 220 Ω  
10  
8
6
4
2
NF  
0
10 20  
50  
100 200  
500 1 000  
10 20  
50  
100 200  
500 1 000 2 000  
Frequency f (MHz)  
Frequency f (MHz)  
OUTPUT POWER OF EACH TONE AND THIRD  
ORDER INTERMODULATION DISTORTION vs.  
INPUT POWER OF EACH TONE  
NOISE FIGURE AND INSERTION POWER  
GAIN vs. FREQUENCY  
25  
20  
15  
10  
5
+40  
+20  
0
Test Circuit 3  
f1 = 500 MHz  
f2 = 501 MHz  
Test Circuit 3  
VCC = 8 V  
VCC = 6 V  
VCC = 8 V  
VCC = 6 V  
GP  
PO (each)  
–20  
VCC = 4 V  
VCC = 4 V  
–40  
–60  
IM3  
VCC = 6 V  
VCC = 8 V  
VCC = 4 V  
VCC = 6 V  
VCC = 4 V  
NF  
–80  
VCC = 8 V  
–100  
0
10 20  
50  
100 200  
500 1 000 2 000  
–60 –50 –40 –30 –20 –10  
0
+10  
Frequency f (MHz)  
Input Power of Each Tone Pin (each) (dBm)  
6
Data Sheet P11120EJ3V0DS00  
µPC1658G  
PACKAGE DIMENSIONS  
8 PIN PLASTIC SOP (225 mil) (Unit: mm)  
8
5
detail of lead end  
P
1
4
A
H
I
F
J
G
E
S
B
L
N
S
C
K
M
D
M
NOTE  
ITEM MILLIMETERS  
Each lead centerline is located within 0.12 mm of  
its true position (T.P.) at maximum material condition.  
A
5.2±0.2  
B
C
0.85 MAX.  
1.27 (T.P.)  
+0.08  
0.42  
D
0.07  
E
F
G
H
I
0.1±0.1  
1.57±0.2  
1.49  
6.5±0.3  
4.4±0.15  
1.1±0.2  
J
+0.08  
0.17  
K
0.07  
L
M
N
0.6±0.2  
0.12  
0.10  
+7°  
3°  
P
3°  
7
Data Sheet P11120EJ3V0DS00  
µPC1658G  
NOTES ON CORRECT USE  
(1) Observe precautions for handling because of electro-static sensitive devices.  
(2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation).  
All the ground pins must be connected together with wide ground pattern to decrease impedance difference.  
(3) Because the components will operate at high frequencies, apply chip capacitors and chip resistors with low  
parasitic inductance.  
(4) The DC capacitor must be attached to input pin and output pin.  
(5) The bypass capacitor should be attached to VCC line.  
(6) In case of improved output level type application circuit, observe precaution not to exceed the power  
dissipation rating, especially in VCC = 9 V or over.  
RECOMMENDED SOLDERING CONDITIONS  
This product should be soldered under the following recommended conditions. For soldering methods and  
conditions other than those recommended below, contact your NEC sales representative.  
Soldering Method  
Infrared Reflow  
Soldering Conditions  
Recommended Condition Symbol  
IR35-00-3  
Package peak temperature: 235 °C or below  
Time: 30 seconds or less (at 210 °C)  
Count: 3, Exposure limit: NoneNote  
VPS  
Package peak temperature: 215 °C or below  
Time: 40 seconds or less (at 200 °C)  
Count: 3, Exposure limit: NoneNote  
VP15-00-3  
WS60-00-1  
Wave Soldering  
Partial Heating  
Soldering bath temperature: 260 °C or below  
Time: 10 seconds or less  
Count: 1, Exposure limit: NoneNote  
Pin temperature: 300 °C  
Time: 3 seconds or less (per side of device)  
Exposure limit: NoneNote  
Note After opening the dry pack, keep it in a place below 25 °C and 65 % RH for the allowable storage period.  
Caution Do not use different soldering methods together (except for partial heating).  
For details of recommended soldering conditions for surface mounting, refer to information document  
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).  
8
Data Sheet P11120EJ3V0DS00  
µPC1658G  
[MEMO]  
9
Data Sheet P11120EJ3V0DS00  
µPC1658G  
[MEMO]  
10  
Data Sheet P11120EJ3V0DS00  
µPC1658G  
[MEMO]  
11  
Data Sheet P11120EJ3V0DS00  
µPC1658G  
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
No part of this document may be copied or reproduced in any form or by any means without the prior written  
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in  
this document.  
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property  
rights of third parties by or arising from use of a device described herein or any other liability arising from use  
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other  
intellectual property rights of NEC Corporation or others.  
Descriptions of circuits, software, and other related information in this document are provided for illustrative  
purposes in semiconductor product operation and application examples. The incorporation of these circuits,  
software, and information in the design of the customer's equipment shall be done under the full responsibility  
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third  
parties arising from the use of these circuits, software, and information.  
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,  
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or  
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety  
measures in its design, such as redundancy, fire-containment, and anti-failure features.  
NEC devices are classified into the following three quality grades:  
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a  
customer designated "quality assurance program" for a specific application. The recommended applications of  
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device  
before using it in a particular application.  
Standard: Computers, office equipment, communications equipment, test and measurement equipment,  
audio and visual equipment, home electronic appliances, machine tools, personal electronic  
equipment and industrial robots  
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster  
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed  
for life support)  
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life  
support systems or medical equipment for life support, etc.  
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.  
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,  
they should contact an NEC sales representative in advance.  
M7 98. 8  

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