74AHCT374D [NEXPERIA]

Octal D-type flip-flop; positive-edge trigger; 3-stateProduction;
74AHCT374D
型号: 74AHCT374D
厂家: Nexperia    Nexperia
描述:

Octal D-type flip-flop; positive-edge trigger; 3-stateProduction

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74AHC374; 74AHCT374  
Octal D-type flip-flop; positive edge-trigger; 3-state  
Rev. 03 — 12 June 2008  
Product data sheet  
1. General description  
The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard  
No. 7-A.  
The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separate D-type  
inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock input  
(CP) and an output enable input (OE) are common to all flip-flops.  
The eight flip-flops will store the state of their individual D inputs that meet the set-up and  
hold times requirements for the LOW-to-HIGH CP transition.  
When OE is LOW the content of the eight flip-flops is available at the outputs. When OE is  
HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does  
not affect the state of the flip-flops.  
2. Features  
I Balanced propagation delays  
I All inputs have Schmitt-trigger actions  
I Inputs accept voltages higher than VCC  
I Common 3-state output enable input  
I Input levels:  
N For 74AHC374: CMOS level  
N For 74AHCT374: TTL level  
I ESD protection:  
N HBM EIA/JESD22-A114E exceeds 2000 V  
N MM EIA/JESD22-A115-A exceeds 200 V  
N CDM EIA/JESD22-C101C exceeds 1000 V  
I Multiple package options  
I Specified from 40 °C to +85 °C and from 40 °C to +125 °C  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range  
Name  
Description  
Version  
74AHC374  
74AHC374D  
40 °C to +125 °C  
40 °C to +125 °C  
SO20  
plastic small outline package; 20 leads; body  
width 7.5 mm  
SOT163-1  
74AHC374PW  
TSSOP20  
plastic thin shrink small outline package; 20 leads; SOT360-1  
body width 4.4 mm  
74AHCT374  
74AHCT374D  
40 °C to +125 °C  
40 °C to +125 °C  
SO20  
plastic small outline package; 20 leads; body  
width 7.5 mm  
SOT163-1  
74AHCT374PW  
TSSOP20  
plastic thin shrink small outline package; 20 leads; SOT360-1  
body width 4.4 mm  
4. Functional diagram  
Q0  
Q1  
Q2  
Q3  
3
4
2
5
6
9
D0  
D1  
D2  
7
8
FF1  
to  
FF8  
D3  
D4  
3-STATE  
OUTPUTS  
13  
Q4 12  
Q5  
14 D5  
15  
17  
18  
Q6 16  
Q7 19  
D6  
D7  
CP  
OE  
11  
1
mna892  
Fig 1. Functional diagram  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
2 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
1
EN  
11  
C1  
11  
CP  
3
2
1D  
3
4
2
5
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
4
7
8
5
6
9
7
6
8
9
13  
14  
17  
18  
12  
15  
16  
19  
13  
14  
17  
18  
12  
15  
16  
19  
OE  
1
mna196  
mna891  
Fig 2. Logic symbol  
Fig 3. IEC logic symbol  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
CP  
FF7  
Q
D
Q
CP  
CP  
CP  
CP  
CP  
CP  
CP  
FF1  
FF2  
FF3  
FF4  
FF5  
FF6  
FF8  
CP  
OE  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
mna893  
Fig 4. Logic diagram  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
3 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
5. Pinning information  
5.1 Pinning  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
Q0  
V
CC  
Q7  
D7  
D6  
Q6  
Q5  
D5  
D4  
Q4  
CP  
3
D0  
4
D1  
5
Q1  
374  
6
Q2  
7
D2  
8
D3  
9
Q3  
10  
GND  
001aad040  
Fig 5. Pin configuration SO20 and TSSOP20  
5.2 Pin description  
Table 2.  
Symbol  
OE  
Q0  
Pin description  
Pin  
1
Description  
3-state output enable input (active LOW)  
3-state flip-flop output  
data input  
2
D0  
3
D1  
4
data input  
Q1  
5
3-state flip-flop output  
3-state flip-flop output  
data input  
Q2  
6
D2  
7
D3  
8
data input  
Q3  
9
3-state flip-flop output  
ground (0 V)  
GND  
CP  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
clock input (LOW-to-HIGH, edge triggered)  
3-state flip-flop output  
data input  
Q4  
D4  
D5  
data input  
Q5  
3-state flip-flop output  
3-state flip-flop output  
data input  
Q6  
D6  
D7  
data input  
Q7  
3-state flip-flop output  
supply voltage  
VCC  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
4 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
6. Functional description  
Table 3.  
Function table[1]  
Operating mode  
Control  
Input  
Internal  
flip-flop  
Output  
OE  
L
CP  
Dn  
Q0 to Q7  
Load and read register  
Load register and disable outputs  
l
L
L
L
h
l
H
L
H
Z
Z
H
H
h
H
[1] H = HIGH voltage level;  
h = HIGH voltage level one setup time prior to the LOW-to-HIGH CP transition;  
L = LOW voltage level;  
l = LOW voltage level one setup time prior to the LOW-to-HIGH CP transition;  
X = don’t care;  
= LOW-to-HIGH CP transition;  
Z = high-impedance OFF-state.  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
0.5  
0.5  
20  
20  
25  
-
Max  
+7.0  
+7.0  
-
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
V
[1]  
[1]  
IIK  
input clamping current  
output clamping current  
output current  
VI < 0.5 V  
mA  
mA  
mA  
mA  
mA  
°C  
IOK  
IO  
VO < 0.5 V or VO > VCC + 0.5 V  
VO = 0.5 V to (VCC + 0.5 V)  
+20  
+25  
+75  
-
ICC  
IGND  
Tstg  
Ptot  
supply current  
ground current  
75  
65  
-
storage temperature  
total power dissipation  
+150  
500  
[2]  
Tamb = 40 °C to +125 °C  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SO20 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.  
For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
5 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
8. Recommended operating conditions  
Table 5.  
Operating conditions  
Symbol Parameter  
74AHC374  
Conditions  
Min  
Typ  
Max  
Unit  
VCC  
VI  
supply voltage  
2.0  
5.0  
5.5  
V
input voltage  
0
-
5.5  
V
VO  
output voltage  
0
-
VCC  
+125  
100  
20  
V
Tamb  
t/V  
ambient temperature  
input transition rise and fall rate  
40  
+25  
°C  
ns/V  
ns/V  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
-
-
-
-
74AHCT374  
VCC  
VI  
supply voltage  
4.5  
0
5.0  
5.5  
V
input voltage  
-
5.5  
V
VO  
output voltage  
0
-
VCC  
+125  
20  
V
Tamb  
t/V  
ambient temperature  
input transition rise and fall rate  
40  
-
+25  
-
°C  
ns/V  
VCC = 4.5 V to 5.5 V  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 °C  
Min Typ  
40 °C to +85 °C 40 °C to +125 °C Unit  
Max  
Min  
Max  
Min  
Max  
74AHC374  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
1.5  
-
-
-
-
-
-
-
-
1.5  
-
-
1.5  
-
-
V
V
V
V
V
V
VCC = 3.0 V  
2.1  
2.1  
2.1  
VCC = 5.5 V  
3.85  
-
3.85  
-
3.85  
-
VIL  
LOW-level  
input voltage  
VCC = 2.0 V  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
-
-
-
0.5  
0.9  
1.65  
VCC = 3.0 V  
VCC = 5.5 V  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
1.9  
2.9  
4.4  
2.0  
3.0  
4.5  
-
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
1.9  
2.9  
-
-
-
-
-
V
V
V
V
V
4.4  
4.4  
IO = 4.0 mA; VCC = 3.0 V 2.58  
IO = 8.0 mA; VCC = 4.5 V 3.94  
VI = VIH or VIL  
2.48  
3.80  
2.40  
3.70  
-
VOL  
LOW-level  
output voltage  
IO = 50 µA; VCC = 2.0 V  
IO = 50 µA; VCC = 3.0 V  
IO = 50 µA; VCC = 4.5 V  
IO = 4.0 mA; VCC = 3.0 V  
IO = 8.0 mA; VCC = 4.5 V  
-
-
-
-
-
0
0
0
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
V
V
V
V
V
0.1  
0.1  
0.1  
0.36  
0.36  
0.44  
0.44  
0.55  
0.55  
-
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
6 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
Table 6.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions 25 °C 40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ  
Max  
Min  
Max  
Min  
Max  
II  
input leakage VI = 5.5 V or GND;  
-
-
0.1  
-
1.0  
-
2.0  
µA  
current  
VCC = 0 V to 5.5 V  
IOZ  
OFF-state  
VI = VIH or VIL;  
-
-
±0.25  
-
±2.5  
-
±10.0 µA  
output current VO = VCC or GND;  
CC = 5.5 V  
V
ICC  
CI  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
-
-
-
-
4.0  
10  
-
-
-
-
40  
10  
-
-
-
-
80  
10  
-
µA  
pF  
pF  
V
input  
VI = VCC or GND  
3
4
capacitance  
CO  
output  
capacitance  
74AHCT374  
VIH  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
-
-
-
2.0  
-
-
2.0  
-
-
V
V
VIL  
LOW-level  
0.8  
0.8  
0.8  
input voltage  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
4.4  
4.5  
-
-
-
4.4  
-
-
4.4  
-
-
V
V
IO = 8.0 mA  
3.94  
3.80  
3.70  
VOL  
LOW-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 50 µA  
-
-
-
0
-
0.1  
0.36  
0.1  
-
-
-
0.1  
0.44  
1.0  
-
-
-
0.1  
0.55  
2.0  
V
IO = 8.0 mA  
V
II  
input leakage VI = 5.5 V or GND;  
-
µA  
current  
VCC = 0 V to 5.5 V  
IOZ  
OFF-state  
VI = VIH or VIL;  
-
-
±0.25  
-
±2.5  
-
±10.0 µA  
output current VO = VCC or GND per input  
pin; other inputs at  
V
V
CC or GND; IO = 0 A;  
CC = 5.5 V  
ICC  
supply current VI = VCC or GND; IO = 0 A;  
CC = 5.5 V  
-
-
-
-
4.0  
-
-
40  
-
-
80  
µA  
V
ICC  
additional  
per input pin;  
1.35  
1.5  
1.5  
mA  
supply current VI = VCC 2.1 V; other pins  
at VCC or GND; IO = 0 A;  
VCC = 4.5 V to 5.5 V  
CI  
input  
capacitance  
VI = VCC or GND  
-
-
3
4
10  
-
-
-
10  
-
-
-
10  
-
pF  
pF  
CO  
output  
capacitance  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
7 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.  
Symbol Parameter Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ[1] Max  
Min  
Max  
Min  
Max  
74AHC374  
[2]  
tpd  
propagation CP to Qn; see Figure 6 and  
delay Figure 8  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
CL = 50 pF  
-
-
6.4 12.7  
8.4 16.2  
1.0  
1.0  
15.0  
18.5  
1.0  
1.0  
16.0  
20.5  
ns  
ns  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
4.4  
8.1  
1.0  
1.0  
9.5  
1.0  
1.0  
10.0  
12.5  
ns  
ns  
CL = 50 pF  
5.7 10.1  
11.5  
[3]  
ten  
enable time OE to Qn; see Figure 7  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
5.5 11.0  
7.3 14.5  
1.0  
1.0  
13.0  
16.5  
1.0  
1.0  
14.0  
18.0  
ns  
ns  
CL = 50 pF  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
3.9  
5.2  
7.6  
9.6  
1.0  
1.0  
9.0  
1.0  
1.0  
9.5  
ns  
ns  
CL = 50 pF  
11.0  
12.0  
[4]  
tdis  
disable time OE to Qn; see Figure 7  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
-
-
5.6 10.5  
9.4 14.0  
1.0  
1.0  
12.5  
16.0  
1.0  
1.0  
13.0  
17.5  
ns  
ns  
CL = 50 pF  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
-
-
4.2  
6.4  
6.8  
8.8  
1.0  
1.0  
8.0  
1.0  
1.0  
8.5  
ns  
ns  
CL = 50 pF  
10.0  
11.0  
fmax  
maximum  
frequency  
see Figure 6  
VCC = 3.0 V to 3.6 V  
CL = 15 pF  
80  
55  
130  
85  
-
-
70  
50  
-
-
70  
50  
-
-
MHz  
MHz  
CL = 50 pF  
VCC = 4.5 V to 5.5 V  
CL = 15 pF  
130  
85  
185  
120  
-
-
110  
75  
-
-
110  
75  
-
-
MHz  
MHz  
CL = 50 pF  
tW  
pulse width CP HIGH or LOW;  
see Figure 6  
VCC = 3.0 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
5.0  
5.0  
-
-
-
-
5.5  
5.0  
-
-
5.5  
5.0  
-
-
ns  
ns  
tsu  
set-up time Dn to CP; see Figure 8  
VCC = 3.0 V to 3.6 V  
4.5  
3.0  
-
-
-
-
4.0  
3.0  
-
-
4.0  
3.0  
-
-
ns  
ns  
VCC = 4.5 V to 5.5 V  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
8 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.  
Symbol Parameter Conditions  
25 °C  
40 °C to +85 °C 40 °C to +125 °C Unit  
Min Typ[1] Max  
Min  
Max  
Min  
Max  
th  
hold time  
Dn to CP; see Figure 8  
VCC = 3.0 V to 3.6 V  
2.0  
2.0  
-
-
-
-
-
-
2.0  
2.0  
-
-
-
-
2.0  
2.0  
-
-
-
-
ns  
ns  
pF  
VCC = 4.5 V to 5.5 V  
[5]  
[2]  
CPD  
power  
dissipation  
capacitance  
fi = 1 MHz; VI = GND to VCC  
10  
74AHCT374; VCC = 4.5 V to 5.5 V  
tpd  
propagation CP to Qn; see Figure 6 and  
delay Figure 8  
CL = 15 pF  
CL = 50 pF  
-
-
4.3  
9.4  
1.0  
1.0  
10.5  
11.5  
1.0  
1.0  
12.0  
13.0  
ns  
ns  
5.6 10.4  
[3]  
[4]  
ten  
enable time OE to Qn; see Figure 7  
CL = 15 pF  
-
-
3.5 10.2  
4.8 11.2  
1.0  
1.0  
11.5  
12.5  
1.0  
1.0  
13.0  
14.0  
ns  
ns  
CL = 50 pF  
tdis  
fmax  
tW  
disable time OE to Qn; see Figure 7  
CL = 15 pF  
-
-
3.6 10.2  
5.7 11.2  
1.0  
1.0  
11.0  
12.0  
1.0  
1.0  
13.0  
14.0  
ns  
ns  
CL = 50 pF  
maximum  
frequency  
see Figure 6  
CL = 15 pF  
CL = 50 pF  
90  
85  
140  
130  
-
-
-
-
80  
75  
-
-
-
80  
75  
-
-
-
MHz  
MHz  
ns  
pulse width CP HIGH or LOW;  
see Figure 6  
6.5  
6.5  
6.5  
tsu  
th  
set-up time Dn to CP; see Figure 8  
2.5  
2.5  
-
-
-
-
-
-
2.5  
2.5  
-
-
-
-
2.5  
2.5  
-
-
-
-
ns  
ns  
pF  
hold time  
Dn to CP; see Figure 8  
[5]  
CPD  
power  
fi = 1 MHz; VI = GND to VCC  
12  
dissipation  
capacitance  
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).  
[2] tpd is the same as tPLH and tPHL  
[3] ten is the same as tPZH and tPZL  
[4] tdis is the same as tPHZ and tPLZ  
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
9 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
10.1 Waveforms  
1/f  
max  
V
I
CP input  
V
t
M
GND  
t
W
t
PHL  
PLH  
V
OH  
V
Qn output  
M
001aac426  
V
OL  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 6. Clock pulse width, maximum frequency and input to output propagation delays  
V
I
OE input  
V
M
t
GND  
t
PLZ  
PZL  
V
CC  
Qn output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
Qn output  
V
HIGH-to-OFF  
OFF-to-HIGH  
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
mna813  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 7. Enable and disable times  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
10 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
V
I
V
CP input  
M
GND  
t
t
su  
su  
t
t
h
h
V
I
V
M
Dn input  
GND  
V
OH  
V
Qn output  
M
V
OL  
mna202  
Measurement points are given in Table 8.  
The shaded areas indicate when the input is permitted to change for predictable output performance.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 8. Data set-up and hold times  
Table 8.  
Type  
Measurement points  
Input  
Output  
VM  
VM  
VX  
VY  
74AHC374  
0.5 × VCC  
1.5 V  
0.5 × VCC  
0.5 × VCC  
VOL + 0.3 V  
VOL + 0.3 V  
V
OH 0.3 V  
74AHCT374  
VOH 0.3 V  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
11 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
CC  
V
CC  
V
V
O
I
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 9.  
Definitions test circuit:  
RT = termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = load capacitance including jig and probe capacitance.  
RL = load resistance.  
S1 = test selection switch.  
Fig 9. Test circuitry for measuring switching times  
Table 9.  
Type  
Test data  
Input  
Load  
S1 position  
tPHL, tPLH  
open  
VI  
tr, tf  
CL  
RL  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
VCC  
74AHC374  
VCC  
3.0 V  
3.0 ns  
3.0 ns  
15 pF, 50 pF  
15 pF, 50 pF  
1 kΩ  
1 kΩ  
74AHCT374  
open  
GND  
VCC  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
12 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
11. Package outline  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
D
E
A
X
c
y
H
E
v
M
A
Z
20  
11  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
10  
w
detail X  
e
M
b
p
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
max.  
(1)  
(1)  
(1)  
UNIT  
mm  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3  
0.1  
2.45  
2.25  
0.49  
0.36  
0.32  
0.23  
13.0  
12.6  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.1  
1.0  
0.9  
0.4  
2.65  
0.1  
0.25  
0.01  
1.27  
0.05  
1.4  
0.25 0.25  
0.1  
8o  
0o  
0.012 0.096  
0.004 0.089  
0.019 0.013 0.51  
0.014 0.009 0.49  
0.30  
0.29  
0.419  
0.394  
0.043 0.043  
0.016 0.039  
0.035  
0.016  
inches  
0.055  
0.01 0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT163-1  
075E04  
MS-013  
Fig 10. Package outline SOT163-1 (SO20)  
74AHC_AHCT374_3  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
13 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
D
E
A
X
c
H
v
M
A
y
E
Z
11  
20  
Q
A
2
(A )  
3
A
A
1
pin 1 index  
θ
L
p
L
1
10  
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
6.6  
6.4  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.5  
0.2  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT360-1  
MO-153  
Fig 11. Package outline SOT360-1 (TSSOP20)  
74AHC_AHCT374_3  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
14 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
12. Abbreviations  
Table 10. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
CMOS  
DUT  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
HBM  
Human Body Model  
LSTTL  
MM  
Low-power Schottky Transistor-Transistor Logic  
Machine Model  
13. Revision history  
Table 11. Revision history  
Document ID  
Release date  
20080612  
Data sheet status  
Change notice  
Supersedes  
74AHC_AHCT374_3  
Modifications:  
Product data sheet  
-
74AHC_AHCT374_2  
The format of this data sheet has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
Legal texts have been adapted to the new company name where appropriate.  
Table 6: the conditions for input leakage current have been changed.  
74AHC_AHCT374_2  
74AHC_AHCT374_1  
19990928  
Product specification  
-
74AHC_AHCT374_1  
19981211  
Product specification  
-
-
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
15 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
14. Legal information  
14.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nexperia.com.  
malfunction of a Nexperia product can reasonably be expected  
14.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. Nexperia accepts no liability for inclusion and/or use of  
Nexperia products in such equipment or applications and  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
therefore such inclusion and/or use is at the customer’s own risk.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) may cause permanent  
damage to the device. Limiting values are stress ratings only and operation of  
the device at these or any other conditions above those given in the  
Characteristics sections of this document is not implied. Exposure to limiting  
values for extended periods may affect device reliability.  
Terms and conditions of sale — Nexperia products are sold  
subject to the general terms and conditions of commercial sale, as published  
at http://www.nexperia.com/profile/terms, including those pertaining to warranty,  
intellectual property rights infringement and limitation of liability, unless  
explicitly otherwise agreed to in writing by Nexperia. In case of  
any inconsistency or conflict between information in this document and such  
terms and conditions, the latter will prevail.  
14.3 Disclaimers  
General — Information in this document is believed to be accurate and  
reliable.However,Nexperiadoesnotgiveanyrepresentationsor  
warranties, expressed or implied, as to the accuracy or completeness of such  
information and shall have no liability for the consequences of use of such  
information.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Right to make changes — Nexperiareservestherighttomake  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
14.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
Suitability for use — Nexperia products are not designed,  
authorized or warranted to be suitable for use in medical, military, aircraft,  
space or life support equipment, nor in applications where failure or  
15. Contact information  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
©
74AHC_AHCT374_3  
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 03 — 12 June 2008  
16 of 17  
74AHC374; 74AHCT374  
Nexperia  
Octal D-type flip-flop; positive edge-trigger; 3-state  
16. Contents  
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
6
Functional description . . . . . . . . . . . . . . . . . . . 5  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Recommended operating conditions. . . . . . . . 6  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15  
7
8
9
10  
10.1  
11  
12  
13  
14  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
14.1  
14.2  
14.3  
14.4  
15  
16  
Contact information. . . . . . . . . . . . . . . . . . . . . 16  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 12 June 2008  

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