74ALVC164245-Q100 [NEXPERIA]

16-bit dual supply translating transceiver 3-state;
74ALVC164245-Q100
型号: 74ALVC164245-Q100
厂家: Nexperia    Nexperia
描述:

16-bit dual supply translating transceiver 3-state

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74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
Rev. 3 — 9 April 2019  
Product data sheet  
1. General description  
The 74ALVC164245-Q100 is a high-performance, low-power, low-voltage, Si-gate CMOS device,  
superior to most advanced CMOS compatible TTL families.  
The 74ALVC164245-Q100 is a 16-bit (dual octal) dual supply translating transceiver featuring  
non-inverting 3-state bus compatible outputs in both send and receive directions. It is designed to  
interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment.  
This device can be used as two 8-bit transceivers or one 16-bit transceiver.  
The direction control inputs (1DIR and 2DIR) determine the direction of the data flow. nDIR (active  
HIGH) enables data from nAn ports to nBn ports. nDIR (active LOW) enables data from nBn ports  
to nAn ports. The output enable inputs (1OE and 2OE), when HIGH, disable both nAn and nBn  
ports by placing them in a high-impedance OFF-state. Pins nAn, nOE and nDIR are referenced to  
VCC(A) and pins nBn are referenced to VCC(B)  
.
In suspend mode, when one of the supply voltages is zero, there is no current flow from the  
non-zero supply towards the zero supply. The nAn outputs must be set 3-state and the voltage on  
the A-bus must be smaller than Vdiode (typical 0.7 V). VCC(B) ≥ VCC(A) (except in suspend mode).  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range:  
3 V port (VCC(A)): 1.5 V to 3.6 V  
5 V port (VCC(B)): 1.5 V to 5.5 V  
CMOS low power consumption  
Direct interface with TTL levels  
Control inputs voltage range from 2.7 V to 5.5 V  
Inputs accept voltages up to 5.5 V  
High-impedance outputs when VCC(A) or VCC(B) = 0 V  
Complies with JEDEC standard JESD8-B/JESD36  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74ALVC164245DGG-Q100  
-40 °C to +125 °C  
TSSOP48 plastic thin shrink small outline package;  
48 leads; body width 6.1 mm  
SOT362-1  
4. Functional diagram  
2DIR  
1DIR  
2OE  
2B0  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
1OE  
1B0  
2A0  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
1A0  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B7  
001aaa789  
Fig. 1. Logic symbol  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
2 / 14  
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
1OE  
G3  
1DIR  
3EN1[BA]  
3EN2[AB]  
G6  
2OE  
6EN4[BA]  
6EN5[AB]  
2DIR  
1A0  
1B0  
1
2
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
2B0  
2A0  
4
5
2A1  
2A2  
2A3  
2A4  
2B1  
2B2  
2B3  
2B4  
2B5  
2B6  
2B7  
2A5  
2A6  
2A7  
001aaa790  
Fig. 2. IEC logic symbol  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
3 / 14  
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
5. Pinning information  
5.1. Pinning  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B0  
1B1  
GND  
1B2  
1B3  
1OE  
1A0  
1A1  
GND  
1A2  
1A3  
2
3
4
5
6
7
V
V
CC(A)  
CC(B)  
1B4  
8
1A4  
1A5  
GND  
1A6  
1A7  
2A0  
2A1  
GND  
2A2  
2A3  
9
1B5  
GND  
1B6  
1B7  
2B0  
2B1  
GND  
2B2  
2B3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
74ALVC164245  
V
V
CC(A)  
CC(B)  
2B4  
2A4  
2A5  
GND  
2A6  
2A7  
2OE  
2B5  
GND  
2B6  
2B7  
2DIR  
001aab037  
Fig. 3. Pin configuration SOT362-1 (TSSOP48)  
5.2. Pin description  
Table 2. Pin description  
Symbol  
Pin  
Description  
1DIR, 2DIR  
1, 24  
direction control input  
data input/output  
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7  
2, 3, 5, 6, 8, 9, 11, 12  
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7  
13, 14, 16, 17, 19, 20, 22, 23  
4, 10, 15, 21, 28, 34, 39, 45  
7, 18  
data input/output  
GND  
ground (0 V)  
VCC(B)  
supply voltage B (5 V bus)  
output enable input (active LOW)  
data input/output  
1OE, 2OE  
48, 25  
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7  
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7  
VCC(A)  
47, 46, 44, 43, 41, 40, 38, 37  
36, 35, 33, 32, 30, 29, 27, 26  
31, 42  
data input/output  
supply voltage A (3 V bus)  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
4 / 14  
 
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
6. Functional description  
Table 3. Function table  
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
Inputs  
Outputs  
nAn  
nOE  
L
nDIR  
nBn  
L
nAn = nBn  
inputs  
Z
inputs  
nBn = nAn  
Z
L
H
X
H
7. Limiting values  
Table 4. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC(B)  
VCC(A)  
IIK  
Parameter  
Conditions  
VCC(B) ≥ VCC(A)  
VCC(B) ≥ VCC(A)  
VI < 0 V  
Min  
-0.5  
-0.5  
-50  
-0.5  
-0.5  
-
Max  
+6.0  
+4.6  
-
Unit  
V
supply voltage B  
supply voltage A  
input clamping current  
input voltage  
V
mA  
V
VI  
[1]  
+6.0  
VCC + 0.5  
±50  
VI/O  
input/output voltage  
output clamping current  
output voltage  
V
IOK  
VO > VCC or VO < 0 V  
output HIGH or LOW  
output 3-state  
mA  
V
VO  
[1]  
[1]  
-0.5  
-0.5  
-
VCC + 0.5  
+6.0  
±50  
V
IO(sink/source) output sink or source current  
VO = 0 V to VCC  
mA  
mA  
mA  
°C  
°C  
mW  
ICC  
IGND  
Tstg  
Tj  
supply current  
-
100  
ground current  
-100  
-65  
-
-
storage temperature  
junction temperature  
total power dissipation  
+150  
+150  
500  
[2]  
[3]  
Ptot  
Tamb = -40 °C to +125 °C  
-
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability.  
[3] Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
5 / 14  
 
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
8. Recommended operating conditions  
Table 5. Recommended operating conditions  
Symbol Parameter  
Conditions  
Min  
Typ  
Max Unit  
VCC(B) supply voltage B  
VCC(B) ≥ VCC(A)  
maximum speed performance  
low-voltage applications  
VCC(B) ≥ VCC(A)  
2.7  
1.5  
-
-
5.5  
5.5  
V
V
VCC(A) supply voltage A  
maximum speed performance  
low-voltage applications  
control inputs: nOE and nDIR  
nAn port  
2.7  
1.5  
0
-
-
-
-
-
-
-
-
-
-
-
-
3.6  
3.6  
V
V
V
V
V
V
V
VI  
input voltage  
5.5  
VI/O  
input/output voltage  
0
VCC(A)  
VCC(B)  
VCC(A)  
VCC(B)  
nBn port  
0
VO  
output voltage  
nAn port  
0
nBn port  
0
Tamb  
ambient temperature  
-40  
0
+125 °C  
Δt/ΔV  
input transition rise and fall rate  
VCC(A) = 2.7 V to 3.0 V  
VCC(A) = 3.0 V to 3.6 V  
VCC(B) = 3.0 V to 4.5 V  
VCC(B) = 4.5 V to 5.5 V  
20  
10  
20  
10  
ns/V  
0
ns/V  
ns/V  
ns/V  
0
0
9. Static characteristics  
Table 6. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
VIH  
HIGH-level  
nBn port  
input voltage  
VCC(B) = 3.0 V to 5.5 V  
[2]  
[2]  
2.0  
-
-
2.0  
-
V
nAn port, nOE and nDIR  
VCC(A) = 3.0 V to 3.6 V  
VCC(A) = 2.3 V to 2.7 V  
nBn port  
2.0  
1.7  
-
-
-
-
2.0  
1.7  
-
-
V
V
VIL  
LOW-level  
input voltage  
VCC(B) = 4.5 V to 5.5 V  
VCC(B) = 3.0 V to 3.6 V  
nAn port, nOE and nDIR  
VCC(A) = 3.0 V to 3.6 V  
VCC(A) = 2.3 V to 2.7 V  
[2]  
[2]  
-
-
-
-
0.8  
0.7  
-
-
0.8  
0.7  
V
V
-
-
-
-
0.8  
0.7  
-
-
0.8  
0.7  
V
V
[2]  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
6 / 14  
 
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
-40 °C to +125 °C Unit  
Min  
Typ [1]  
Max  
Min  
Max  
VOH  
HIGH-level  
nBn port; VI = VIH or VIL  
output voltage  
IO = -24 mA; VCC(B) = 4.5 V  
IO = -12 mA; VCC(B) = 4.5 V  
IO = -18 mA; VCC(B) = 3.0 V  
IO = -100 μA; VCC(B) = 3.0 V  
nAn port; VI = VIH or VIL  
VCC(B) - 0.8  
VCC(B) - 0.5  
VCC(B) - 0.8  
-
-
-
-
-
-
-
VCC(B) - 1.2  
VCC(B) - 0.8  
VCC(B) - 1.0  
VCC(B) - 0.3  
-
-
-
-
V
V
V
V
VCC(B) - 0.2 VCC(B)  
IO = -24 mA; VCC(A) = 3.0 V  
IO = -100 μA; VCC(A) = 3.0 V  
IO = -12 mA; VCC(A) = 2.7 V  
IO = -8 mA; VCC(A) = 2.3 V  
IO = -100 μA; VCC(A) = 2.3 V  
nBn port; VI = VIH or VIL  
VCC(A) - 0.7  
VCC(A) - 0.2  
VCC(A) - 0.5  
VCC(A) - 0.6  
-
-
-
-
-
-
-
-
-
VCC(A) - 1.0  
VCC(A) - 0.3  
VCC(A) - 0.8  
VCC(A) - 0.6  
VCC(A) - 0.3  
-
-
-
-
-
V
V
V
V
V
VCC(A) - 0.2 VCC(A)  
VOL  
LOW-level  
output voltage  
IO = 24 mA; VCC(B) = 4.5 V  
IO = 12 mA; VCC(B) = 4.5 V  
IO = 100 μA; VCC(B) = 4.5 V  
IO = 18 mA; VCC(B) = 3.0 V  
IO = 100 μA; VCC(B) = 3.0 V  
nAn port; VI = VIH or VIL  
-
-
-
-
-
-
-
-
-
-
0.55  
0.40  
0.20  
0.55  
0.20  
-
-
-
-
-
0.80  
0.60  
0.30  
0.80  
0.30  
V
V
V
V
V
IO = 24 mA; VCC(A) = 3.0 V  
IO = 100 μA; VCC(A) = 3.0 V  
IO = 12 mA; VCC(A) = 2.7 V  
IO = 12 mA; VCC(A) = 2.3 V  
IO = 100 μA; VCC(A) = 2.3 V  
-
-
-
-
-
-
-
0.55  
0.20  
0.40  
0.60  
0.20  
±5  
-
-
-
-
-
-
0.80  
0.30  
0.60  
0.60  
0.20  
V
V
V
V
V
-
-
-
-
II  
input leakage VI = 5.5 V or GND  
current  
±0.1  
±10 μA  
IOZ  
OFF-state  
VI = VIH or VIL; VO = VCC or GND [3]  
-
±0.1  
±10  
-
±20 μA  
output current  
ICC  
supply current VI = VCC or GND; IO = 0 A  
-
-
0.1  
5
40  
-
-
80  
μA  
ΔICC  
additional  
per control pin; VI = VCC - 0.6 V; [4]  
500  
5000 μA  
supply current IO = 0 A  
CI  
input  
capacitance  
-
-
4.0  
5.0  
-
-
-
-
-
-
pF  
pF  
CI/O  
input/output  
capacitance  
nAn and nBn port  
[1] All typical values are measured at VCC(B) = 5.0 V, VCC(A) = 3.3 V and Tamb = 25 °C.  
[2] If VCC(A) < 2.7 V, the switching levels at all inputs are not TTL compatible.  
[3] For transceivers, the parameter IOZ includes the input leakage current.  
[4] VCC(A) = 2.7 V to 3.6 V: other inputs at VCC(A) or GND; VCC(B) = 4.5 V to 5.5 V: other inputs at VCC(B) or GND.  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
7 / 14  
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
10. Dynamic characteristics  
Table 7. Dynamic characteristics  
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; for test circuit see Fig. 6.  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
Typ [1]  
-40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
tpd  
ten  
tdis  
propagation  
delay  
nAn to nBn; see Fig. 4  
[2]  
[2]  
[3]  
[3]  
[4]  
[4]  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
1.5  
1.0  
1.0  
3.3  
3.0  
2.9  
7.6  
5.9  
5.8  
1.5  
1.0  
1.0  
9.5  
7.5  
7.5  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
nBn to nAn; see Fig. 4  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
1.0  
1.0  
1.2  
3.0  
4.3  
2.5  
7.6  
6.7  
5.8  
1.0  
1.0  
1.2  
9.5  
8.5  
7.5  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
enable time  
nOE to nBn; see Fig. 5  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
1.5  
1.5  
1.0  
4.1  
3.6  
3.2  
11.5  
9.2  
1.5  
1.5  
1.0  
14.5  
11.5  
12.0  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
8.9  
nOE to nAn; see Fig. 5  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
1.5  
1.5  
1.0  
4.6  
4.3  
3.2  
12.3  
9.3  
1.5  
1.5  
1.0  
15.5  
12.0  
11.5  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
8.9  
disable time  
nOE to nBn; see Fig. 5  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
2.0  
2.5  
2.1  
2.7  
4.6  
4.9  
10.5  
9.0  
2.0  
2.5  
2.1  
13.5  
11.5  
11.0  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
8.6  
nOE to nAn; see Fig. 5  
VCC(A) = 2.3 V to 2.7 V;  
VCC(B) = 3.0 V to 3.6 V  
1.0  
1.5  
2.0  
2.7  
3.5  
3.2  
9.3  
9.0  
8.6  
1.0  
1.5  
2.0  
12.0  
11.5  
11.0  
ns  
ns  
ns  
VCC(A) = 2.7 V;  
VCC(B) = 4.5 V to 5.5 V  
VCC(A) = 3.0 V to 3.6 V;  
VCC(B) = 4.5 V to 5.5 V  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
8 / 14  
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
Symbol Parameter  
Conditions  
-40 °C to +85 °C  
Typ [1]  
-40 °C to +125 °C Unit  
Min  
Max  
Min  
Max  
CPD  
power  
dissipation  
capacitance  
5 V port: nAn to nBn;  
VI = GND to VCC; VCC(B) = 5 V;  
VCC(A) = 3.3 V  
[5]  
[5]  
outputs enabled  
outputs disabled  
-
-
30  
15  
-
-
-
-
-
-
pF  
pF  
3 V port: nBn to nAn;  
VI = GND to VCC; VCC(B) = 5 V;  
VCC(A) = 3.3 V  
outputs enabled  
outputs disabled  
-
-
40  
5
-
-
-
-
-
-
pF  
pF  
[1] All typical values are measured at nominal voltage for VCC(B) and VCC(A) and at Tamb = 25 °C.  
[2] tpd is the same as tPLH and tPHL  
[3] ten is the same as tPZL and tPZH  
[4] tdis is the same as tPLZ and tPHZ  
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of outputs.  
10.1. Waveforms and test circuit  
V
I
nAn, nBn  
input  
V
M
GND  
t
t
PHL  
PLH  
V
OH  
nBn, nAn  
output  
V
M
001aaa792  
V
OL  
Measurement points are given in Table 8.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 4. Input (nAn, nBn) to output (nBn, nAn) propagation delays  
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74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
9 / 14  
 
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
V
I
nOE input  
V
M
GND  
t
t
PLZ  
PZL  
V
CC  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
mna362  
Measurement points are given in Table 8.  
VOL and VOH are typical output voltage levels that occur with output load.  
Fig. 5. 3-state enable and disable times  
Table 8. Measurement points  
Direction  
Supply voltage  
VCC(A) VCC(B)  
Input  
VI  
Output  
VM  
VM  
VX  
VY  
nAn port to nBn port 2.3 V to 2.7 V 2.7 V to 3.6 V VCC(A) 0.5 × VCC(A) 1.5 V  
VOL(B) + 0.3 V VOH(B) - 0.3 V  
0.5 × VCC(A) VOL(A) + 0.15 V VOH(A) - 0.15 V  
0.5 × VCC(B) 0.2 × VCC(B) 0.8 × VCC(B)  
1.5 V VOL(A) + 0.3 V VOH(A) - 0.3 V  
nBn port to nAn port 2.3 V to 2.7 V 2.7 V to 3.6 V 2.7 V  
nAn port to nBn port 2.7 V to 3.6 V 4.5 V to 5.5 V 2.7 V  
nBn port to nAn port 2.7 V to 3.6 V 4.5 V to 5.5 V 3.0 V  
1.5 V  
1.5 V  
1.5 V  
V
EXT  
V
CC  
R
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
mna616  
Test data is given in Table 9.  
Definitions for test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
VEXT = External voltage for measuring switching times.  
Fig. 6. Test circuit for measuring switching times  
Table 9. Test data  
Direction  
Supply voltage  
VCC(A)  
Load  
CL  
VEXT  
VCC(B)  
RL  
tPLH, tPHL  
open  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
2 × VCC  
6.0 V  
nAn port to nBn port  
nBn port to nAn port  
nAn port to nBn port  
nBn port to nAn port  
2.3 V to 2.7 V 2.7 V to 3.6 V 50 pF  
2.3 V to 2.7 V 2.7 V to 3.6 V 50 pF  
2.7 V to 3.6 V 4.5 V to 5.5 V 50 pF  
2.7 V to 3.6 V 4.5 V to 5.5 V 50 pF  
500 Ω  
500 Ω  
500 Ω  
500 Ω  
open  
GND  
open  
GND  
2 × VCC  
6.0 V  
open  
GND  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
10 / 14  
 
 
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
11. Package outline  
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm  
SOT362-1  
D
E
A
X
c
v
A
H
E
y
Z
48  
25  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
24  
detail X  
w
b
p
e
0
5 mm  
2.5  
scale  
Dimensions (mm are the original dimensions)  
Unit  
max  
(1)  
(2)  
A
A
A
A
b
c
D
E
e
H
L
1
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
°
8
0
0.15 1.05  
0.05 0.85  
0.28 0.2 12.6 6.2  
0.17 0.1 12.4 6.0  
8.3  
7.9  
0.8 0.50  
0.4 0.35  
0.8  
0.4  
mm nom 1.2  
min  
0.25  
0.5  
0.25 0.08 0.1  
°
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
sot362-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
03-02-19  
13-08-05  
SOT362-1  
MO-153  
Fig. 7. Package outline SOT362-1 (TSSOP48)  
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
11 / 14  
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
12. Abbreviations  
Table 10. Abbreviations  
Acronym  
Description  
CMOS  
DUT  
ESD  
HBM  
MIL  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Military  
MM  
Machine Model  
TTL  
Transistor-Transistor Logic  
13. Revision history  
Table 11. Revision history  
Document ID  
Release date  
20190409  
Data sheet status  
Change notice Supersedes  
- 74ALVC164245_Q100 v.2  
74ALVC164245_Q100 v.3  
Modifications:  
Product data sheet  
Table 6: Typo corrected for VOL(max) at VCC(B) = 4.5 V.  
20181112 Product data sheet  
74ALVC164245_Q100 v.2  
Modifications:  
-
74ALVC164245_Q100 v.1  
The format of this data sheet has been redesigned to comply with the identity guidelines  
of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Package outline drawing SOT362-1 updated.  
74ALVC164245_Q100 v.1  
20130514  
Product data sheet  
-
-
©
74ALVC164245_Q100  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
12 / 14  
 
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
equipment, nor in applications where failure or malfunction of an Nexperia  
product can reasonably be expected to result in personal injury, death or  
severe property or environmental damage. Nexperia and its suppliers accept  
no liability for inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
14. Legal information  
Data sheet status  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Document status Product  
Definition  
[1][2]  
status [3]  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
Definitions  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
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sold subject to the general terms and conditions of commercial sale, as  
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terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Disclaimers  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
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Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
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of Nexperia.  
Translations — A non-English (translated) version of a document is for  
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between the translated and English versions.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
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Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
Notwithstanding any damages that customer might incur for any reason  
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Terms and conditions of commercial sale of Nexperia.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Suitability for use in automotive applications — This Nexperia product  
has been qualified for use in automotive applications. Unless otherwise  
agreed in writing, the product is not designed, authorized or warranted to  
be suitable for use in life support, life-critical or safety-critical systems or  
©
74ALVC164245_Q100  
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Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
13 / 14  
 
Nexperia  
74ALVC164245-Q100  
16-bit dual supply translating transceiver; 3-state  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Functional diagram.......................................................2  
5. Pinning information......................................................4  
5.1. Pinning.........................................................................4  
5.2. Pin description.............................................................4  
6. Functional description................................................. 5  
7. Limiting values............................................................. 5  
8. Recommended operating conditions..........................6  
9. Static characteristics....................................................6  
10. Dynamic characteristics............................................ 8  
10.1. Waveforms and test circuit........................................ 9  
11. Package outline........................................................ 11  
12. Abbreviations............................................................12  
13. Revision history........................................................12  
14. Legal information......................................................13  
© Nexperia B.V. 2019. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 9 April 2019  
©
74ALVC164245_Q100  
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Nexperia B.V. 2019. All rights reserved  
Product data sheet  
Rev. 3 — 9 April 2019  
14 / 14  

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