74ALVCH16543DGG [NEXPERIA]
16-bit D-type registered transceiver; 3-stateProduction;
| 型号： | 74ALVCH16543DGG |
| 厂家： | 
Nexperia |
| 描述： | 16-bit D-type registered transceiver; 3-stateProduction 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总17页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74ALVCH16543
16-bit D-type registered transceiver; 3-state
Rev. 3 — 15 December 2017
Product data sheet
1 General description
The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two
sets of D-type latches for temporary storage of the data flow in either direction.
Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are
provided for each register to permit independent control in either direction of the data
flow.
The 74ALVCH16543 contains two sections each consisting of two sets of eight D-type
latches with separate inputs and controls for each set. For data flow from A to B,
for example, the A-to-B enable (nEAB) inputs must be LOW in order to enter
data from nA0 to nA7, or take data from nB0 to nB7, as indicated in the function
table. With nEAB LOW, a LOW signal on the A-to-B latch enable (nLEAB) input
makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the
nLEAB signal stores the A data into the latches. With nEAB and nOEAB both LOW,
the 3-state B output buffers are active and display the data present at the output of
the A latches. Similarly, the nEBA, nLEBA and nOEBA signals control the data flow
from B-to-A.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic
level.
2 Features and benefits
• CMOS low power consumption
• Direct interface with TTL levels
• MULTIBYTE flow-through standard pin-out architecture
• Back-to-back registers for storage
• Output drive capability 50 Ω transmission lines at 85 °C
• All data inputs have bushold
• Low inductance multiple VCC and GND pins for minimize noise and ground bounce
• Current drive ±24 mA at VCC = 3.0 V.
• 3-state non-inverting outputs for bus oriented applications
• Complies with JEDEC standards:
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
– CDM JESD22-C101E exceeds 1000 V
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
3 Ordering information
Table 1.ꢀOrdering information
Type number
Package
Temperature range Name
Description
Version
74ALVCH16543DGG -40 °C to +85 °C
TSSOP56
plastic thin shrink small outline package;
56 leads; body width 6.1 mm
SOT364-1
4 Functional diagram
1A0
5
1B0
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
52
15
16
17
19
20
21
23
24
42
41
40
38
37
36
34
33
1A1
1B1
1B2
1B3
1B4
1B5
1B6
1B7
6
51
49
48
47
45
44
43
1A2
8
1A3
9
1A4
10
1A5
12
1A6
13
1A7
14
1OEAB
1
2OEAB
2OEBA
2EAB
28
29
26
31
27
30
1OEBA
56
1EAB
3
1EBA
2EBA
54
1LEAB
2
2LEAB
2LEBA
1LEBA
55
aaa-027924
Figure 1.ꢀLogic symbol
56
54
55
1
1EN3 (BA)
29
7EN9 (BA)
G7
G1
31
30
28
26
27
1C5
7C11
2EN4 (AB)
G2
8EN10 (AB)
G8
3
2
2C6
8C12
5
52
15
42
3
5D
9
11D
10
6D
4
12D
6
8
16
17
19
20
21
23
24
51
49
48
47
45
44
43
41
40
38
37
36
34
9
10
12
13
14
33
aaa-027925
Figure 2.ꢀIEC logic symbol
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
2 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
nOEBA
nEBA
nLEBA
nOEAB
nEAB
nLEAB
LE
Q
D
nA1
nB1
LE
D
Q
8 IDENTICAL
CHANNELS
to 7 other channels
aaa-027926
Figure 3.ꢀLogic diagram
V
CC
data
input
to internal circuit
mna004
Figure 4.ꢀBushold circuit
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
3 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
5 Pinning information
5.1 Pinning
74ALVCH16543
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
1LEAB
1EAB
GND
1OEBA
1LEBA
1EBA
GND
2
3
4
5
1A0
1B0
6
1A1
1B1
7
V
V
CC
CC
8
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A1
2A2
GND
2A3
2A4
2A5
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B1
2B2
GND
2B3
2B4
2B5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
V
V
CC
CC
2A6
2A7
2B6
2B7
GND
GND
2EAB
2LEAB
2OEAB
2EBA
2LEBA
2OEBA
aaa-027927
Figure 5.ꢀPin configuration for TSSOP56
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
4 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
5.2 Pin description
Table 2.ꢀPin description
Symbol
Pin
Description
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7
1OEAB, 2OEAB
5, 6, 8, 9, 10, 12, 13, 14
data inputs/outputs
15, 16, 17, 19, 20, 21, 23, 24
data inputs/outputs
52, 51, 49, 48, 47, 45, 44, 43
data inputs/outputs
42, 41, 40, 38, 37, 36, 34, 33
data inputs/outputs
1, 28
A to B output enable inputs (active LOW)
B to A output enable inputs (active LOW)
A to B enable inputs (active LOW)
B to A enable inputs (active LOW)
A to B latch enable inputs (active LOW)
B to A latch enable inputs (active LOW)
ground (0 V)
1OEBA, 2OEBA
56, 29
1EAB, 2EAB
3, 26
1EBA, 2EBA
54, 31
1LEAB, 2LEAB
2, 27
1LEBA, 2LEBA
55, 30
GND
4, 11, 18, 25, 32, 39, 46, 53
7, 22, 35, 50
VCC
supply voltage
6 Functional description
Table 3.ꢀFunction selection [1]
Inputs
Outputs
Status
nOEAB or nOEBA nEAB or nEBA
nLEAB or nLEBA nAn or nBn
nBn or nAn
H
X
L
L
L
L
L
L
L
X
H
↑
X
X
L
L
↑
X
X
h
l
Z
disabled
Z
disabled
Z
disabled + latch
disabled + latch
latch + display
latch + display
transparent
transparent
hold
↑
Z
L
L
L
L
L
h
l
H
L
↑
L
L
H
H
L
X
H
L
NC
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
X = don’t care;
↑ = LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
NC = no change;
Z = high-impedance OFF-state.
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
5 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
7 Limiting values
Table 4.ꢀLimiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
-0.5
-0.5
-0.5
-50
-
Max
+4.6
+4.6
VCC + 0.5
-
Unit
V
VCC
VI
supply voltage
[1]
[1]
input voltage
V
VO
IIK
output voltage
V
input clamping current
output clamping current
output current
VI < 0 V
mA
mA
mA
mA
mA
°C
IOK
IO
VO > VCC or VO < 0 V
VO = 0 V to VCC
±50
-
±50
ICC
IGND
Tstg
Ptot
supply current
-
100
ground current
-100
-65
-
-
storage temperature
total power dissipation
+150
600
[2]
Tamb = -40 °C to +85 °C
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 55 °C the value of Ptot derates linearly with 8 mW/K.
8 Recommended operating conditions
Table 5.ꢀRecommended operating conditions
Symbol Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
maximum speed performance
CL = 30 pF
2.3
3.0
1.2
0
2.5
2.7
3.6
3.6
VCC
VCC
+85
20
V
CL = 50 pF
3.3
V
low-voltage applications
2.4
V
VI
input voltage
-
-
-
-
-
V
VO
output voltage
0
V
Tamb
Δt/ΔV
ambient temperature
input transition rise and fall rate
in free air
-40
-
°C
ns/V
ns/V
VCC = 2.3 V to 3.0 V
VCC = 3.0 V to 3.6 V
-
10
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
6 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
9 Static characteristics
Table 6.ꢀStatic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = -40 °C to +85 °C
Symbol Parameter
Conditions
Min
1.7
2.0
-
Typ[1]
Max
-
Unit
V
VIH
HIGH-level
VCC = 2.3 V to 2.7 V
1.2
input voltage
VCC = 2.7 V to 3.6 V
1.5
-
V
VIL
LOW-level
VCC = 2.3 V to 2.7 V
1.2
0.7
0.8
V
input voltage
VCC = 2.7 V to 3.6 V
-
1.5
V
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = -100 μA; VCC = 2.3 V to 3.6 V
IO = -6 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.3 V
IO = -12 mA; VCC = 2.7 V
IO = -12 mA; VCC = 3.0 V
IO = -24 mA; VCC = 3.0 V
VI = VIH or VIL
VCC - 0.2
VCC - 0.3
VCC - 0.6
VCC - 0.5
VCC - 0.6
VCC - 1.0
VCC
-
-
-
-
-
-
V
V
V
V
V
V
VCC - 0.08
VCC - 0.26
VCC - 0.14
VCC - 0.09
VCC - 0.28
VOL
LOW-level
output voltage
IO = 100 μA; VCC = 2.3 V to 3.6 V
IO = 6 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
VCC = 2.3 V to 3.6 V; VI = VCC or GND
-
-
-
-
-
-
GND
0.07
0.15
0.14
0.27
0.1
0.20
0.40
0.70
0.40
0.55
5
V
V
V
V
V
II
input
μA
leakage current
IOZ
ICC
ΔICC
IBHL
OFF-state
output current
VCC = 2.3 V to 3.6 V; VI = VIH or VIL;
VO = VCC or GND
-
-
-
0.1
0.2
10
40
μA
μA
μA
supply current
VCC = 2.3 V to 3.6 V; VI = VCC or GND;
IO = 0 A
additional
supply current
per data I/O pin; VCC = 2.3 V to 3.6 V;
VI = VCC - 0.6 V; IO = 0 A
150
750
bus hold LOW
current
VCC = 2.3 V; VI = 0.7 V
VCC = 3.0 V; VI = 0.8 V
VCC = 2.3 V; VI = 1.7 V
VCC = 3.0 V; VI = 2.0 V
VCC = 3.6 V
45
75
-
150
-
-
-
-
-
-
μA
μA
μA
μA
μA
IBHH
bus hold HIGH
current
-45
-75
500
-175
-
IBHLO
IBHHO
CI
bus hold LOW
overdrive current
bus hold HIGH
overdrive current
VCC = 3.6 V
-500
-
-
-
-
μA
pF
input capacitance
4.0
[1] All typical values are measured at Tamb = 25 °C.
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
7 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
10 Dynamic characteristics
Table 7.ꢀDynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V);
for test circuit see Figure 10. Tamb = -40 °C to +85 °C
Symbol Parameter
propagation delay
Conditions
Min
Typ[1]
Max
Unit
[2]
[3]
[4]
tpd
ten
tdis
nAn to nBn; nBn to nAn; see Figure 6
VCC = 2.3 V to 2.7 V
1.0
-
3.4
2.9
3.8
5.1
4.8
4.3
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.0
nLEAB to nBn; nLEBA to nAn; see Figure 7
VCC = 2.3 V to 2.7 V
1.0
-
3.3
3.6
3.1
6.5
6.2
5.0
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.4
enable time
nOEBA to nAn; nOEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
1.0
-
3.3
3.4
2.9
6.8
6.3
5.3
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.0
nEBA to nAn; nEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
1.0
-
3.3
3.5
3.0
7.2
6.9
5.6
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.0
disable time
nOEBA to nAn; nOEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
1.0
-
2.9
3.3
3.2
5.7
4.8
4.6
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.0
nEBA to nAn; nEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
1.3
-
3.3
3.5
3.3
6.1
6.2
5.1
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
1.1
tW
pulse width
set-up time
nLEAB, nLEBA LOW; see Figure 7
VCC = 2.3 V to 2.7 V
3.3
3.3
3.3
1.2
1.3
0.9
-
-
-
ns
ns
ns
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
tsu
nAn to nLEAB; nBn to nLEBA;
nAn to nEAB; nBn to nEBA; see Figure 9
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.2
0.8
1.3
0.2
0.2
0.1
-
-
-
ns
ns
ns
VCC = 3.0 V to 3.6 V
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
8 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
Symbol Parameter
Conditions
Min
Typ[1]
Max
Unit
th
hold time
nAn to nLEAB; nBn to nLEBA;
nAn to nEAB; nBn to nEBA; see Figure 9
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.2
0.4
0.7
0.2
0.1
0.2
-
-
-
ns
ns
ns
VCC = 3.0 V to 3.6 V
per latch; VI = GND to VCC
outputs enabled
[5]
CPD
power dissipation
capacitance
-
-
44
14
-
-
pF
pF
outputs disabled
[1] Typical values are measured at Tamb = 25 °C
Typical values for VCC = 2.3 V to 2.7 V are measured at VCC = 2.5 V.
Typical values for VCC = 3.0 V to 3.6 V are measured at VCC = 3.3 V.
[2] tpd is the same as tPLH and tPHL
[3] ten is the same as tPZL and tPZH
[4] tdis is the same as tPLZ and tPHZ
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
∑(CL × VCC2 × fo) = sum of outputs.
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
9 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
10.1 Waveforms and test circuit
V
I
nAn, nBn input
GND
V
V
M
M
t
t
PLH
PHL
V
OH
nBn, nAn output
V
V
M
M
V
OL
aaa-027928
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 6.ꢀInput (nAn, nBn) to output (nBn, nAn) propagation delays
V
I
nLEAB, nLEBA
input
V
V
V
M
M
M
GND
t
W
t
t
PLH
PHL
V
OH
nAn, nBn output
V
V
M
M
V
OL
aaa-027929
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 7.ꢀInput (nLEAB, nLEBA) to output (nBn, nAn) propagation delays and (nLEAB, nLEBA) pulse width
V
I
nOEAB, nOEBA
nEAB, nEBA input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
aaa-027930
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 8.ꢀ3-state output enable and disable times
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
10 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
V
I
nAn, nBn input
GND
V
V
V
V
M
M
M
M
t
t
h
h
t
t
su
su
V
I
nLEBA, nLEAB
nEBA, nEAB input
V
M
V
M
GND
aaa-027931
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 9.ꢀData set-up and hold times for nAn, nBn inputs to nLEBA, nLEAB, nEBA and nEAB inputs
Table 8.ꢀMeasurement points
Input
Output
VM
VCC
VI
VM
Vx
Vy
2.3 V to 2.7 V
2.7 V
VCC
2.7 V
2.7 V
0.5VCC
1.5 V
1.5 V
0.5VCC
1.5 V
1.5 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VOH - 0.15 V
VOH - 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
74ALVCH16543
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© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
11 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
001aae235
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Figure 10.ꢀTest circuit for measuring switching times
Table 9.ꢀTest data
Input
Load
RL
VEXT
VCC
VI
tr, tf
CL
tPHZ, tPZH
GND
tPLZ, tPZL
2 × VCC
2 × VCC
2 × VCC
tPLH, tPHL
open
2.3 V to 2.7 V
2.7 V
VCC
2.7 V
2.7 V
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
500 Ω
500 Ω
500 Ω
30 pF
50 pF
50 pF
GND
open
3.0 V to 3.6 V
GND
open
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
12 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
11 Package outline
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
H
v
M
A
y
E
Z
56
29
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
28
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.5
0.1
mm
1.2
0.5
1
0.25
0.08
0.1
0.25
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT364-1
MO-153
Figure 11.ꢀPackage outline SOT364-1 (TSSOP56)
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
13 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
12 Abbreviations
Table 10.ꢀAbbreviations
Acronym
CDM
Description
Charged Device Model
CMOS
DUT
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
TTL
Transistor-Transistor Logic
13 Revision history
Table 11.ꢀRevision history
Document ID
Release date
20171215
Data sheet status
Change notice
Supersedes
74ALVCH16543 v.3
Modifications:
Product data sheet
-
74ALVCH16543 v.2
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74ALVCH16543 v.2
74ALVCH16543 v.1
19991123
19980831
Product specification
Product specification
-
-
74ALVCH16543 v.1
-
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
14 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
14 Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Product [short] data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
14.2 Definitions
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
Draft — The document is a draft version only. The content is still under
such equipment or applications and therefore such inclusion and/or use is at
internal review and subject to formal approval, which may result in
the customer’s own risk.
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
Short data sheet — A short data sheet is an extract from a full data sheet
without further testing or modification. Customers are responsible for the
with the same product type number(s) and title. A short data sheet is
design and operation of their applications and products using Nexperia
intended for quick reference only and should not be relied upon to contain
products, and Nexperia accepts no liability for any assistance with
detailed and full information. For detailed and full information see the
applications or customer product design. It is customer’s sole responsibility
relevant full data sheet, which is available on request via the local Nexperia
to determine whether the Nexperia product is suitable and fit for the
sales office. In case of any inconsistency or conflict with the short data sheet,
customer’s applications and products planned, as well as for the planned
the full data sheet shall prevail.
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
any liability related to any default, damage, costs or problem which is based
Nexperia and its customer, unless Nexperia and customer have explicitly
on any weakness or default in the customer’s applications or products, or
agreed otherwise in writing. In no event however, shall an agreement be
the application or use by customer’s third party customer(s). Customer is
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
14.3 Disclaimers
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
Limited warranty and liability — Information in this document is believed
damage to the device. Limiting values are stress ratings only and (proper)
to be accurate and reliable. However, Nexperia does not give any
operation of the device at these or any other conditions above those
representations or warranties, expressed or implied, as to the accuracy
given in the Recommended operating conditions section (if present) or the
or completeness of such information and shall have no liability for the
Characteristics sections of this document is not warranted. Constant or
consequences of use of such information. Nexperia takes no responsibility
repeated exposure to limiting values will permanently and irreversibly affect
for the content in this document if provided by an information source outside
the quality and reliability of the device.
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
or replacement of any products or rework charges) whether or not such
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
damages are based on tort (including negligence), warranty, breach of
in a valid written individual agreement. In case an individual agreement is
contract or any other legal theory. Notwithstanding any damages that
concluded only the terms and conditions of the respective agreement shall
customer might incur for any reason whatsoever, Nexperia's aggregate and
apply. Nexperia hereby expressly objects to applying the customer’s general
cumulative liability towards customer for the products described herein shall
terms and conditions with regard to the purchase of Nexperia products by
customer.
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
No offer to sell or license — Nothing in this document may be interpreted
Right to make changes — Nexperia reserves the right to make changes
or construed as an offer to sell products that is open for acceptance or
to information published in this document, including without limitation
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
15 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
74ALVCH16543
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 3 — 15 December 2017
16 / 17
Nexperia
74ALVCH16543
16-bit D-type registered transceiver; 3-state
Contents
1
General description ............................................ 1
2
3
4
5
5.1
5.2
6
7
8
Features and benefits .........................................1
Ordering information .......................................... 2
Functional diagram .............................................2
Pinning information ............................................ 4
Pinning ...............................................................4
Pin description ...................................................5
Functional description ........................................5
Limiting values ....................................................6
Recommended operating conditions ................6
Static characteristics ..........................................7
Dynamic characteristics .....................................8
Waveforms and test circuit .............................. 10
Package outline .................................................13
Abbreviations .................................................... 14
Revision history ................................................ 14
Legal information ..............................................15
9
10
10.1
11
12
13
14
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 December 2017
Document identifier: 74ALVCH16543
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