74ALVT16827DGG [NEXPERIA]

20-bit buffer/line driver; non-inverting; 3-stateProduction;
74ALVT16827DGG
型号: 74ALVT16827DGG
厂家: Nexperia    Nexperia
描述:

20-bit buffer/line driver; non-inverting; 3-stateProduction

驱动 信息通信管理 光电二极管 逻辑集成电路
文件: 总14页 (文件大小:196K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Rev. 4 — 24 January 2018  
Product data sheet  
1 General description  
The 74ALVT16827 high-performance BiCMOS device combines low static and dynamic  
power dissipation with high speed and high output drive. It is designed for VCC operation  
at 2.5 V or 3.3 V with I/O compatibility to 5 V.  
The 74ALVT16827 20-bit buffers provide high performance bus interface buffering for  
wide data/address paths or buses carrying parity. They have NOR Output Enables  
(nOE0 and nOE1) for maximum control flexibility.  
2 Features and benefits  
Multiple VCC and GND pins minimize switching noise  
5 V I/O compatible  
Live insertion and extraction permitted  
3-state output buffers  
Power-up 3-state  
Output capability: +64 mA and -32 mA  
Latch-up protection:  
JESD 78 exceeds 500 mA  
ESD protection:  
MIL STD 883 Method 3015: exceeds 2000 V  
MM: exceeds 200 V  
Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs.  
3 Ordering information  
Table 1.ꢀOrdering information  
Type number  
Package  
Temperature  
range  
Name  
Description  
Version  
74ALVT16827DGG  
-40 °C to +85 °C TSSOP56 plastic thin shrink small outline package; 56 leads;  
body width 6.1 mm  
SOT364-1  
 
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
4 Functional diagram  
1
&
EN1  
EN2  
56  
28  
29  
&
55  
54  
52  
51  
49  
48  
47  
45  
44  
43  
42  
41  
40  
38  
37  
36  
34  
33  
31  
30  
2
3
5
1
1
55 54 52 51 49 48 47 45 44 43  
6
8
9
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9  
1OE0  
1OE1  
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9  
1
10  
12  
13  
14  
15  
16  
17  
19  
20  
21  
23  
24  
26  
27  
56  
2
3
5
6
8
9
10 12 13 14  
1
2
42 41 40 38 37 36 34 33 31 30  
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9  
28  
29  
2OE0  
2OE1  
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9  
15 16 17 19 20 21 23 24 26 27  
001aad056  
001aad055  
Figure 1.ꢀLogic symbol  
Figure 2.ꢀIEC logic symbol  
nA0  
nY0  
nA1  
nY1  
nA2  
nA3  
nY3  
nA4  
nA5  
nA6  
nY6  
nA7  
nA8  
nA9  
nY9  
nOE0  
nOE1  
nY2  
nY4  
nY5  
nY7  
nY8  
001aad061  
Figure 3.ꢀLogic diagram  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
2 / 14  
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
5 Pinning information  
5.1 Pinning  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OE0  
1Y0  
1OE1  
1A0  
2
3
1Y1  
1A1  
4
GND  
1Y2  
GND  
1A2  
5
6
1Y3  
1A3  
7
V
CC  
V
CC  
8
1Y4  
1Y5  
1Y6  
GND  
1Y7  
1Y8  
1Y9  
2Y0  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
2Y5  
1A4  
1A5  
1A6  
GND  
1A7  
1A8  
1A9  
2A0  
2A1  
2A2  
GND  
2A3  
2A4  
2A5  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
16827  
V
CC  
V
CC  
2Y6  
2Y7  
2A6  
2A7  
GND  
2Y8  
GND  
2A8  
2Y9  
2A9  
2OE0  
2OE1  
001aad054  
Figure 4.ꢀPin configuration  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
3 / 14  
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
5.2 Pin description  
Table 2.ꢀPin description  
Symbol  
Pin  
Description  
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7, 1A8, 1A9  
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7, 2A8, 2A9  
1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7, 1Y8, 1Y9  
2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6, 2Y7, 2Y8, 2Y9  
1OE0, 1OE1, 2OE0, 2OE1  
55, 54, 52, 51, 49, 48, 47, 45, 44, 43  
42, 41, 40, 38, 37, 36, 34, 33, 31, 30  
2, 3, 5, 6, 8, 9, 10, 12, 13, 14  
15, 16, 17, 19, 20, 21, 23, 24, 26, 27  
1, 56, 28, 29  
data input  
data input  
data output  
data output  
output enable inputs  
(active-LOW)  
GND  
VCC  
4, 11, 18, 25, 32, 39, 46, 53  
7, 22, 35, 50  
ground (0 V)  
positive voltage supply  
6 Functional description  
Table 3.ꢀFunction table [1]  
Input  
Output  
Operating mode  
nOEn  
nAn  
L
nYn  
L
L
L
H
transparent  
H
H
transparent  
X
Z
High-impedance  
[1] X = don’t care; Z = High-impedance OFF-state; H = HIGH voltage level; L = LOW voltage level.  
7 Limiting values  
Table 4.ꢀLimiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-1.2  
-0.5  
-18  
-50  
-
Max  
+7.0  
+7.0  
+5.5  
-
Unit  
V
VCC  
VI  
supply voltage  
[1]  
[1]  
input voltage  
V
VO  
IIK  
output voltage  
output in OFF or HIGH-state  
VI < 0 V  
V
input clamping current  
output clamping current  
output current  
mA  
mA  
mA  
°C  
°C  
IOK  
IO  
VO < 0 V  
-
output in LOW-state  
128  
150  
+150  
[2]  
Tj  
junction temperature  
storage temperature  
-
Tstg  
-65  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are  
detrimental to reliability.  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
4 / 14  
 
 
 
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
8 Recommended operating conditions  
Table 5.ꢀRecommended operating conditions  
Symbol Parameter  
Conditions  
VCC = 2.5 V ± 0.2 V  
VCC = 3.3 V ± 0.3 V Unit  
Min  
Max  
2.7  
5.5  
-8  
Min  
Max  
3.6  
5.5  
-32  
32  
VCC  
VI  
supply voltage  
2.3  
3.0  
V
input voltage  
0
-
0
-
V
IOH  
IOL  
HIGH-level output current  
mA  
mA  
mA  
LOW-level output current none  
current duty cycle ≤ 50 %;  
-
8
-
-
24  
-
64  
f ≥ 1 kHz  
Δt/ΔV  
Tamb  
input transition rise and  
fall rate  
outputs enabled  
-
10  
-
10  
ns/V  
°C  
ambient temperature  
-40  
+85  
-40  
+85  
9 Static characteristics  
Table 6.ꢀStatic characteristics  
At recommended operating conditions; Tamb = -40 °C to +85 °C; voltages are referred to GND (ground = 0 V).  
Symbol Parameter  
VCC = 2.5 V ± 0.2 V  
Conditions  
Min  
Typ[1]  
Max  
Unit  
VIK  
VIH  
input clamping voltage VCC = 2.3 V; IIK = -18 mA  
-
-0.85  
-
-1.2  
-
V
V
HIGH-level input  
voltage  
1.7  
VIL  
LOW-level input  
voltage  
-
-
0.7  
V
VOH  
HIGH-level output  
voltage  
VCC = 2.3 V to 2.7 V; IO = -100 μA  
VCC - 0.2  
VCC  
2.1  
-
V
V
V
V
VCC = 2.3 V; IO = -8 mA  
VCC = 2.3 V; IO = 100 μA  
VCC = 2.3 V; IO = 24 mA  
all pins  
1.8  
-
VOL  
LOW-level output  
voltage  
-
-
0.07  
0.3  
0.2  
0.5  
II  
input leakage current  
VCC = 0 V or 2.7 V; VI = 5.5 V  
control pins  
-
-
0.1  
0.1  
10  
±1  
μA  
μA  
VCC = 2.7 V; VI = VCC or GND  
data pins  
[2]  
VCC = 2.7 V; VI = VCC  
VCC = 2.7 V; VI = 0 V  
VCC = 0 V; VI or VO = 0 V to 4.5 V  
-
-
-
0.1  
0.1  
0.1  
1
-5  
μA  
μA  
μA  
IOFF  
power-off leakage  
current  
±100  
IBHL  
IBHH  
bus hold LOW current VCC = 2.5 V; VI = 0.8 V  
bus hold HIGH current VCC = 2.5 V; VI = 2.0 V  
-
-
115  
-10  
-
-
μA  
μA  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
5 / 14  
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Symbol Parameter  
Conditions  
Min  
Typ[1]  
Max  
Unit  
IEX  
external current  
output in HIGH-state when VO > VCC  
;
-
10  
125  
μA  
VO = 5.5 V; VCC = 2.3 V  
[3]  
IO(pu/pd) power-up/power-down VCC ≤ 1.2 V; VO = 0.5 V to VCC  
;
-
1
100  
μA  
VI = GND or VCC; nOEn = don’t care  
output current  
IOZ  
OFF-state output  
current  
VCC = 2.7 V; VI = VIL or VIH  
output HIGH; VO = 2.3 V  
output LOW; VO = 0.5 V  
-
-
0.5  
0.5  
5
μA  
μA  
-5  
ICC  
supply current  
VCC = 2.7 V; VI = GND or VCC; IO = 0 A  
outputs HIGH  
-
-
-
-
0.04  
3.6  
0.1  
5.0  
0.1  
0.4  
mA  
mA  
mA  
mA  
outputs LOW  
[4]  
[5]  
outputs disabled  
0.04  
0.04  
ΔICC  
additional supply  
current  
per input pin; VCC = 2.3 V to 2.7 V;  
one input at VCC - 0.6 V;  
other inputs at VCC or GND  
CI  
input capacitance  
output capacitance  
VI = 0 V or VCC  
VO = 0 V or VCC  
-
-
3
9
-
-
pF  
pF  
CO  
VCC = 3.3 V ± 0.3 V  
VIK  
VIH  
input clamping voltage VCC = 3.0 V; IIK = -18 mA  
-
-0.85  
-
-1.2  
-
V
V
HIGH-level input  
voltage  
2.0  
VIL  
LOW-level input  
voltage  
-
-
0.8  
V
VOH  
HIGH-level output  
voltage  
VCC = 3.0 V to 3.6 V; IO = -100 μA  
VCC = 3.0 V; IO = -32 mA  
VCC = 3.0 V  
VCC - 0.2  
2.0  
VCC  
2.3  
-
-
V
V
VOL  
LOW-level output  
voltage  
IO = 100 μA  
-
-
-
-
0.07  
0.25  
0.3  
0.2  
0.4  
V
V
V
V
IO = 16 mA  
IO = 32 mA  
0.5  
IO = 64 mA  
0.4  
0.55  
II  
input leakage current  
control pins  
VCC = 3.6 V; VI = VCC or GND  
VCC = 0 V or 3.6 V; VI = 5.5 V  
data pins  
-
-
0.1  
0.1  
±1  
10  
μA  
μA  
[2]  
VCC = 3.6 V; VI = VCC  
VCC = 3.6 V; VI = 0 V  
VCC = 0 V; VI or VO = 0 V to 4.5 V  
-
-
-
0.5  
0.1  
0.1  
1
-5  
μA  
μA  
μA  
IOFF  
power-off leakage  
current  
±100  
IBHL  
bus hold LOW current data inputs; VCC = 3 V; VI = 0.8 V  
bus hold HIGH current data inputs; VCC = 3 V; VI = 2.0 V  
75  
-75  
500  
130  
-140  
-
-
-
-
μA  
μA  
μA  
IBHH  
IBHLO  
[6]  
bus hold LOW  
data inputs; VCC = 3.6 V; VI = 0 V to 3.6 V  
overdrive current  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
6 / 14  
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Symbol Parameter  
Conditions  
Min  
Typ[1]  
Max  
Unit  
[6]  
[7]  
IBHHO  
bus hold HIGH  
overdrive current  
data inputs; VCC = 3.6 V; VI = 0 V to 3.6 V  
-500  
-
-
μA  
IEX  
external current  
output in HIGH-state when VO > VCC  
;
-
-
10  
1
125  
μA  
μA  
VO = 5.5 V; VCC = 3.0 V  
IO(pu/pd) power-up/power-down VCC ≤ 1.2 V; VO = 0.5 V to VCC  
;
±100  
VI = GND or VCC; nOEn = don’t care  
output current  
IOZ  
OFF-state output  
current  
VCC = 3.6 V; VI = VIL or VIH  
output HIGH; VO = 3.0 V  
output LOW; VO = 0.5 V  
-
-
0.5  
0.5  
5
μA  
μA  
-5  
ICC  
supply current  
VCC = 3.6 V; VI = GND or VCC; IO = 0 A  
outputs HIGH  
-
-
-
-
0.07  
4.2  
0.1  
6
mA  
mA  
mA  
mA  
outputs LOW  
[4]  
[5]  
outputs disabled  
0.07  
0.04  
0.1  
0.4  
ΔICC  
additional supply  
current  
per input pin; VCC = 3 V to 3.6 V;  
one input at VCC - 0.6 V;  
other inputs at VCC or GND  
CI  
input capacitance  
output capacitance  
VI = 0 V or VCC  
VO = 0 V or VCC  
-
-
3
9
-
-
pF  
pF  
CO  
[1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C.  
All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C.  
[2] Unused pins at VCC or GND.  
[3] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.  
From VCC = 1.2 V to VCC = 2.5 V ± 0.2 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only.  
[4] ICC with outputs disabled is measured with outputs pulled up to VCC or pulled down to ground.  
[5] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.  
[6] This is the bus hold overdrive current required to force the input to the opposite logic state.  
[7] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms.  
From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only.  
10 Dynamic characteristics  
Table 7.ꢀDynamic characteristics  
At recommended operating conditions; Tamb = -40 °C to +85 °C; Voltages are referenced to GND (ground = 0 V); for test  
circuit see Figure 7.  
Symbol Parameter  
VCC = 2.5 V ± 0.2 V  
Conditions  
Min  
Typ[1]  
Max  
Unit  
tPLH  
tPHL  
tPZH  
tPZL  
tPHZ  
tPLZ  
LOW to HIGH propagation delay  
nAn to nYn; see Figure 5  
nAn to nYn; see Figure 5  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
1.0  
1.0  
2.0  
1.7  
1.8  
1.4  
2.0  
2.0  
3.2  
2.9  
2.8  
2.3  
2.9  
3.0  
5.5  
4.3  
5.1  
3.9  
ns  
ns  
ns  
ns  
ns  
ns  
HIGH to LOW propagation delay  
OFF-state to HIGH propagation delay  
OFF-state to LOW propagation delay  
HIGH to OFF-state propagation delay  
LOW to OFF-state propagation delay  
VCC = 3.3 V ± 0.3 V  
tPLH LOW to HIGH propagation delay  
tPHL HIGH to LOW propagation delay  
nAn to nYn; see Figure 5  
nAn to nYn; see Figure 5  
0.7  
0.8  
1.5  
1.6  
2.2  
2.3  
ns  
ns  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
7 / 14  
 
 
 
 
 
 
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Symbol Parameter  
Conditions  
Min  
1.6  
1.4  
2.3  
1.5  
Typ[1]  
2.6  
Max  
3.8  
3.2  
4.8  
3.8  
Unit  
ns  
tPZH  
tPZL  
tPHZ  
tPLZ  
OFF-state to HIGH propagation delay  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
nOEn to nYn; see Figure 6  
OFF-state to LOW propagation delay  
HIGH to OFF-state propagation delay  
LOW to OFF-state propagation delay  
2.3  
ns  
3.2  
ns  
2.5  
ns  
[1] All typical values for VCC = 2.5 V ± 0.2 V are measured at VCC = 2.5 V and Tamb = 25 °C.  
All typical values for VCC = 3.3 V ± 0.3 V are measured at VCC = 3.3 V and Tamb = 25 °C.  
10.1 Waveforms and test circuit  
V
I
nAn input  
GND  
V
V
M
M
t
t
PLH  
PHL  
V
OH  
V
V
M
nYn output  
M
V
OL  
mna171  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Figure 5.ꢀInput (nAn) to output (nYn) propagation delays  
V
I
nOEn input  
V
V
t
M
M
GND  
t
PLZ  
PZL  
3.0 V or V  
CC  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
V
HIGH-to-OFF  
OFF-to-HIGH  
M
GND  
outputs  
enabled  
outputs  
disabled  
outputs  
enabled  
aaa-028099  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Figure 6.ꢀThe 3-state output enable and disable times  
Table 8.ꢀMeasurement points  
VCC  
Input  
VI  
Output  
VM  
VM  
VX  
VY  
VCC ≤ 2.7 V  
VCC ≥ 3.0 V  
VCC  
3.0 V  
0.5 x VCC  
1.5 V  
0.5 x VCC  
1.5 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOH - 0.15 V  
VOH - 0.3 V  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
8 / 14  
 
 
 
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 9.  
Definitions test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
VEXT = Test voltage for switching times.  
Figure 7.ꢀTest circuit for measuring switching times  
Table 9.ꢀTest data  
Input  
VI  
Load  
CL  
VEXT  
fi  
tW  
tr, tf  
RL  
tPHZ, tPZH tPLZ, tPZL  
tPLH, tPHL  
3.0 V or VCC  
≤ 10 MHz 500 ns  
≤ 2.5 ns  
50 pF  
500 Ω  
GND  
6 V or VCC x 2 open  
whichever is less  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
9 / 14  
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
11 Package outline  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm  
SOT364-1  
E
D
A
X
c
H
v
M
A
y
E
Z
56  
29  
Q
A
2
(A )  
3
A
A
1
pin 1 index  
θ
L
p
L
detail X  
1
28  
w
M
b
e
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions).  
A
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.  
8o  
0o  
0.15  
0.05  
1.05  
0.85  
0.28  
0.17  
0.2  
0.1  
14.1  
13.9  
6.2  
6.0  
8.3  
7.9  
0.8  
0.4  
0.50  
0.35  
0.5  
0.1  
mm  
1.2  
0.5  
1
0.25  
0.08  
0.1  
0.25  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT364-1  
MO-153  
Figure 8.ꢀPackage outline SOT364-1 (TSSOP56)  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
10 / 14  
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
12 Abbreviations  
Table 10.ꢀAbbreviations  
Acronym  
BiCMOS  
DUT  
Description  
Bipolar Complementary Metal Oxide Semiconductor  
Device Under Test  
ElectroStatic Discharge  
Military  
ESD  
MIL  
MM  
Machine Model  
13 Revision history  
Table 11.ꢀRevision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
74ALVT16827 v.4 20180124  
Product data sheet  
-
74ALVT16827 v.3  
Modifications:  
The format of this data sheet has been redesigned to comply with the identity guidelines of  
Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type number 74ALVT16827DL (SOT371-1 / SSOP56) removed.  
74ALVT16827 v.3 20050602  
Product data sheet  
-
74ALVT16827 v.2  
Modifications:  
The format of this data sheet has been redesigned to comply with the new presentation and  
information standard of Philips Semiconductors.  
Section 2: modified ‘JEDEC Std 17’ into ‘JESD78’.  
Section 10: changed values in column ‘min’  
74ALVT16827 v.2 19980213  
74ALVT16827 v.1 19960619  
Product specification  
Product specification  
-
-
74ALVT16827 v.1  
-
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
11 / 14  
 
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
14 Legal information  
14.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Definition  
Objective [short] data sheet  
Development  
This document contains data from the objective specification for product  
development.  
Preliminary [short] data sheet  
Product [short] data sheet  
Qualification  
Production  
This document contains data from the preliminary specification.  
This document contains the product specification.  
[1] Please consult the most recently issued document before initiating or completing a design.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple  
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
14.2 Definitions  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
Draft — The document is a draft version only. The content is still under  
such equipment or applications and therefore such inclusion and/or use is at  
internal review and subject to formal approval, which may result in  
the customer’s own risk.  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
Short data sheet — A short data sheet is an extract from a full data sheet  
without further testing or modification. Customers are responsible for the  
with the same product type number(s) and title. A short data sheet is  
design and operation of their applications and products using Nexperia  
intended for quick reference only and should not be relied upon to contain  
products, and Nexperia accepts no liability for any assistance with  
detailed and full information. For detailed and full information see the  
applications or customer product design. It is customer’s sole responsibility  
relevant full data sheet, which is available on request via the local Nexperia  
to determine whether the Nexperia product is suitable and fit for the  
sales office. In case of any inconsistency or conflict with the short data sheet,  
customer’s applications and products planned, as well as for the planned  
the full data sheet shall prevail.  
application and use of customer’s third party customer(s). Customers should  
provide appropriate design and operating safeguards to minimize the risks  
associated with their applications and products. Nexperia does not accept  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
any liability related to any default, damage, costs or problem which is based  
Nexperia and its customer, unless Nexperia and customer have explicitly  
on any weakness or default in the customer’s applications or products, or  
agreed otherwise in writing. In no event however, shall an agreement be  
the application or use by customer’s third party customer(s). Customer is  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
responsible for doing all necessary testing for the customer’s applications  
and products using Nexperia products in order to avoid a default of the  
applications and the products or of the application or use by customer’s third  
party customer(s). Nexperia does not accept any liability in this respect.  
14.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
Limited warranty and liability — Information in this document is believed  
damage to the device. Limiting values are stress ratings only and (proper)  
to be accurate and reliable. However, Nexperia does not give any  
operation of the device at these or any other conditions above those  
representations or warranties, expressed or implied, as to the accuracy  
given in the Recommended operating conditions section (if present) or the  
or completeness of such information and shall have no liability for the  
Characteristics sections of this document is not warranted. Constant or  
consequences of use of such information. Nexperia takes no responsibility  
repeated exposure to limiting values will permanently and irreversibly affect  
for the content in this document if provided by an information source outside  
the quality and reliability of the device.  
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation -  
lost profits, lost savings, business interruption, costs related to the removal  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
or replacement of any products or rework charges) whether or not such  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
damages are based on tort (including negligence), warranty, breach of  
in a valid written individual agreement. In case an individual agreement is  
contract or any other legal theory. Notwithstanding any damages that  
concluded only the terms and conditions of the respective agreement shall  
customer might incur for any reason whatsoever, Nexperia's aggregate and  
apply. Nexperia hereby expressly objects to applying the customer’s general  
cumulative liability towards customer for the products described herein shall  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
be limited in accordance with the Terms and conditions of commercial sale of  
Nexperia.  
No offer to sell or license — Nothing in this document may be interpreted  
Right to make changes — Nexperia reserves the right to make changes  
or construed as an offer to sell products that is open for acceptance or  
to information published in this document, including without limitation  
the grant, conveyance or implication of any license under any copyrights,  
patents or other industrial or intellectual property rights.  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
12 / 14  
 
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications. In the event that customer  
uses the product for design-in and use in automotive applications to  
automotive specifications and standards, customer (a) shall use the product  
without Nexperia's warranty of the product for such automotive applications,  
use and specifications, and (b) whenever customer uses the product for  
automotive applications beyond Nexperia's specifications such use shall be  
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia  
for any liability, damages or failed product claims resulting from customer  
design and use of the product for automotive applications beyond Nexperia's  
standard warranty and Nexperia's product specifications.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
14.4 Trademarks  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
74ALVT16827  
All information provided in this document is subject to legal disclaimers.  
© Nexperia B.V. 2018. All rights reserved.  
Product data sheet  
Rev. 4 — 24 January 2018  
13 / 14  
Nexperia  
74ALVT16827  
20-bit buffer/line driver; non-inverting; 3-state  
Contents  
1
General description ............................................ 1  
2
3
4
5
5.1  
5.2  
6
7
8
Features and benefits .........................................1  
Ordering information .......................................... 1  
Functional diagram .............................................2  
Pinning information ............................................ 3  
Pinning ...............................................................3  
Pin description ...................................................4  
Functional description ........................................4  
Limiting values ....................................................4  
Recommended operating conditions ................5  
Static characteristics ..........................................5  
Dynamic characteristics .....................................7  
Waveforms and test circuit ................................8  
Package outline .................................................10  
Abbreviations .................................................... 11  
Revision history ................................................ 11  
Legal information ..............................................12  
9
10  
10.1  
11  
12  
13  
14  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section 'Legal information'.  
© Nexperia B.V. 2018.  
All rights reserved.  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 24 January 2018  
Document identifier: 74ALVT16827  

相关型号:

SI9130DB

5- and 3.3-V Step-Down Synchronous Converters

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135LG-T1-E3

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9135_11

SMBus Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9136_11

Multi-Output Power-Supply Controller

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130CG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130LG-T1-E3

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9130_11

Pin-Programmable Dual Controller - Portable PCs

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137DB

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9137LG

Multi-Output, Sequence Selectable Power-Supply Controller for Mobile Applications

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY

SI9122E

500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification Drivers

Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY