74AUP2G86GT [NEXPERIA]

Low-power dual 2-input EXCLUSIVE-OR gateProduction;
74AUP2G86GT
型号: 74AUP2G86GT
厂家: Nexperia    Nexperia
描述:

Low-power dual 2-input EXCLUSIVE-OR gateProduction

光电二极管 逻辑集成电路 石英晶振
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中文:  中文翻译
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74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
Rev. 10 — 7 December 2020  
Product data sheet  
1. General description  
The 74AUP2G86 provides the dual 2-input EXCLUSIVE-OR function.  
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times  
across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire VCC range  
from 0.8 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing a damaging backflow current through the device when it is powered  
down.  
2. Features and benefits  
Wide supply voltage range from 0.8 V to 3.6 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-12 (0.8 V to 1.3 V)  
JESD8-11 (0.9 V to 1.65 V)  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-B (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F Class 3A exceeds 5000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Low static power consumption; ICC = 0.9 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial Power-down mode operation  
Multiple package options  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP2G86DC  
74AUP2G86GT  
74AUP2G86GN  
74AUP2G86GS  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
VSSOP8  
plastic very thin shrink small outline package;  
8 leads; body width 2.3 mm  
SOT765-1  
XSON8  
XSON8  
XSON8  
plastic extremely thin small outline package;  
no leads; 8 terminals; body 1 × 1.95 × 0.5 mm  
SOT833-1  
SOT1116  
SOT1203  
extremely thin small outline package; no leads;  
8 terminals; body 1.2 × 1.0 × 0.35 mm  
extremely thin small outline package; no leads;  
8 terminals; body 1.35 × 1.0 × 0.35 mm  
4. Marking  
Table 2. Marking codes  
Type number  
Marking code[1]  
74AUP2G86DC  
74AUP2G86GT  
74AUP2G86GN  
74AUP2G86GS  
p86  
p86  
pH  
pH  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
= 1  
1A  
1Y  
1B  
2A  
2Y  
= 1  
2B  
001aah760  
001aah761  
Fig. 1. Logic symbol  
Fig. 2. IEC logic symbol  
B
A
Y
mna040  
Fig. 3. Logic diagram (one gate)  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
2 / 17  
 
 
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
6. Pinning information  
6.1. Pinning  
74AUP2G86  
1A  
1B  
1
2
3
4
8
7
6
5
V
CC  
1Y  
2B  
2A  
74AUP2G86  
2Y  
1
2
3
4
8
7
6
5
1A  
1B  
V
CC  
GND  
1Y  
2B  
2A  
2Y  
001aaf174  
Transparent top view  
GND  
001aaf173  
Fig. 5. Pin configuration SOT833-1, SOT1116 and  
SOT1203 (XSON8)  
Fig. 4. Pin configuration SOT765-1 (VSSOP8)  
6.2. Pin description  
Table 3. Pin description  
Symbol  
1A, 2A  
1B, 2B  
GND  
Pin  
1, 5  
2, 6  
4
Description  
data input  
data input  
ground (0 V)  
data output  
supply voltage  
1Y, 2Y  
VCC  
7, 3  
8
7. Functional description  
Table 4. Function table  
H = HIGH voltage level; L = LOW voltage level.  
Input  
Output  
nA  
L
nB  
L
nY  
L
L
H
L
H
H
L
H
H
H
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
3 / 17  
 
 
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
8. Limiting values  
Table 5. Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
-0.5  
-50  
-0.5  
-50  
-0.5  
-
Max  
+4.6  
-
Unit  
V
VCC  
IIK  
supply voltage  
input clamping current  
input voltage  
VI < 0 V  
mA  
V
VI  
[1]  
[1]  
+4.6  
-
IOK  
VO  
IO  
output clamping current  
output voltage  
VO < 0 V  
mA  
V
Active mode and Power-down mode  
VO = 0 V to VCC  
+4.6  
±20  
50  
output current  
mA  
mA  
mA  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
-50  
-65  
-
-
storage temperature  
total power dissipation  
+150 °C  
250 mW  
Tamb = -40 °C to +125 °C  
[2]  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C.  
For SOT833-1 (XSON8) package: Ptot derates linearly with 3.1 mW/K above 68 °C.  
For SOT1116 (XSON8) package: Ptot derates linearly with 4.2 mW/K above 90 °C.  
For SOT1203 (XSON8) package: Ptot derates linearly with 3.6 mW/K above 81 °C.  
9. Recommended operating conditions  
Table 6. Operating conditions  
Symbol Parameter  
Conditions  
Min  
0.8  
0
Max  
Unit  
V
VCC  
VI  
supply voltage  
input voltage  
output voltage  
3.6  
3.6  
V
VO  
Active mode  
0
VCC  
3.6  
V
Power-down mode; VCC = 0 V  
0
V
Tamb  
ambient temperature  
-40  
0
+125  
200  
°C  
ns/V  
Δt/ΔV  
input transition rise and fall rate  
VCC = 0.8 V to 3.6 V  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
4 / 17  
 
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
10. Static characteristics  
Table 7. Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Tamb = 25 °C  
Conditions  
Min  
Typ  
Max  
Unit  
VIH  
HIGH-level input  
voltage  
VCC = 0.8 V  
0.70VCC  
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
0.65VCC  
-
1.6  
-
-
VCC = 3.0 V to 3.6 V  
2.0  
VIL  
LOW-level input  
voltage  
VCC = 0.8 V  
-
-
-
-
0.30VCC  
0.35VCC  
0.7  
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
0.9  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VI = VIH or VIL  
VCC - 0.1  
0.75VCC  
1.11  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.32  
2.05  
1.9  
2.72  
2.6  
VOL  
LOW-level output  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
0.3VCC  
0.31  
0.31  
0.31  
0.44  
0.31  
0.44  
±0.1  
±0.2  
V
V
V
V
V
V
V
V
II  
input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
μA  
μA  
IOFF  
power-off leakage  
current  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
-
-
±0.2  
0.5  
40  
μA  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
additional supply  
current  
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
CI  
input capacitance  
output capacitance  
VCC = 0 V to 3.6 V; VI = GND or VCC  
VO = GND; VCC = 0 V  
-
-
0.6  
1.3  
-
-
pF  
pF  
CO  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
5 / 17  
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = -40 °C to +85 °C  
VIH  
HIGH-level input  
voltage  
VCC = 0.8 V  
0.70VCC  
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
0.65VCC  
-
1.6  
-
-
VCC = 3.0 V to 3.6 V  
2.0  
VIL  
LOW-level input  
voltage  
VCC = 0.8 V  
-
-
-
-
0.30VCC  
0.35VCC  
0.7  
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
0.9  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VI = VIH or VIL  
VCC - 0.1  
0.7VCC  
1.03  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.30  
1.97  
1.85  
2.67  
2.55  
VOL  
LOW-level output  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.1  
0.3VCC  
0.37  
0.35  
0.33  
0.45  
0.33  
0.45  
±0.5  
±0.5  
V
V
V
V
V
V
V
V
II  
input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
μA  
μA  
IOFF  
power-off leakage  
current  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
-
-
±0.6  
0.9  
50  
μA  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
additional supply  
current  
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
6 / 17  
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = -40 °C to +125 °C  
VIH  
HIGH-level input  
voltage  
VCC = 0.8 V  
0.75VCC  
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
0.70VCC  
-
1.6  
-
-
VCC = 3.0 V to 3.6 V  
2.0  
VIL  
LOW-level input  
voltage  
VCC = 0.8 V  
-
-
-
-
0.25VCC  
0.30VCC  
0.7  
VCC = 0.9 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
0.9  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = -20 μA; VCC = 0.8 V to 3.6 V  
IO = -1.1 mA; VCC = 1.1 V  
IO = -1.7 mA; VCC = 1.4 V  
IO = -1.9 mA; VCC = 1.65 V  
IO = -2.3 mA; VCC = 2.3 V  
IO = -3.1 mA; VCC = 2.3 V  
IO = -2.7 mA; VCC = 3.0 V  
IO = -4.0 mA; VCC = 3.0 V  
VI = VIH or VIL  
VCC - 0.11  
0.6VCC  
0.93  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
1.17  
1.77  
1.67  
2.40  
2.30  
VOL  
LOW-level output  
voltage  
IO = 20 μA; VCC = 0.8 V to 3.6 V  
IO = 1.1 mA; VCC = 1.1 V  
IO = 1.7 mA; VCC = 1.4 V  
IO = 1.9 mA; VCC = 1.65 V  
IO = 2.3 mA; VCC = 2.3 V  
IO = 3.1 mA; VCC = 2.3 V  
IO = 2.7 mA; VCC = 3.0 V  
IO = 4.0 mA; VCC = 3.0 V  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.11  
0.33VCC  
0.41  
V
V
V
0.39  
V
0.36  
V
0.50  
V
0.36  
V
0.50  
V
II  
input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V  
±0.75  
±0.75  
μA  
μA  
IOFF  
power-off leakage  
current  
VI or VO = 0 V to 3.6 V; VCC = 0 V  
ΔIOFF  
ICC  
additional power-off  
leakage current  
VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V  
-
-
-
-
-
-
±0.75  
1.4  
μA  
μA  
μA  
supply current  
VI = GND or VCC; IO = 0 A;  
VCC = 0.8 V to 3.6 V  
ΔICC  
additional supply  
current  
VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V  
[1]  
75  
[1] One input at VCC - 0.6 V, other input at VCC or GND.  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
7 / 17  
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
11. Dynamic characteristics  
Table 8. Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7.  
Symbol Parameter Conditions  
Tamb = 25 °C  
Tamb  
=
Tamb  
=
Unit  
-40 °C to +85 °C -40 °C to +125 °C  
Min  
Typ[1] Max  
Min  
Max  
Min  
Max  
CL = 5 pF  
tpd  
propagation nA or nB to nY; see Fig. 6 [2]  
delay  
VCC = 0.8 V  
-
21.2  
5.9  
4.1  
3.3  
2.6  
2.3  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
2.3  
1.8  
1.5  
1.2  
1.0  
13.1  
7.7  
5.9  
4.4  
4.0  
2.1  
1.6  
1.4  
1.1  
0.9  
14.3  
8.8  
6.9  
5.3  
4.7  
2.1  
1.6  
1.4  
1.1  
0.9  
15.8 ns  
9.7  
7.6  
5.9  
5.2  
ns  
ns  
ns  
ns  
CL = 10 pF  
tpd  
propagation nA or nB to nY; see Fig. 6 [2]  
delay  
VCC = 0.8 V  
-
24.7  
6.8  
4.8  
3.9  
3.1  
2.9  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
2.6  
2.2  
1.8  
1.5  
1.3  
14.8  
8.7  
6.7  
5.2  
4.8  
2.4  
1.9  
1.7  
1.4  
1.3  
16.2  
10.0  
8.0  
2.4  
1.9  
1.7  
1.4  
1.3  
17.9 ns  
11.0 ns  
8.8  
6.9  
6.2  
ns  
ns  
ns  
6.2  
5.6  
CL = 15 pF  
tpd propagation nA or nB to nY; see Fig. 6 [2]  
delay  
VCC = 0.8 V  
-
28.2  
7.6  
5.3  
4.4  
3.6  
3.3  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.0  
2.4  
2.1  
1.8  
1.6  
16.5  
9.6  
7.5  
5.9  
5.4  
2.7  
2.2  
1.9  
1.6  
1.5  
18.1  
11.3  
9.0  
2.7  
2.2  
1.9  
1.6  
1.5  
20.0 ns  
12.5 ns  
9.9  
7.7  
7.1  
ns  
ns  
ns  
7.0  
6.4  
CL = 30 pF  
tpd  
propagation nA or nB to nY; see Fig. 6 [2]  
delay  
VCC = 0.8 V  
-
38.5  
9.9  
6.9  
5.7  
4.7  
4.4  
-
-
-
-
-
ns  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
3.9  
3.2  
2.8  
2.4  
2.2  
21.5  
12.5  
9.8  
3.5  
2.8  
2.5  
2.2  
2.1  
24.1  
14.8  
11.7  
9.1  
3.5  
2.8  
2.5  
2.2  
2.1  
26.6 ns  
16.3 ns  
12.9 ns  
10.1 ns  
7.6  
7.1  
8.3  
9.2  
ns  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
8 / 17  
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
Symbol Parameter Conditions  
Tamb = 25 °C  
Typ[1] Max  
Tamb  
=
Tamb  
=
Unit  
-40 °C to +85 °C -40 °C to +125 °C  
Min  
Min  
Max  
Min  
Max  
CL = 5 pF, 10 pF, 15 pF and 30 pF  
CPD  
power  
dissipation  
capacitance  
f = 1 MHz; VI = GND to VCC [3]  
VCC = 0.8 V  
-
-
-
-
-
-
2.7  
2.9  
3.0  
3.1  
3.6  
4.2  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
pF  
pF  
pF  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
[1] All typical values are measured at nominal VCC  
.
[2] tpd is the same as tPLH and tPHL  
.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).  
PD = CPD × VCC 2 × fi × N + Σ(CL × VCC 2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC 2 × fo) = sum of the outputs.  
11.1. Waveforms and test circuit  
V
I
V
M
nA, nB input  
GND  
t
t
PLH  
PHL  
V
OH  
nY output  
V
M
V
OL  
mna224  
Measurement points are given in Table 9.  
VOL and VOH are typical output voltage levels that occur with the output load.  
Fig. 6. The data input (nA or nB) to output (nY) propagation delays  
Table 9. Measurement points  
Supply voltage  
VCC  
Output  
VM  
Input  
VM  
VI  
tr = tf  
0.8 V to 3.6 V  
0.5 × VCC  
0.5 × VCC  
VCC  
≤ 3.0 ns  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
9 / 17  
 
 
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
V
V
EXT  
CC  
5 kΩ  
V
I
V
O
G
DUT  
R
T
C
L
R
L
001aac521  
Test data is given in Table 10.  
Definitions for test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.  
VEXT = External voltage for measuring switching times.  
Fig. 7. Test circuit for measuring switching times  
Table 10. Test data  
Supply voltage  
VCC  
Load  
VEXT  
CL  
RL [1]  
tPLH, tPHL  
tPZH, tPHZ  
tPZL, tPLZ  
0.8 V to 3.6 V  
5 pF, 10 pF, 15 pF and 30 pF  
5 kΩ or 1 MΩ open  
GND  
2 × VCC  
[1] For measuring enable and disable times RL = 5 kΩ.  
For measuring propagation delays, set-up and hold times and pulse width RL = 1 MΩ.  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
10 / 17  
 
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
12. Package outline  
VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm  
SOT765-1  
D
E
A
X
c
y
H
E
v
A
Z
5
8
Q
A
2
A
A
(A )  
3
1
pin 1 index  
θ
L
p
detail X  
1
4
L
e
w
b
p
0
5 mm  
scale  
Dimensions (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
Unit  
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.  
max  
mm nom  
min  
0.15 0.85  
0.00 0.60  
0.27 0.23 2.1 2.4  
0.17 0.08 1.9 2.2  
3.2  
3.0  
0.40 0.21  
0.15 0.19  
0.4  
8°  
0°  
1
0.12  
0.5  
0.4  
0.2 0.08 0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
sot765-1_po  
References  
Outline  
version  
European  
projection  
Issue date  
IEC  
JEDEC  
JEITA  
07-06-02  
16-05-31  
SOT765-1  
MO-187  
Fig. 8. Package outline SOT765-1 (VSSOP8)  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
11 / 17  
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm  
SOT833-1  
b
1
2
3
4
4×  
(2)  
L
L
1
e
8
7
6
5
e
e
e
1
1
1
8×  
(2)  
A
A
1
D
E
terminal 1  
index area  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
A
1
UNIT  
b
D
E
e
e
1
L
L
1
max max  
0.25  
0.17  
2.0  
1.9  
1.05  
0.95  
0.35 0.40  
0.27 0.32  
mm  
0.5 0.04  
0.6  
0.5  
Notes  
1. Including plating thickness.  
2. Can be visible in some manufacturing processes.  
REFERENCES  
JEDEC JEITA  
OUTLINE  
VERSION  
EUROPEAN  
PROJECTION  
ISSUE DATE  
IEC  
07-11-14  
07-12-07  
SOT833-1  
- - -  
- - -  
MO-252  
Fig. 9. Package outline SOT833-1 (XSON8)  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
12 / 17  
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
XSON8: extremely thin small outline package; no leads;  
8 terminals; body 1.2 x 1.0 x 0.35 mm  
SOT1116  
b
4
(2)  
1
2
3
(4×)  
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)  
(8×)  
A
1
A
D
E
terminal 1  
index area  
0
0.5  
scale  
1 mm  
Dimensions  
Unit  
(1)  
A
A
b
D
E
e
e
1
L
L
1
1
max 0.35 0.04 0.20 1.25 1.05  
0.35 0.40  
0.15 1.20 1.00 0.55 0.3 0.30 0.35  
0.12 1.15 0.95 0.27 0.32  
mm nom  
min  
Note  
1. Including plating thickness.  
2. Visible depending upon used manufacturing technology.  
sot1116_po  
References  
Outline  
version  
European  
Issue date  
projection  
IEC  
JEDEC  
JEITA  
10-04-02  
10-04-07  
SOT1116  
Fig. 10. Package outline SOT1116 (XSON8)  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
13 / 17  
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
XSON8: extremely thin small outline package; no leads;  
8 terminals; body 1.35 x 1.0 x 0.35 mm  
SOT1203  
b
4
(2)  
(4×)  
1
2
3
L
L
1
e
8
7
6
5
e
e
e
1
1
1
(2)  
(8×)  
A
1
A
D
E
terminal 1  
index area  
0
L
0.5  
scale  
1 mm  
Dimensions  
Unit  
(1)  
A
A
b
D
E
e
e
1
L
1
1
max 0.35 0.04 0.20 1.40 1.05  
0.35 0.40  
0.15 1.35 1.00 0.55 0.35 0.30 0.35  
0.12 1.30 0.95 0.27 0.32  
mm nom  
min  
Note  
1. Including plating thickness.  
2. Visible depending upon used manufacturing technology.  
sot1203_po  
References  
Outline  
version  
European  
Issue date  
projection  
IEC  
JEDEC  
JEITA  
10-04-02  
10-04-06  
SOT1203  
Fig. 11. Package outline SOT1203 (XSON8)  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
14 / 17  
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
13. Abbreviations  
Table 11. Abbreviations  
Acronym  
Description  
CDM  
DUT  
ESD  
HBM  
MM  
Charged Device Model  
Device Under Test  
ElectroStatic Discharge  
Human Body Model  
Machine Model  
14. Revision history  
Table 12. Revision history  
Document ID  
74AUP2G86 v.10  
Modifications:  
Release date  
20201207  
Data sheet status  
Change notice Supersedes  
Product data sheet  
-
74AUP2G86 v.9  
Section 8: Derating values for Ptot total power dissipation have been updated.  
Type numbers 74AUP2G86GF (SOT1089/XSON8) and 74AUP2G86GM (SOT902-1/  
XQFN8) removed.  
74AUP2G86 v.9  
Modifications:  
20190328  
Product data sheet  
-
74AUP2G86 v.8  
The format of this data sheet has been redesigned to comply with the identity guidelines  
of Nexperia.  
Legal texts have been adapted to the new company name where appropriate.  
Type number 74AUP2G86GD (SOT996-2) removed.  
Package outline drawing SOT765-1 (VSSOP8) updated.  
Package outline drawing SOT902-2 (XQFN8) updated.  
74AUP2G86 v.8  
Modifications:  
20130124  
Product data sheet  
-
74AUP2G86 v.7  
For type number 74AUP2G86GD XSON8U has changed to XSON8.  
74AUP2G86 v.7  
74AUP2G86 v.6  
74AUP2G86 v.5  
74AUP2G86 v.4  
74AUP2G86 v.3  
74AUP2G86 v.2  
74AUP2G86 v.1  
20120614  
20111208  
20100727  
20090629  
20090504  
20080319  
20061009  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
-
-
-
-
-
-
-
74AUP2G86 v.6  
74AUP2G86 v.5  
74AUP2G86 v.4  
74AUP2G86 v.3  
74AUP2G86 v.2  
74AUP2G86 v.1  
-
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
15 / 17  
 
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
injury, death or severe property or environmental damage. Nexperia and its  
suppliers accept no liability for inclusion and/or use of Nexperia products in  
such equipment or applications and therefore such inclusion and/or use is at  
the customer’s own risk.  
15. Legal information  
Quick reference data — The Quick reference data is an extract of the  
product data given in the Limiting values and Characteristics sections of this  
document, and as such is not complete, exhaustive or legally binding.  
Data sheet status  
Document status Product  
Definition  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no representation  
or warranty that such applications will be suitable for the specified use  
without further testing or modification.  
[1][2]  
status [3]  
Objective [short]  
data sheet  
Development  
This document contains data from  
the objective specification for  
product development.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia accepts no liability for  
any assistance with applications or customer product design. It is customer’s  
sole responsibility to determine whether the Nexperia product is suitable  
and fit for the customer’s applications and products planned, as well as  
for the planned application and use of customer’s third party customer(s).  
Customers should provide appropriate design and operating safeguards to  
minimize the risks associated with their applications and products.  
Preliminary [short]  
data sheet  
Qualification  
Production  
This document contains data from  
the preliminary specification.  
Product [short]  
data sheet  
This document contains the product  
specification.  
[1] Please consult the most recently issued document before initiating or  
completing a design.  
Nexperia does not accept any liability related to any default, damage, costs  
or problem which is based on any weakness or default in the customer’s  
applications or products, or the application or use by customer’s third party  
customer(s). Customer is responsible for doing all necessary testing for the  
customer’s applications and products using Nexperia products in order to  
avoid a default of the applications and the products or of the application or  
use by customer’s third party customer(s). Nexperia does not accept any  
liability in this respect.  
[2] The term 'short data sheet' is explained in section "Definitions".  
[3] The product status of device(s) described in this document may have  
changed since this document was published and may differ in case of  
multiple devices. The latest product status information is available on  
the internet at https://www.nexperia.com.  
Definitions  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those  
given in the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any representations or  
warranties as to the accuracy or completeness of information included herein  
and shall have no liability for the consequences of use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is  
intended for quick reference only and should not be relied upon to contain  
detailed and full information. For detailed and full information see the relevant  
full data sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Terms and conditions of commercial sale — Nexperia products are  
sold subject to the general terms and conditions of commercial sale, as  
published at http://www.nexperia.com/profile/terms, unless otherwise agreed  
in a valid written individual agreement. In case an individual agreement is  
concluded only the terms and conditions of the respective agreement shall  
apply. Nexperia hereby expressly objects to applying the customer’s general  
terms and conditions with regard to the purchase of Nexperia products by  
customer.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and customer have explicitly  
agreed otherwise in writing. In no event however, shall an agreement be  
valid in which the Nexperia product is deemed to offer functions and qualities  
beyond those described in the Product data sheet.  
No offer to sell or license — Nothing in this document may be interpreted  
or construed as an offer to sell products that is open for acceptance or the  
grant, conveyance or implication of any license under any copyrights, patents  
or other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Disclaimers  
Limited warranty and liability — Information in this document is believed  
to be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy  
or completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no responsibility  
for the content in this document if provided by an information source outside  
of Nexperia.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified, the  
product is not suitable for automotive use. It is neither qualified nor tested in  
accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of non-automotive qualified  
products in automotive equipment or applications.  
In no event shall Nexperia be liable for any indirect, incidental, punitive,  
special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal  
or replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards,  
customer (a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
Nexperia’s specifications such use shall be solely at customer’s own risk,  
and (c) customer fully indemnifies Nexperia for any liability, damages or failed  
product claims resulting from customer design and use of the product for  
automotive applications beyond Nexperia’s standard warranty and Nexperia’s  
product specifications.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards customer  
for the products described herein shall be limited in accordance with the  
Terms and conditions of commercial sale of Nexperia.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Right to make changes — Nexperia reserves the right to make changes  
to information published in this document, including without limitation  
specifications and product descriptions, at any time and without notice. This  
document supersedes and replaces all information supplied prior to the  
publication hereof.  
Trademarks  
Suitability for use — Nexperia products are not designed, authorized or  
warranted to be suitable for use in life support, life-critical or safety-critical  
systems or equipment, nor in applications where failure or malfunction  
of an Nexperia product can reasonably be expected to result in personal  
Notice: All referenced brands, product names, service names and  
trademarks are the property of their respective owners.  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
16 / 17  
 
Nexperia  
74AUP2G86  
Low-power dual 2-input EXCLUSIVE-OR gate  
Contents  
1. General description......................................................1  
2. Features and benefits.................................................. 1  
3. Ordering information....................................................2  
4. Marking..........................................................................2  
5. Functional diagram.......................................................2  
6. Pinning information......................................................3  
6.1. Pinning.........................................................................3  
6.2. Pin description.............................................................3  
7. Functional description................................................. 3  
8. Limiting values............................................................. 4  
9. Recommended operating conditions..........................4  
10. Static characteristics..................................................5  
11. Dynamic characteristics.............................................8  
11.1. Waveforms and test circuit........................................ 9  
12. Package outline........................................................ 11  
13. Abbreviations............................................................15  
14. Revision history........................................................15  
15. Legal information......................................................16  
© Nexperia B.V. 2020. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 7 December 2020  
©
74AUP2G86  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2020. All rights reserved  
Product data sheet  
Rev. 10 — 7 December 2020  
17 / 17  

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